Welcome to Heisener.com! E-mailSalesDept@heisener.com Telephone+86-755-82529637 ext. 811 Change Country English (USD|RMB)

Change Country

If your country is not listed, please select International as your region.

  • WWInternational

Americas

  • ARArgentina
  • BRBrasil
  • CACanada
  • CLChile
  • COColombia
  • CRCosta Rica
  • DODominican Republic
  • ECEcuador
  • GTGuatemala
  • HNHonduras
  • MXMexico
  • PEPeru
  • PRPuerto Rico
  • USUnited States
  • UYUruguay
  • VEVenezuela

Asia/Pacific

  • AUAustralia
  • CNChina
  • HKHong Kong
  • IDIndonesia
  • ILIsrael
  • INIndia
  • JPJapan
  • KRKorea, Republic of
  • MYMalaysia
  • NZNew Zealand
  • PHPhilippines
  • SGSingapore
  • THThailand
  • TWTaiwan
  • VNVietnam

Europe

  • ATAustria
  • BEBelgium
  • BGBulgaria
  • CHSwitzerland
  • CHCzech Republic
  • DEGermany
  • DKDenmark
  • EEEstonia
  • ESSpain
  • FIFinland
  • FRFrance
  • GBUnited Kingdom
  • GRGreece
  • HRCroatia
  • HUHungary
  • IEIreland
  • ITItaly
  • NLNetherlands
  • NONorway
  • PLPoland
  • PTPortugal
  • RORomania
  • RURussian Federation
  • SESweden
  • SKSlovakia
  • TRTurkey

Language Translation

* Please refer to the English Version as our Official Version.

Account

0

BOM

Contact Us

Texas Instruments - Automotive single positive-edge-triggered D-type flip-flop specified for partial-power-down applications (SN74LVC1G80-Q1)

Post Date: 2017-08-14Manufacturer: Texas Instruments

Summary

The SN74LVC1G80-Q1 device from Texas Instruments is an automotive AEC-Q100 qualified, single positive-edge-triggered D-type flip-flop that is designed for 1.65V to 5.5V VCC operation.

Product Image

The SN74LVC1G80-Q1 device from Texas Instruments is an automotive AEC-Q100 qualified, single positive-edge-triggered D-type flip-flop that is designed for 1.65V to 5.5V VCC operation.

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Copyright © 2015-2017 Heisener Electronics Co., Ltd. All Rights Reserved.

Privacy Policy | Terms & Conditions