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74ACQ244PC

74ACQ244PC

74ACQ244PC

For Reference Only

Part Number 74ACQ244PC
Manufacturer ON Semiconductor
Description IC BUFFER NON-INVERT 6V 20DIP
Datasheet 74ACQ244PC Datasheet
Package 20-DIP (0.300", 7.62mm)
In Stock 453 piece(s)
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74ACQ244PC

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74ACQ244PC Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers
Datasheet 74ACQ244PC Datasheet
Package20-DIP (0.300", 7.62mm)
Series74ACQ
Logic TypeBuffer, Non-Inverting
Number of Elements2
Number of Bits per Element4
Output Type3-State
Current - Output High, Low24mA, 24mA
Voltage - Supply2 V ~ 6 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeThrough Hole
Package / Case20-DIP (0.300", 7.62mm)
Supplier Device Package20-PDIP

74ACQ244PC Datasheet

Page 1

Page 2

© 1999 Fairchild Semiconductor Corporation DS010235 www.fairchildsemi.com July 1989 Revised November 1999 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Q u ie t S e rie s O c ta l B u ffe r/L in e D riv e r w ith 3 -S T A T E O u tp u ts 74ACQ244 • 74ACTQ244 Quiet Series Octal Buffer/Line Driver with 3-STATE Outputs General Description The ACQ/ACTQ244 is an octal buffer and line driver designed to be employed as a memory address driver, clock driver and bus oriented transmitter or receiver which provides improved PC board density. The ACQ/ACTQ uti- lizes Fairchild Quiet Series technology to guarantee quiet output switching and improved dynamic threshold perfor- mance. FACT Quiet Series features GTO output control and undershoot corrector in addition to a split ground bus for superior performance. Features ■ ICC and IOZ reduced by 50% ■Guaranteed simultaneous switching noise level and dynamic threshold performance ■Guaranteed pin-to-pin skew AC performance ■ Improved latch-up immunity ■3-STATE outputs drive bus lines or buffer memory address registers ■Outputs source/sink 24 mA ■Faster prop delays than the standard AC/ACT244 Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Pin Descriptions FACT , Quiet Series , FACT Quiet Series , and GTO are trademarks of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACQ244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ACQ244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACQ244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 74ACTQ244SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body 74ACTQ244SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ244QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide 74ACTQ244MSA MSA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ244PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Pin Names Description OE1, OE2 3-STATE Output Enable Inputs I0–I 7 Inputs O0–O 7 Outputs

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www.fairchildsemi.com 2 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Logic Symbol IEE/IEC Truth Tables H = HIGH Voltage Level L = LOW Voltage Level X = Inmaterial Z = HIGH Impedance Inputs Outputs OE1 In (Pins 12, 14, 16, 18) L L L L H H H X Z Inputs Outputs OE2 In (Pins 3, 5, 7, 9) L L L L H H H X Z

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3 www.fairchildsemi.com 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics for ACQ Supply Voltage (VCC) − 0.5V to + 7.0V DC Input Diode Current (IIK) VI = − 0.5V − 20 mA VI = VCC + 0.5V + 20 mA DC Input Voltage (VI) − 0.5V to VCC + 0.5V DC Output Diode Current (IOK) VO = − 0.5V − 20 mA VO = VCC + 0.5V + 20 mA DC Output Voltage (VO) − 0.5V to V CC + 0.5V DC Output Source or Sink Current (IO) ± 50 mA DC VCC or Ground Current per Output Pin (I CC or IGND) ± 50 mA Storage Temperature (TSTG) − 65° C to + 150° C DC Latch-Up Source or Sink Current ± 300 mA Junction Temperature (T J) PDIP 140° C Supply Voltage (VCC) ACQ 2.0V to 6.0V ACTQ 4.5V to 5.5V Input Voltage (VI) 0V to VCC Output Voltage (VO) 0V to VCC Operating Temperature (TA) − 40° C to + 85° C Minimum Input Edge Rate ∆ V/∆ t ACQ Devices VIN from 30% to 70% of VCC VCC @ 3.0V, 4.5V, 5.5V 125 mV/ns Minimum Input Edge Rate ∆ V/∆ t ACTQ Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns Symbol Parameter VCC TA = + 25° C TA = − 40°C to + 85° C Units Conditions (V) Typ Guaranteed Limits VIH Minimum HIGH Level 3.0 1.5 2.1 2.1 VOUT = 0.1V Input Voltage 4.5 2.25 3.15 3.15 V or VCC − 0.1V 5.5 2.75 3.85 3.85 VIL Maximum LOW Level 3.0 1.5 0.9 0.9 VOUT = 0.1V Input Voltage 4.5 2.25 1.35 1.35 V or VCC − 0.1V 5.5 2.75 1.65 1.65 VOH Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 V IOUT = − 50 µ A 5.5 5.49 5.4 5.4 VIN = VIL or VIH 3.0 2.56 2.46 IOH = − 12 mA 4.5 3.86 3.76 V IOH = − 24 mA 5.5 4.86 4.76 IOH = − 24 mA (Note 2) VOL Maximum LOW Level 3.0 0.002 0.1 0.1 Output Voltage 4.5 0.001 0.1 0.1 V IOUT = 50 µ A 5.5 0.001 0.1 0.1 VIN = VIL or VIH 3.0 0.36 0.44 IOL = 12 mA 4.5 0.36 0.44 V IOL = 24 mA 5.5 0.36 0.44 IOL = 24 mA (Note 2) IIN Maximum Input 5.5 ± 0.1 ± 1.0 µ A VI = VCC, GND (Note 4) Leakage Current IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 3) 5.5 − 75 mA VOHD = 3.85V Min ICC Maximum Quiescent 5.5 4.0 40.0 µ A VIN = VCC or GND (Note 4) Supply Current IOZ Maximum 3-STATE VI(OE) = VIL, VIH Leakage Current 5.5 ± 0.25 ± 2.5 µ A VI = VCC, GND VO = VCC, GND

Page 5

www.fairchildsemi.com 4 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 DC Electrical Characteristics for ACQ (Continued) Note 2: All outputs loaded thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. Note 5: DIP package. Note 6: Max number of outputs defined as (n). Data Inputs are driven 0V to 5V. One output @ GND. Note 7: Max number of Data Inputs (n) switching. (n − 1) Inputs switching 0V to 5V (ACQ). Input-under-test switching: 5V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. DC Electrical Characteristics for ACTQ Note 8: All outputs loaded thresholds on input associated with output under test. Note 9: Maximum test duration 2.0 ms, one output loaded at a time. Note 10: DIP package. Symbol Parameter VCC TA = + 25° C TA = − 40° C to + 85° C Units Conditions (V) Typ Guaranteed Limits VOLP Quiet Output 5.0 1.1 1.5 V Figure 1, Figure 2 Maximum Dynamic VOL (Note 5)(Note 6) VOLV Quiet Output 5.0 − 0.6 − 1.2 V Figure 1, Figure 2 Minimum Dynamic VOL (Note 5)(Note 6) VIHD Minimum HIGH Level 5.0 3.1 3.5 V (Note 5)(Note 7) Dynamic Input Voltage VILD Maximum LOW Level 5.0 1.9 1.5 V (Note 5)(Note 7) Dynamic Input Voltage Symbol Parameter VCC TA = + 25° C TA = − 40° C to + 85° C Units Conditions (V) Typ Guaranteed Limits VIH Minimum HIGH Level 4.5 1.5 2.0 2.0 V VOUT = 0.1V Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V VIL Maximum LOW Level 4.5 1.5 0.8 0.8 V VOUT = 0.1V Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1V VOH Minimum HIGH Level 4.5 4.49 4.4 4.4 V IOUT = − 50 µ A Output Voltage 5.5 5.49 5.4 5.4 VIN = VIL or VIH 4.5 3.86 3.76 V IOH = − 24 mA 5.5 4.86 4.76 IOH = − 24 mA (Note 8) VOL Maximum LOW Level 4.5 0.001 0.1 0.1 V IOUT = 50 µ A Output Voltage 5.5 0.001 0.1 0.1 VIN = VIL or VIH 4.5 0.36 0.44 V IOL = 24 mA 5.5 0.36 0.44 IOL = 24 mA (Note 8) IIN (Note 4) Maximum Input Leakage Current 5.5 ± 0.1 ± 1.0 µ A VI = VCC, GND IOZ Maximum 3-STATE 5.5 ± 0.25 ± 2.5 µ A VI = VIL, VIH Leakage Current VO = VCC, GND ICCT Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC − 2.1V IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 9) 5.5 − 75 mA VOHD = 3.85V Min ICC Maximum Quiescent 5.5 4.0 40.0 µ A VIN = VCC or GND (Note 4) Supply Current VOLP Quiet Output 5.0 1.1 1.5 V Figure 1, Figure 2 Maximum Dynamic VOL (Note 10)(Note 11) VOLV Quiet Output 5.0 − 0.6 − 1.2 V Figure 1, Figure 2 Minimum Dynamic VOL (Note 10)(Note 11) VIHD Minimum HIGH Level 5.0 1.9 2.2 V (Note 10)(Note 12) Dynamic Input Voltage VILD Maximum LOW Level 5.0 1.2 0.8 V (Note 10)(Note 12) Dynamic Input Voltage

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5 www.fairchildsemi.com 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 DC Electrical Characteristics for ACTQ (Continued) Note 11: Max number of outputs defined as (n). Data Inputs are driven 0V to 3V. One output @ GND. Note 12: Max number of Data Inputs (n) switching. (n− 1) Inputs switching 0V to 3V (ACTQ). Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. AC Electrical Characteristics for ACQ Note 13: Voltage Range 5.0 is 5.0V ± 0.5V. Voltage Range 3.3 is 3.3V ± 0.3V. Note 14: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. AC Electrical Characteristics for ACTQ Note 15: Voltage Range 5.0 is 5.0V ± 0.5V. Note 16: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design. Capacitance VCC TA = + 25° C TA = − 40° C to + 85° C Symbol Parameter (V) CL = 50 pF CL = 50 pF Units (Note 13) Min Typ Max Min Max tPHL Propagation Delay 3.3 2.0 7.0 9.0 2.0 9.5 ns tPLH Data to Output 5.0 1.5 5.0 6.0 1.5 6.5 tPZL tPZH Output Enable Time 3.3 2.5 8.0 12.0 2.5 12.5 ns 5.0 1.5 6.5 8.0 1.5 8.5 tPHZ tPLZ Output Disable Time 3.3 1.0 9.0 13.5 1.0 14.0 ns 5.0 1.0 7.5 9.0 1.0 9.5 tOSHL tOSLH Output to Output 3.3 1.0 1.5 1.5 ns Skew Data to Output (Note 14) 5.0 0.5 1.0 1.0 VCC TA = + 25° C TA = − 40° C to + 85° C Symbol Parameter (V) CL = 50 pF CL = 50 pF Units (Note 15) Min Typ Max Min Max tPHL Propagation Delay 5.0 1.5 5.5 6.5 1.5 7.0 ns tPLH Data to Output tPZL Output Enable Time 5.0 1.5 7.0 8.5 1.5 9.0 ns tPZH tPHZ Output Disable Time 5.0 1.0 8.0 9.5 1.0 10.0 ns tPLZ tOSHL Output to Output 5.0 0.5 1.0 1.0 ns tOSLH Skew Data to Output (Note 16) Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = OPEN CPD Power Dissipation Capacitance 70 pF VCC = 5.0V

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www.fairchildsemi.com 6 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard Model 8180A Word Generator PC-163A Test Fixture Tektronics Model 7854 Oscilloscope Procedure: 1. Verify Test Fixture Loading: Standard Load 50 pF, 500Ω . 2. Deskew the HFS generator so that no two channels have greater than 150 ps skew between them. This requires that the oscilloscope be deskewed first. It is important to deskew the HFS generator channels before testing. This will ensure that the outputs switch simultaneously. 3. Terminate all inputs and outputs to ensure proper load- ing of the outputs and that the input levels are at the correct voltage. 4. Set the HFS generator to toggle all but one output at a frequency of 1 MHz. Greater frequencies will increase DUT heating and effect the results of the measure- ment. 5. Set the HFS generator input levels at 0V LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AC devices. Verify levels with an oscilloscope. Note 17: VOHV and VOLP are measured with respect to ground reference. Note 18: Input pulses have the following characteristics: f = 1 MHz, tr = 3 ns, tf = 3 ns, skew < 150 ps. FIGURE 1. Quiet Output Noise Voltage Waveforms VOLP/VOLV and VOHP/V OHV: • Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output volt- ages using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. • Measure VOLP and VOLV on the quiet output during the worst case active and enable transition. Measure VOHP and VOHV on the quiet output during the worst case active and enable transition. • Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability of the measurements. VILD and VIHD: • Monitor one of the switching outputs using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. • First increase the input LOW voltage level, VIL, until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input LOW voltage level at which oscillation occurs is defined as VILD. • Next decrease the input HIGH voltage level, VIH, until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input HIGH voltage level at which oscillation occurs is defined as VIHD. • Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability of the measurements. FIGURE 2. Simultaneous Switching Test Circuit

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7 www.fairchildsemi.com 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body Package Number M20B

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www.fairchildsemi.com 8 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D

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9 www.fairchildsemi.com 7 4 A C Q 2 4 4 • 7 4 A C T Q 2 4 4 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide Package Number MQA20 20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide Package Number MSA20

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