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For Reference Only

Part Number 74ALVC16244MTDX
Manufacturer ON Semiconductor
Description IC BUF NON-INVERT 3.6V 48TSSOP
Datasheet 74ALVC16244MTDX Datasheet
Package 48-TFSOP (0.240", 6.10mm Width)
In Stock 204 piece(s)
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74ALVC16244MTDX Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers
Datasheet 74ALVC16244MTDX Datasheet
Package48-TFSOP (0.240", 6.10mm Width)
Logic TypeBuffer, Non-Inverting
Number of Elements4
Number of Bits per Element4
Output Type3-State
Current - Output High, Low24mA, 24mA
Voltage - Supply1.65 V ~ 3.6 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeSurface Mount
Package / Case48-TFSOP (0.240", 6.10mm Width)
Supplier Device Package48-TSSOP

74ALVC16244MTDX Datasheet

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To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. Is Now Part of ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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© 2005 Fairchild Semiconductor Corporation DS500677 www.fairchildsemi.com October 2001 Revised May 2005 7 4 A L V C 1 6 2 4 4 L o w V o lta g e 1 6 -B it B u ffe r/L in e D riv e r w ith 3 .6 V T o le ra n t In p u ts a n d O u tp u ts 74ALVC16244 Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs General Description The ALVC16244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is nibble (4-bit) controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The 74ALVC16244 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O capability up to 3.6V. The 74ALVC16244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Features ■1.65V–3.6V VCC supply operation ■3.6V tolerant inputs and outputs ■ tPD 3.0 ns max for 3.0V to 3.6V VCC 3.5 ns max for 2.3V to 2.7V VCC 6.0 ns max for 1.65V to 1.95V VCC ■Power-off high impedance inputs and outputs ■Supports live insertion and withdrawal (Note 1) ■Uses patented noise/EMI reduction circuitry ■Latch-up conforms to JEDEC JED98 ■ESD performance: Human body model ! 2000V Machine model ! 200V ■Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Order Number Package Number Package Description 74ALVC16244GX (Note 2) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [Tape and Reel] 74ALVC16244MTD (Note 3) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

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www.fairchildsemi.com 2 7 4 A L V C 1 6 2 4 4 Connection Diagrams Pin Assignment for TSSOP Pin Assignment for FBGA (Top Thru View) Pin Descriptions FBGA Pin Assignments Truth Tables H HIGH Voltage Level L LOW Voltage Level X Immaterial (HIGH or LOW, inputs may not float) Z High Impedance Pin Names Description OEn Output Enable Input (Active LOW) I0–I15 Inputs O0–O15 Outputs NC No Connect 1 2 3 4 5 6 A O0 NC OE1 OE2 NC I0 B O2 O1 NC NC I1 I2 C O4 O3 VCC VCC I3 I4 D O6 O5 GND GND I5 I6 E O8 O7 GND GND I7 I8 F O10 O9 GND GND I9 I10 G O12 O11 VCC VCC I11 I12 H O14 O13 NC NC I13 I14 J O15 NC OE4 OE3 NC I15 Inputs Outputs OE1 I0–I3 O0–O3 L L L L H H H X Z Inputs Outputs OE3 I8-I11 O8–O11 L L L L H H H X Z Inputs Outputs OE2 I4-I7 O4-O7 L L L L H H H X Z Inputs Outputs OE4 I12-I15 O12-O15 L L L L H H H X Z

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3 www.fairchildsemi.com 7 4 A L V C 1 6 2 4 4 Functional Description The 74ALVC16244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble (4 bits) con- trolled with each nibble functioning identically, but indepen- dent of each other. The control pins may be shorted together to obtain full 16-bit operation.The 3-STATE out- puts are controlled by an Output Enable (OEn) input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high imped- ance mode but this does not interfere with entering new data into the inputs. Logic Diagram

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www.fairchildsemi.com 4 7 4 A L V C 1 6 2 4 4 Absolute Maximum Ratings(Note 4) Recommended Operating Conditions (Note 6) Note 4: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat- ings. The “Recommended Operating Conditions” table will define the condi- tions for actual device operation. Note 5: IO Absolute Maximum Rating must be observed, limited to 4.6V. Note 6: Floating or unused control inputs must be held HIGH or LOW. DC Electrical Characteristics Supply Voltage (VCC) 0.5V to 4.6V DC Input Voltage (VI) 0.5V to 4.6V Output Voltage (VO) (Note 5) 0.5V to VCC 0.5V DC Input Diode Current (IIK) VI  0V 50 mA DC Output Diode Current (IOK) VO  0V 50 mA DC Output Source/Sink Current (IOH/IOL) r50 mA DC VCC or GND Current per Supply Pin (ICC or GND) r100 mA Storage Temperature Range (TSTG) 65qC to 150qC Power Supply Operating 1.65V to 3.6V Input Voltage (VI) 0V to VCC Output Voltage (VO) 0V to VCC Free Air Operating Temperature (TA) 40qC to 85qC Minimum Input Edge Rate ('t/'V) VIN 0.8V to 2.0V, VCC 3.0V 10 ns/V Symbol Parameter Conditions VCC Min Max Units (V) VIH HIGH Level Input Voltage 1.65 - 1.95 0.65 x VCC V2.3 - 2.7 1.7 2.7 - 3.6 2.0 VIL LOW Level Input Voltage 1.65 - 1.95 0.35 x VCC V2.3 - 2.7 0.7 2.7 - 3.6 0.8 VOH HIGH Level Output Voltage IOH 100 PA 1.65 - 3.6 VCC - 0.2 V IOH 4 mA 1.65 1.2 IOH 6 mA 2.3 2.0 IOH 12 mA 2.3 1.7 2.7 2.2 3.0 2.4 IOH 24 mA 3.0 2 VOL LOW Level Output Voltage IOL 100 PA 1.65 - 3.6 0.2 V IOL 4 mA 1.65 0.45 IOL 6 mA 2.3 0.4 IOL 12 mA 2.3 0.7 2.7 0.4 IOL 24 mA 3.0 0.55 II Input Leakage Current 0 d VI d 3.6V 3.6 r5.0 PA IOZ 3-STATE Output Leakage 0 d VO d 3.6V 3.6 r10 PA ICC Quiescent Supply Current VI VCC or GND, IO 0 3.6 40 PA 'ICC Increase in ICC per Input VIH VCC  0.6V 3 - 3.6 750 PA

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5 www.fairchildsemi.com 7 4 A L V C 1 6 2 4 4 AC Electrical Characteristics Capacitance Symbol Parameter TA 40qC to 85qC, RL 500: Units CL 50 pF CL 30 pF VCC 3.3V r 0.3V VCC 2.7V VCC 2.5V r 0.2V VCC 1.8V r 0.15V Min Max Min Max Min Max Min Max tPHL, tPLH Propagation Delay 1.3 3 1.5 3.5 1.0 3.0 1.5 6.0 ns tPZL, tPZH Output Enable Time 1.3 4.0 1.5 4.6 1.0 4.1 1.5 8.2 ns tPLZ, tPHZ Output Disable Time 1.3 4.0 1.5 4.3 1.0 3.8 1.5 6.8 ns Symbol Parameter Conditions TA 25qC Units VCC Typical CIN Input Capacitance VI 0V or VCC 3.3 6 pF COUT Output Capacitance VI 0V or VCC 3.3 7 pF CPD Power Dissipation Capacitance Outputs Enabled f 10 MHz, CL 0 pF 3.3 20 pF 2.5 20

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www.fairchildsemi.com 6 7 4 A L V C 1 6 2 4 4 AC Loading and Waveforms FIGURE 1. AC Test Circuit Table 1: Values for Figure 1 Table 2: Variable Matrix (Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50:) FIGURE 2. Waveform for Inverting and Non-Inverting Functions FIGURE 3. 3-STATE Output High Enable and Disable Times for Low Voltage Logic FIGURE 4. 3-STATE Output Low Enable and Disable Times for Low Voltage Logic TEST SWITCH tPLH, tPHL Open tPZL, tPLZ VL tPZH, tPHZ GND Symbol VCC 3.3V r 0.3V 2.7V 2.5V r 0.2V 1.8V r 0.15V Vmi 1.5V 1.5V VCC/2 VCC/2 Vmo 1.5V 1.5V VCC/2 VCC/2 VX VOL  0.3V VOL  0.3V VOL  0.15V VOL  0.15V VY VOH  0.3V VOH  0.3V VOH  0.15V VOH  0.15V VL 6V 6V VCC*2 VCC*2

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7 www.fairchildsemi.com 7 4 A L V C 1 6 2 4 4 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A

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www.fairchildsemi.com 8 7 4 A L V C 1 6 2 4 4 L o w V o lt a g e 1 6 -B it B u ff e r/ L in e D ri v e r w it h 3 .6 V T o le ra n t In p u ts a n d O u tp u ts Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be rea- sonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be rea- sonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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