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74F169SCX

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74F169SCX

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Part Number 74F169SCX
Manufacturer Fairchild/ON Semiconductor
Description IC COUNTER 4STAGE SYNC 16SOIC
Datasheet 74F169SCX Datasheet
Package 16-SOIC (0.154", 3.90mm Width)
In Stock 7,544 piece(s)
Unit Price Request a Quote
Lead Time Can Ship Immediately
Estimated Delivery Time Sep 27 - Oct 2 (Choose Expedited Shipping)
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Part Number # 74F169SCX (Logic - Counters, Dividers) is manufactured by Fairchild/ON Semiconductor and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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74F169SCX Specifications

ManufacturerFairchild/ON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Counters, Dividers
Datasheet 74F169SCXDatasheet
Package16-SOIC (0.154", 3.90mm Width)
Series74F
Logic TypeBinary Counter
DirectionUp, Down
Number of Elements1
Number of Bits per Element4
Reset-
Timing-
Count Rate90MHz
Trigger TypePositive Edge
Voltage - Supply4.5 V ~ 5.5 V
Operating Temperature0°C ~ 70°C
Mounting TypeSurface Mount
Package / Case16-SOIC (0.154", 3.90mm Width)
Supplier Device Package16-SOIC

74F169SCX Datasheet

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© 2000 Fairchild Semiconductor Corporation DS009488 www.fairchildsemi.com April 1988 Revised September 2000 7 4 F 1 6 9 4 -S ta g e S y n c h ro n o u s B id ire c tio n a l C o u n te r 74F169 4-Stage Synchronous Bidirectional Counter General Description The 74F169 is a fully synchronous 4-stage up/down counter. The 74F169 is a modulo-16 binary counter. Fea- tures a preset capability for programmable operation, carry lookahead for easy cascading and a U/D input to control the direction of counting. All state changes, whether in counting or parallel loading, are initiated by the LOW-to-HIGH transition of the clock. Features ■Asynchronous counting and loading ■Built-in lookahead carry capability ■Presettable for programmable operation Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F169SC M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74F169SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F169PC N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

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www.fairchildsemi.com 2 7 4 F 1 6 9 Unit Loading/Fan Out Functional Description The 74F169 uses edge-triggered J-K type flip-flops and has no constraints on changing the control or data input signals in either state of the clock. The only requirement is that the various inputs attain the desired state at least a setup time before the rising edge of the clock and remain valid for the recommended hold time thereafter. The paral- lel load operation takes precedence over other operations, as indicated in the Mode Select Table. When PE is LOW, the data on the P0–P3 inputs enters the flip-flops on the next rising edge of the clock. In order for counting to occur, both CEP and CET must be LOW and PE must be HIGH; the U/D input then determines the direction of counting. The Terminal Count (TC) output is normally HIGH and goes LOW, provided that CET is LOW, when a counter reaches zero in the Count Down mode or reaches 15 for the 74F169 in the Count Up mode. The TC output state is not a function of the Count Enable Parallel (CEP) input level. Since the TC signal is derived by decoding the flip-flop states, there exists the possibility of decoding spikes on TC. For this reason the use of TC as a clock signal is not recommended (see logic equations below). 1. Count Enable = CEP • CET • PE 2. Up: (74F169): TC = Q0 • Q1 • Q2 • Q3 • (Up) • CET 3. Down: TC = Q0 • Q1 • Q2 • Q3 • (Down) • CET Mode Select Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial State Diagram Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL CEP Count Enable Parallel Input (Active LOW) 1.0/1.0 20 µ A/− 0.6 mA CET Count Enable Trickle Input (Active LOW) 1.0/2.0 20 µ A/− 1.2 mA CP Clock Pulse Input (Active Rising Edge) 1.0/1.0 20 µ A/− 0.6 mA P0–P3 Parallel Data Inputs 1.0/1.0 20 µ A/− 0.6 mA PE Parallel Enable Input (Active LOW) 1.0/1.0 20 µ A/− 0.6 mA U/D Up-Down Count Control Input 1.0/1.0 20 µ A/− 0.6 mA Q0–Q3 Flip-Flop Outputs 50/33.3 − 1 mA/20 mA TC Terminal Count Output (Active LOW) 50/33.3 − 1 mA/20 mA PE CEP CET U/D Action on Rising Clock Edge L X X X Load (Pn → Qn) H L L H Count Up (Increment) H L L L Count Down (Decrement) H H X X No Change (Hold) H X H X No Change (Hold)

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3 www.fairchildsemi.com 7 4 F 1 6 9 Logic Diagram Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays.

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www.fairchildsemi.com 4 7 4 F 1 6 9 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Storage Temperature − 65° C to + 150° C Ambient Temperature under Bias − 55° C to + 125° C Junction Temperature under Bias − 55° C to + 150° C VCC Pin Potential to Ground Pin − 0.5V to + 7.0V Input Voltage (Note 2) − 0.5V to + 7.0V Input Current (Note 2) − 30 mA to + 5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output − 0.5V to VCC 3-STATE Output − 0.5V to + 5.5V Current Applied to Output in LOW State (Max) twice the rated IOL (mA) Free Air Ambient Temperature 0° C to + 70° C Supply Voltage + 4.5V to + 5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage − 1.2 V Min IIN = − 18 mA VOH Output HIGH 10% VCC 2.5 V Min IOH = − 1 mA Voltage 5% VCC 2.7 IOH = − 1 mA VOL Output LOW 10% VCC 0.5 V Min IOL = 20 mA Voltage IIH Input HIGH 5.0 µ A Max VIN = 2.7V Current IBVI Input HIGH Current 7.0 µ A Max VIN = 7.0V Breakdown Test ICEX Output HIGH 50 µ A Max VOUT = VCC Leakage Current VID Input Leakage 4.75 V 0.0 IID = 1.9 µ A Test All Other Pins Grounded IOD Output Leakage 3.75 µ A 0.0 VIOD = 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current − 0.6 mA Max VIN = 0.5V (except CET) − 1.2 VIN = 0.5V (CET) IOS Output Short-Circuit Current − 60 − 150 mA Max VOUT = 0V ICCL Power Supply Current 35 52 mA Max VO = LOW

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5 www.fairchildsemi.com 7 4 F 1 6 9 AC Electrical Characteristics AC Operating Requirements Symbol Parameter TA = + 25° C TA = − 55° C to + 125° C TA = 0° C to + 70° C Units VCC = + 5.0V VCC = + 5.0V VCC = + 5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max fMAX Maximum Count Frequency 90 60 70 MHz tPLH Propagation Delay 3.0 6.5 8.5 3.0 12.0 3.0 9.5 ns tPHL CP to Qn (PE HIGH or LOW) 4.0 9.0 11.5 4.0 16.0 4.0 13.0 tPLH Propagation Delay 5.5 12.0 15.5 5.5 20.0 5.5 17.5 ns tPHL CP to TC 4.0 8.5 12.5 4.0 15.0 4.0 13.0 tPLH Propagation Delay 2.5 4.5 6.5 2.5 9.0 2.5 7.0 ns tPHL CET to TC 2.5 8.5 11.0 2.5 12.0 2.5 12.0 tPLH Propagation Delay 3.5 8.5 11.5 3.5 16.0 3.5 12.5 ns tPHL U/D to TC 4.0 8.0 12.0 4.0 14.0 4.0 13.0 Symbol Parameter TA = + 25° C TA = − 55° C to + 125° C TA = 0° C to + 70° C UnitsVCC = + 5.0V VCC = + 5.0V VCC = + 5.0V Min Max Min Max Min Max tS(H) Setup Time, HIGH or LOW 4.0 4.5 4.5 ns tS(L) Pn to CP 4.0 4.5 4.5 tH(H) Hold Time, HIGH or LOW 3.0 3.5 3.5 tH(L) Pn to CP 3.0 3.5 3.5 tS(H) Setup Time, HIGH or LOW 7.0 8.0 8.0 ns tS(L) CEP or CET to CP 5.0 8.0 6.5 tH(H) Hold Time, HIGH or LOW 0 0 0 tH(L) CEP or CET to CP 0.5 1.0 0.5 tS(H) Setup Time, HIGH or LOW 8.0 10.0 9.0 ns tS(L) PE to CP 8.0 10.0 9.0 tH(H) Hold Time, HIGH or LOW 1.0 1.0 1.0 tH(L) PE to CP 0 0 0 tS(H) Setup Time, HIGH or LOW 11.0 14.0 12.5 ns tS(L) U/D to CP 7.0 12.0 8.5 tH(H) Hold Time, HIGH or LOW 0 0 0 tH(L) U/D to CP 0 0 0 tW(H) CP Pulse Width 4.0 6.0 4.5 ns tW(L) HIGH or LOW 7.0 9.0 8.0

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www.fairchildsemi.com 6 7 4 F 1 6 9 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A

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7 www.fairchildsemi.com 7 4 F 1 6 9 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D

74F169SCX Reviews

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74F169SCX Guarantees

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