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Part Number 74F574SJ
Manufacturer Fairchild/ON Semiconductor
Datasheet 74F574SJ Datasheet
Package 20-SOIC (0.209", 5.30mm Width)
In Stock 390 piece(s)
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Estimated Delivery Time Jan 20 - Jan 25 (Choose Expedited Shipping)
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Part Number # 74F574SJ (Logic - Flip Flops) is manufactured by Fairchild/ON Semiconductor and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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74F574SJ Specifications

ManufacturerFairchild/ON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Flip Flops
Datasheet 74F574SJDatasheet
Package20-SOIC (0.209", 5.30mm Width)
Output TypeTri-State, Non-Inverted
Number of Elements1
Number of Bits per Element8
Clock Frequency100MHz
Max Propagation Delay @ V, Max CL8.5ns @ 5V, 50pF
Trigger TypePositive Edge
Current - Output High, Low3mA, 24mA
Voltage - Supply4.5 V ~ 5.5 V
Current - Quiescent (Iq)86mA
Input Capacitance-
Operating Temperature0°C ~ 70°C (TA)
Mounting TypeSurface Mount
Package / Case20-SOIC (0.209", 5.30mm Width)

74F574SJ Datasheet

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© 2000 Fairchild Semiconductor Corporation DS009567 April 1988 Revised October 2000 7 4 F 5 7 4 O c ta l D -T y p e F lip -F lo p w ith 3 -S T A T E O u tp u ts 74F574 Octal D-Type Flip-Flop with 3-STATE Outputs General Description The 74F574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. This device is functionally identical to the 74F374 except for the pinouts. Features ■ Inputs and outputs on opposite sides of package allowing easy interface with microprocessors ■Useful as input or output port for microprocessors ■Functionally identical to 74F374 ■3-STATE outputs for bus-oriented applications Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Order Number Package Number Package Description 74F574SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74F574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74F574PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Page 3 2 7 4 F 5 7 4 Unit Loading/Fan Out Functional Description The 74F574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Opera- tion of the OE input does not affect the state of the flip- flops. Function Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance  = LOW-to-HIGH Transition NC = No Change Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Pin Names Description U.L. Input IIH/IIL HIGH/LOW Output IOH/IOL D0–D7 Data Inputs 1.0/1.0 20 µ A/− 0.6 mA CP Clock Pulse Input (Active LOW) 1.0/1.0 20 µ A/− 0.6 mA OE 3-STATE Output Enable Input (Active LOW) 1.0/1.0 20 µ A/− 0.6 mA O0–O7 3-STATE Outputs 150/40 (33.3) − 3 mA/24 mA (20 mA) Inputs Internal Outputs Function OE CP D Q O H H L NC Z Hold H H H NC Z Hold H  L L Z Load H  H H Z Load L  L L L Data Available L  H H H Data Available L H L NC NC No Change in Data L H H NC NC No Change in Data

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3 7 4 F 5 7 4 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Storage Temperature − 65° C to + 150° C Ambient Temperature under Bias − 55° C to + 125° C Junction Temperature under Bias − 55° C to + 150° C VCC Pin Potential to Ground Pin − 0.5V to + 7.0V Input Voltage (Note 2) − 0.5V to + 7.0V Input Current (Note 2) − 30 mA to + 5.0 mA Voltage Applied to Output in HIGH State (with VCC = 0V) Standard Output − 0.5V to VCC 3-STATE Output − 0.5V to + 5.5V Current Applied to Output in LOW State (Max) twice the rated IOL (mA) Free Air Ambient Temperature 0° C to + 70° C Supply Voltage + 4.5V to + 5.5V Symbol Parameter Min Typ Max Units VCC Conditions VIH Input HIGH Voltage 2.0 V Recognized as a HIGH Signal VIL Input LOW Voltage 0.8 V Recognized as a LOW Signal VCD Input Clamp Diode Voltage − 1.2 V Min IIN = − 18 mA VOH Output HIGH 10% VCC 2.5 V Min IOH = − 1 mA Voltage 10% VCC 2.4 IOH = − 3 mA 5% VCC 2.7 IOH = − 1 mA 5% VCC 2.7 IOH = − 3 mA VOL Output LOW 10% VCC 0.5 V Min IOL = 24 mA Voltage IIH Input HIGH 5.0 µ A Max VIN = 2.7V Current IBVI Input HIGH Current 7.0 µ A Max VIN = 7.0V Breakdown Test ICEX Output HIGH 50 µ A Max VOUT = VCC Leakage Current VID Input Leakage 4.75 V 0.0 IID = 1.9 µ A Test All Other Pins Grounded IOD Output Leakage 3.75 µ A 0.0 VIOD = 150 mV Circuit Current All Other Pins Grounded IIL Input LOW Current − 0.6 mA Max VIN = 0.5V IOZH Output Leakage Current 50 µ A Max VOUT = 2.7V IOZL Output Leakage Current − 50 µ A Max VOUT = 0.5V IOS Output Short-Circuit Current − 60 − 150 mA Max VOUT = 0V IZZ Bus Drainage Test 500 µ A 0.0V VOUT = 5.25V ICCZ Power Supply Current 55 86 mA Max VO = HIGH Z

Page 5 4 7 4 F 5 7 4 AC Electrical Characteristics AC Operating Requirements Symbol Parameter TA = + 25° C TA = − 55° C to + 125° C TA = 0° C to + 70° C Units VCC = + 5.0V VCC = + 5.0V VCC = + 5.0V CL = 50 pF CL = 50 pF CL = 50 pF Min Typ Max Min Max Min Max fMAX Maximum Clock Frequency 100 60 70 MHz tPLH Propagation Delay 2.5 5.3 8.5 2.5 9.5 2.5 8.5 ns tPHL CP to On 2.5 5.3 8.5 2.5 9.5 2.5 8.5 tPZH Output Enable Time 3.0 5.5 9.0 2.5 10.5 2.5 10.0 ns tPZL 3.0 6.0 9.0 2.5 10.5 2.5 10.0 tPHZ Output Disable Time 1.5 3.3 5.5 1.5 7.0 1.5 6.5 tPLZ 1.5 2.8 5.5 1.5 7.0 1.5 6.5 Symbol Parameter TA = + 25° C TA = − 55° C to + 125° C TA = 0° C to + 70° C UnitsVCC = + 5.0V VCC = + 5.0V VCC = + 5.0V Min Max Min Max Min Max tS(H) Set-up Time, HIGH or LOW 2.5 3.0 2.5 ns tS(L) Dn to CP 2.0 2.5 2.0 tH(H) Hold Time, HIGH or LOW 2.0 2.0 2.0 tH(L) Dn to CP 2.0 2.0 2.0 tW(H) CP Pulse Width 5.0 5.0 5.0 ns tW(L) HIGH or LOW 5.0 5.0 5.0

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5 7 4 F 5 7 4 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B

Page 7 6 7 4 F 5 7 4 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D

74F574SJ Reviews

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December 22, 2020

Fantastic quality products with fair and prompt shipping. Would save much time crossing all the features. Thank you for all your effort.


December 21, 2020

All items individually packed in anti static bags and properly labeled.


December 14, 2020

Used these for a solar project, and they are working great.


December 12, 2020

You're my good supplier. I appreciate Heisener Electronics on many levels.


December 11, 2020

You guys and girls are fantastic! The selection is fantastic and service is great.

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