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AD622AR

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AD622AR

For Reference Only

Part Number AD622AR
Manufacturer Analog Devices Inc.
Description IC OPAMP INSTR 1MHZ 8SOIC
Datasheet AD622AR Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 359 piece(s)
Unit Price $ 6.97 *
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AD622AR Specifications

ManufacturerAnalog Devices Inc.
CategoryIntegrated Circuits (ICs) - Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps
Datasheet AD622AR Datasheet
Package8-SOIC (0.154", 3.90mm Width)
Series-
Amplifier TypeInstrumentation
Number of Circuits1
Slew Rate1.2 V/µs
-3db Bandwidth1MHz
Current - Input Bias2nA
Voltage - Input Offset60µV
Current - Supply900µA
Current - Output / Channel18mA
Voltage - Supply, Single/Dual (��)��2.6 V ~ 18 V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mount
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SOIC

AD622AR Datasheet

Page 1

Page 2

Low Cost Instrumentation Amplifier Data Sheet AD622 Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1996–2012 Analog Devices, Inc. All rights reserved. FEATURES Easy to use Low cost solution Higher performance than two or three op amp design Unity gain with no external resistor Optional gains with one external resistor (Gain range: 2 to 1000) Wide power supply range: ±2.6 V to ±15 V Available in 8-lead PDIP and 8-lead SOIC_N packages Low power, 1.5 mA maximum supply current DC performance 0.15% gain accuracy: G = 1 125 µV maximum input offset voltage 1.0 µV/°C maximum input offset drift 5 nA maximum input bias current 66 dB minimum common-mode rejection ratio: G = 1 Noise 12 nV/√Hz @ 1 kHz input voltage noise 0.60 µV p-p noise: 0.1 Hz to 10 Hz, G = 10 AC characteristics 800 kHz bandwidth: G = 10 10 µs settling time to 0.1% @ G = 1 to 100 1.2 V/µs slew rate APPLICATIONS Transducer interface Low cost thermocouple amplifier Industrial process controls Difference amplifier Low cost data acquisition PIN CONFIGURATION RG 1 –IN 2 +IN 3 –VS 4 RG8 +VS7 OUTPUT6 REF5 AD622 00 77 7- 00 1 Figure 1. 8-Lead PDIP and 8-Lead SOIC_N (N and R Suffixes) GENERAL DESCRIPTION The AD622 is a low cost, moderately accurate instrumentation amplifier in the traditional pin configuration that requires only one external resistor to set any gain between 2 and 1000. For a gain of 1, no external resistor is required. The AD622 is a complete difference or subtractor amplifier system that also provides superior linearity and common-mode rejection by incorporating precision laser-trimmed resistors. The AD622 replaces low cost, discrete, two or three op amp instrumentation amplifier designs and offers good common- mode rejection, superior linearity, temperature stability, reliability, power, and board area consumption. The low cost of the AD622 eliminates the need to design discrete instrumentation amplifiers to meet stringent cost targets. While providing a lower cost solution, it also provides performance and space improvements. Table 1. Next Generation Upgrades for AD622 Part Comment AD8221 Better specs at lower price AD8222 Dual channel or differential out AD8226 Low power, wide input range AD8220 JFET input AD8228 Best gain accuracy AD8295 +2 precision op amps or differential out AD8421 Low noise, better specs

Page 3

AD622 Data Sheet Rev. E | Page 2 of 16 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 5 Thermal Resistance ...................................................................... 5 ESD Caution .................................................................................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation .........................................................................9 Make vs. Buy: A Typical Application Error Budget ..................9 Gain Selection ................................................................................. 11 Input and Output Offset Voltage .............................................. 11 Reference Terminal .................................................................... 11 Input Protection ......................................................................... 11 RF Interference ........................................................................... 12 Ground Returns for Input Bias Currents ................................ 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 14 REVISION HISTORY 6/12—Rev. D to Rev. E Changes to General Description Section; Added Table 1 ........... 1 Changes to Theory of Operation Section and Figure 16 ............. 9 Changes to Table 5 .......................................................................... 10 Changes to Input Selection Section; Deleted Large Input Voltages at Large Gains Section; Added Figure 18, Renumbered Sequentially ..................................................................................... 11 Changes to Ordering Guide .......................................................... 14 8/07—Rev. C to Rev. D Updated Format .................................................................. Universal Added Thermal Resistance Section ............................................... 5 Added Figure 16 ................................................................................ 9 Added Large Input Voltages at Large Gains Section ................. 11 Replaced RF Interference Section ................................................ 11 Deleted Grounding Section .......................................................... 10 Deleted Figure 16 ............................................................................ 10 Changes to Ground Returns for Input Bias Currents Section .. 12 Updated Outline Dimensions ....................................................... 13 Changes to Ordering Guide .......................................................... 14 4/99—Rev. B to Rev. C 8/98—Rev. A to Rev. B 2/97—Rev. 0 to Rev. A 1/96—Revision 0: Initial Version

Page 4

Data Sheet AD622 Rev. E | Page 3 of 16 SPECIFICATIONS TA = 25°C, VS = ±15 V, and RL = 2 kΩ typical, unless otherwise noted. Table 2. Parameter Conditions Min Typ Max Unit GAIN G = 1 + (50.5 k/RG) Gain Range 1 1000 Gain Error1 VOUT = ±10 V G = 1 0.05 0.15 % G = 10 0.2 0.50 % G = 100 0.2 0.50 % G = 1000 0.2 0.50 % Nonlinearity VOUT = ±10 V G = 1 to 1000 RL = 10 kΩ 10 ppm G = 1 to 100 RL = 2 kΩ 10 ppm Gain vs. Temperature Gain = 1 10 ppm/°C Gain > 11 −50 ppm/°C VOLTAGE OFFSET Total RTI Error = VOSI + VOSO/G Input Offset, VOSI VS = ±5 V to ±15 V 60 125 µV Average Temperature Coefficient VS = ±5 V to ±15 V 1.0 µV/°C Output Offset, VOSO VS = ±5 V to ±15 V 600 1500 µV Average Temperature Coefficient VS = ±5 V to ±15 V 15 µV/°C Offset Referred to Input vs. Supply (PSR) VS = ±5 V to ±15 V G = 1 80 100 dB G = 10 95 120 dB G = 100 110 140 dB G = 1000 110 140 dB INPUT CURRENT Input Bias Current 2.0 5.0 nA Average Temperature Coefficient 3.0 pA/°C Input Offset Current 0.7 2.5 nA Average Temperature Coefficient 2.0 pA/°C INPUT Input Impedance Differential 10||2 G Ω||pF Common Mode 10||2 GΩ||pF Input Voltage Range2 VS = ±2.6 V to ±5 V −VS + 1.9 +VS – 1.2 V Over Temperature −VS + 2.1 +VS – 1.3 V VS = ±5 V to ±18 V −VS + 1.9 +VS – 1.4 V Over Temperature −VS + 2.1 +VS – 1.4 V Common-Mode Rejection Ratio DC to 60 Hz with 1 kΩ Source Imbalance VCM = 0 V to ±10 V G = 1 66 78 dB G = 10 86 98 dB G = 100 103 118 dB G = 1000 103 118 dB OUTPUT Output Swing RL = 10 kΩ VS = ±2.6 V to ±5 V −VS + 1.1 +VS – 1.2 V Over Temperature −VS + 1.4 +VS – 1.3 V VS = ±5 V to ±18 V −VS + 1.2 +VS – 1.4 V Over Temperature −VS + 1.6 +VS – 1.5 V Short Current Circuit ±18 mA

Page 5

AD622 Data Sheet Rev. E | Page 4 of 16 Parameter Conditions Min Typ Max Unit DYNAMIC RESPONSE Small Signal −3 dB Bandwidth G = 1 1000 kHz G = 10 800 kHz G = 100 120 kHz G = 1000 12 kHz Slew Rate 1.2 V/µs Settling Time to 0.1% 10 V step G = 1 to 100 10 µs NOISE Voltage Noise, 1 kHz Total RTI Noise = √(e2ni) + (eno∕G)2 Input Voltage Noise, eni 12 nV/√Hz Output Voltage Noise, eno 72 nV/√Hz RTI, 0.1 Hz to 10 Hz G = 1 4.0 µV p-p G = 10 0.6 µV p-p G = 100 0.3 µV p-p Current Noise f = 1 kHz 100 fA/√Hz 0.1 Hz to 10 Hz 10 pA p-p REFERENCE INPUT RIN 20 kΩ IIN VIN+, VREF = 0 50 60 µA Voltage Range −VS + 1.6 +VS – 1.6 V Gain to Output 1 ± 0.0015 POWER SUPPLY Operating Range3 ±2.6 ±18 V Quiescent Current VS = ±2.6 V to ±18 V 0.9 1.3 mA Over Temperature 1.1 1.5 mA TEMPERATURE RANGE For Specified Performance −40 to +85 °C 1 Does not include effects of External Resistor RG. 2 One input grounded, G = 1. 3 Defined as the same supply range that is used to specify PSR.

Page 6

Data Sheet AD622 Rev. E | Page 5 of 16 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±18 V Internal Power Dissipation1 650 mW Input Voltage (Common Mode) ±VS Differential Input Voltage2 ±25 V Output Short Circuit Duration Indefinite Storage Temperature Range −65°C to +125°C Operating Temperature Range −40°C to +85°C Lead Temperature (Soldering, 10 sec) 300°C 1 Specification is for device in free air; see Table 4. 2 May be further restricted for gains greater than 14. See the Input Protection section for more information. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. THERMAL RESISTANCE θJA is specified for the device in free air. Table 4. Thermal Resistance Package Type θJA Unit 8-Lead PDIP (N-8) 95 °C/W 8-Lead SOIC_N (R-8) 155 °C/W ESD CAUTION

Page 7

AD622 Data Sheet Rev. E | Page 6 of 16 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = ±15 V, RL = 2 kΩ, unless otherwise noted. 50 40 30 20 10 0 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 PE R C EN TA G E O F U N IT S OUTPUT OFFSET VOLTAGE (mV) SAMPLE SIZE = 191 00 77 7- 00 2 Figure 2. Typical Distribution of Output Offset Voltage 50 40 30 20 10 0 60 80 100 120 140 PE R C EN TA G E O F U N IT S COMMON-MODE REJECTION RATIO (dB) SAMPLE SIZE = 383 00 77 7- 00 3 Figure 3. Typical Distribution of Common-Mode Rejection 2.0 1.5 1.0 0.5 0 0 54321 IN PU T O FF SE T VO LT A G E (µ V) WARM-UP TIME (Minutes) 00 77 7- 00 4 Figure 4. Change in Input Offset Voltage vs. Warm-Up Time 1000 100 10 1 1 100k10k1k10010 VO LT A G E N O IS E (n V/ H z) FREQUENCY (Hz) GAIN = 1 GAIN = 1000 BW LIMIT GAIN = 10 GAIN = 100, 1000 00 77 7- 00 5 Figure 5. Voltage Noise Spectral Density vs. Frequency (G = 1 to 1000) 1000 100 10 1 100010010 C U R R EN T N O IS E (fA / H z) FREQUENCY (Hz) 00 77 7- 00 6 Figure 6. Current Noise Spectral Density vs. Frequency 140 120 100 80 60 40 20 0 0.1 1M100k10k1k100101 C M R (d B ) FREQUENCY (Hz) G = 1000 G = 100 G = 10 G = 1 00 77 7- 00 7 Figure 7. CMR vs. Frequency, RTI, 0 kΩ to 1 kΩ Source Imbalance

Page 8

Data Sheet AD622 Rev. E | Page 7 of 16 0.1 PO SI TI VE P SR (d B ) 180 140 160 120 100 80 60 40 20 1M100k10k1k100101 FREQUENCY (Hz) G = 1000 G = 100 G = 10 G = 1 00 77 7- 00 8 Figure 8. Positive PSR vs. Frequency, RTI (G = 1 to 1000) 0.1 1M100k10k1k100101 N EG A TI VE P SR (d B ) FREQUENCY (Hz) G = 1000 G = 100 G = 10 G = 1 180 140 160 120 100 80 60 40 20 00 77 7- 00 9 Figure 9. Negative PSR vs. Frequency, RTI (G = 1 to 1000) 100 10M1M100k10k 0.1 1 10 100 1000 1k G A IN (V /V ) FREQUENCY (Hz) 00 77 7- 01 0 Figure 10. Gain vs. Frequency 10 10k1k100 0 10 30 20 O U TP U T VO LT A G E SW IN G (V p -p ) LOAD RESISTANCE (Ω) 00 77 7- 01 1 VS = ±15V G = 10 Figure 11. Output Voltage Swing vs. Load Resistance 0 2010 155 0 20 15 5 10 SE TT LI N G T IM E (µ s) OUTPUT STEP SIZE (V) TO 0.1% 00 77 7- 01 2 Figure 12. Settling Time vs. Step Size (G = 1) 1 100010010 1 10 1000 100 SE TT LI N G T IM E (µ s) GAIN 00 77 7- 01 3 Figure 13. Settling Time to 0.1% vs. Gain, for a 10 V Step

Page 9

AD622 Data Sheet Rev. E | Page 8 of 16 100 90 10 0% Ø 10µV 2V 00 77 7- 01 4 Figure 14. Gain Nonlinearity, G = 1, RL = 10 kΩ (20 µV = 2 ppm) AD622 2 1 8 3 4 5 6 7 +VS –VS 51 .1 Ω 51 1Ω 5. 62 kΩ G = 1 G = 10G = 100 G = 1000 11kΩ 0.1% 1kΩ 0.1% 100Ω 0.1% 100kΩ 0.1% INPUT 20V p-p VOUT 10kΩ 0.01% 1kΩ POT 10kΩ 0.1% 00 77 7- 01 5 Figure 15. Settling Time Test Circuit

Page 10

Data Sheet AD622 Rev. E | Page 9 of 16 THEORY OF OPERATION The AD622 is a monolithic instrumentation amplifier based on a modification of the classic three op amp approach. Absolute value trimming allows the user to program gain accurately (to 0.5% at G = 1000) with only one resistor. Monolithic construction and laser wafer trimming allow the tight matching and tracking of circuit components, thus insuring AD622 performance. Input Transistor Q1 and Input Transistor Q2 provide a single differential-pair bipolar input for high precision (see Figure 16). Feedback through the Q1-A1-R1 loop and the Q2-A2-R2 loop maintains constant collector current of the Q1 and Q2 input devices, thereby impressing the input voltage across External Gain-Setting Resistor RG. This creates a differential gain from the inputs to the A1 and A2 outputs given by G = (R1 + R2)/RG + 1. Unity-Gain Subtractor A3 removes any common-mode signal, yielding a single-ended output referred to the REF pin potential. 00 77 7- 02 2 VB –VS A1 A2 A3 C2 RG R1 R2 GAIN SENSE GAIN SENSE 10kΩ 10kΩ I2I1 10kΩ REF 10kΩ +IN – IN R4 400Ω OUTPUT C1 Q2Q1 R3 400Ω +VS +VS +VS 20µA20µA Figure 16. Simplified Schematic of the AD622 The value of RG also determines the transconductance of the preamp stage. As RG is reduced for larger gains, the trans- conductance increases asymptotically to that of the input transistors. This has the following three important advantages: • Open-loop gain is boosted for increasing programmed gain, thus reducing gain-related errors. • The gain-bandwidth product (determined by C1, C2, and the preamp transconductance) increases with programmed gain, thus optimizing frequency response. • The input voltage noise is reduced to a value of 12 nV/√Hz, determined mainly by the collector current and base resistance of the input devices. The internal gain resistors, R1 and R2, are trimmed to an absolute value of 25.25 kΩ, allowing the gain to be programmed accurately with a single external resistor. MAKE vs. BUY: A TYPICAL APPLICATION ERROR BUDGET The AD622 offers cost and performance advantages over discrete two op amp instrumentation amplifier designs along with smaller size and fewer components. In a typical application shown in Figure 17, a gain of 10 is required to receive and amplify a 0 to 20 mA signal from the AD694 current transmitter. The current is converted to a voltage in a 50 Ω shunt. In applications where transmission is over long distances, line impedance can be significant so that differential voltage measurement is essential. Where there is no connection between the ground returns of transmitter and receiver, there must be a dc path from each input to ground, implemented in this case using two 1 kΩ resistors. The error budget detailed in Table 5 shows how to calculate the effect of various error sources on circuit accuracy. AD694 0 TO 20mA TRANSMITTER RL2 10Ω RL2 10Ω 0 TO 20mA 50Ω 0 TO 20mA CURRENT LOOP WITH 50Ω SHUNT IMPEDANCE RG 5.62kΩ 1kΩ 1kΩ REF AD622 AD622 MONOLITHIC INSTRUMENTATION AMPLIFIER, G = 9.986 HOMEBREW IN-AMP, G = 10 1kΩ 1kΩ 1/2 LT1013 1/2LT1013 9kΩ* 1kΩ* 1kΩ* 9kΩ* – + VIN *0.1% RESISTOR MATCH, 50ppm/°C TRACKING 00 77 7- 01 6 Figure 17. Make vs. Buy

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