Page 1
Page 2
Low Cost, 80 MHz
FastFET Op Amps
AD8033/AD8034
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2002–2008 Analog Devices, Inc. All rights reserved.
FEATURES
FET input amplifier
1 pA typical input bias current
Very low cost
High speed
80 MHz, −3 dB bandwidth (G = +1)
80 V/μs slew rate (G = +2)
Low noise
11 nV/√Hz (f = 100 kHz)
0.7 fA/√Hz (f = 100 kHz)
Wide supply voltage range: 5 V to 24 V
Low offset voltage: 1 mV typical
Single-supply and rail-to-rail output
High common-mode rejection ratio: −100 dB
Low power: 3.3 mA/amplifier typical supply current
No phase reversal
Small packaging: 8-lead SOIC, 8-lead SOT-23, and 5-lead SC70
APPLICATIONS
Instrumentation
Filters
Level shifting
Buffering
GENERAL DESCRIPTION
The AD8033/AD8034 FastFET™ amplifiers are voltage feedback
amplifiers with FET inputs, offering ease of use and excellent
performance. The AD8033 is a single amplifier and the AD8034
is a dual amplifier. The AD8033/AD8034 FastFET op amps in
Analog Devices, Inc., proprietary XFCB process offer significant
performance improvements over other low cost FET amps, such
as low noise (11 nV/√Hz and 0.7 fA/√Hz) and high speed (80 MHz
bandwidth and 80 V/μs slew rate).
With a wide supply voltage range from 5 V to 24 V and fully
operational on a single supply, the AD8033/AD8034 amplifiers
work in more applications than similarly priced FET input
amplifiers. In addition, the AD8033/AD8034 have rail-to-rail
outputs for added versatility.
Despite their low cost, the amplifiers provide excellent overall
performance. They offer a high common-mode rejection of
−100 dB, low input offset voltage of 2 mV maximum, and low
noise of 11 nV/√Hz.
CONNECTION DIAGRAMS
NC 1
–IN 2
+IN 3
–VS 4
NC8
+VS7
VOUT6
NC5
NC = NO CONNECT 02
9
24
-0
01
AD8033
VOUT 1
+IN 3
–VS 2
+VS5
–IN4
02
92
4-
00
2
AD8033
Figure 1. 8-Lead SOIC (R) Figure 2. 5-Lead SC70 (KS)
VOUT1 1
–IN1 2
+IN1 3
–VS 4
+VS8
VOUT27
–IN26
+IN25
0
29
24
-0
03
AD8034
Figure 3. 8-Lead SOIC (R) and 8-Lead SOT-23 (RJ)
1000.1 1
FREQUENCY (MHz)
21
18
–9
15
12
9
6
3
0
–3
–6
24
G
A
IN
(
d
B
)
G = +5
1000
G = +1
VOUT = 200mV p-p
G = +10
G = +2
G = –1
02
92
4-
0
0410
Figure 4. Small Signal Frequency Response
The AD8033/AD8034 amplifiers only draw 3.3 mA/amplifier of
quiescent current while having the capability of delivering up to
40 mA of load current.
The AD8033 is available in a small package 8-lead SOIC and a
small package 5-lead SC70. The AD8034 is also available in a
small package 8-lead SOIC and a small package 8-lead SOT-23.
They are rated to work over the industrial temperature range of
−40°C to +85°C without a premium over commercial grade
products.
Page 3
AD8033/AD8034
Rev. D | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Connection Diagrams ...................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 6
Maximum Power Dissipation ..................................................... 6
Output Short Circuit .................................................................... 6
ESD Caution .................................................................................. 6
Typical Performance Characteristics ............................................. 7
Test Circuits ..................................................................................... 14
Theory of Operation ...................................................................... 16
Output Stage Drive and Capacitive Load Drive ..................... 16
Input Overdrive .......................................................................... 16
Input Impedance ........................................................................ 16
Thermal Considerations ............................................................ 16
Layout, Grounding, and Bypassing Considerations .................. 18
Bypassing ..................................................................................... 18
Grounding ................................................................................... 18
Leakage Currents ........................................................................ 18
Input Capacitance ...................................................................... 18
Applications Information .............................................................. 19
High Speed Peak Detector ........................................................ 19
Active Filters ............................................................................... 20
Wideband Photodiode Preamp ................................................ 21
Outline Dimensions ....................................................................... 23
Ordering Guide .......................................................................... 24
REVISION HISTORY
9/08—Rev. C to Rev. D
Deleted Usable Input Range Parameter, Table 1 ........................... 3
Deleted Usable Input Range Parameter, Table 2 ........................... 4
Deleted Usable Input Range Parameter, Table 3 ........................... 5
4/08—Rev. B to Rev. C
Changes to Format ............................................................. Universal
Changes to Features and General Description ............................. 1
Changes to Figure 13 Caption and Figure 14 Caption ................ 8
Changes to Figure 22 and Figure 23 ............................................... 9
Changes to Figure 25 and Figure 28 ............................................. 10
Changes to Input Capacitance Section ........................................ 18
Changes to Active Filters Section ................................................. 21
Changes to Outline Dimensions ................................................... 23
Changes to Ordering Guide .......................................................... 24
2/03—Rev. A to Rev. B
Changes to Features .......................................................................... 1
Changes to Connection Diagrams ................................................. 1
Changes to Specifications ................................................................ 2
Changes to Absolute Maximum Ratings ....................................... 4
Replaced TPC 31............................................................................. 11
Changes to TPC 35 ......................................................................... 11
Changes to Test Circuit 3 ............................................................... 12
Updated Outline Dimensions ....................................................... 19
8/02—Rev. 0 to Rev. A
Added AD8033 ................................................................... Universal
VOUT = 2 V p-p Deleted from Default Conditions ......... Universal
Added SOIC-8 (R) and SC70 (KS) .................................................. 1
Edits to General Description Section ............................................. 1
Changes to Specifications ................................................................. 2
New Figure 2 ...................................................................................... 5
Edits to Maximum Power Dissipation Section .............................. 5
Changes to Ordering Guide ............................................................. 5
Change to TPC 3 ............................................................................... 6
Change to TPC 6 ............................................................................... 6
Change to TPC 9 ............................................................................... 7
New TPC 16 ....................................................................................... 8
New TPC 17 ....................................................................................... 8
New TPC 31 .................................................................................... 11
New TPC 35 .................................................................................... 11
New Test Circuit 9 .......................................................................... 13
SC70 (KS) Package Added ............................................................ 19
Page 4
AD8033/AD8034
Rev. D | Page 3 of 24
SPECIFICATIONS
TA = 25°C, VS = ±5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 1.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 65 80 MHz
G = +2, VOUT = 0.2 V p-p 30 MHz
G = +2, VOUT = 2 V p-p 21 MHz
Input Overdrive Recovery Time −6 V to +6 V input 135 ns
Output Overdrive Recovery Time −3 V to +3 V input, G = +2 135 ns
Slew Rate (25% to 75%) G = +2, VOUT = 4 V step 55 80 V/μs
Settling Time to 0.1% G = +2, VOUT = 2 V step 95 ns
G = +2, VOUT = 8 V step 225 ns
NOISE/HARMONIC PERFORMANCE
Distortion fC = 1 MHz, VOUT = 2 V p-p
Second Harmonic RL = 500 Ω −82 dBc
RL = 1 kΩ −85 dBc
Third Harmonic RL = 500 Ω −70 dBc
RL = 1 kΩ −81 dBc
Crosstalk, Output-to-Output f = 1 MHz, G = +2 −86 dB
Input Voltage Noise f = 100 kHz 11 nV/√Hz
Input Current Noise f = 100 kHz 0.7 fA/√Hz
DC PERFORMANCE
Input Offset Voltage VCM = 0 V 1 2 mV
TMIN − TMAX 3.5 mV
Input Offset Voltage Match 2.5 mV
Input Offset Voltage Drift 4 27 μV/°C
Input Bias Current 1.5 11 pA
TMIN − TMAX 50 pA
Open-Loop Gain VOUT = ± 3 V 89 92 dB
INPUT CHARACTERISTICS
Common-Mode Input Impedance 1000||2.3 GΩ||pF
Differential Input Impedance 1000||1.7 GΩ||pF
Input Common-Mode Voltage Range
FET Input Range −5.0 to +2.2 V
Common-Mode Rejection Ratio VCM = −3 V to +1.5 V −89 −100 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing ±4.75 ±4.95 V
Output Short-Circuit Current 40 mA
Capacitive Load Drive 30% overshoot, G = +1, VOUT = 400 mV p-p 35 pF
POWER SUPPLY
Operating Range 5 24 V
Quiescent Current per Amplifier 3.3 3.5 mA
Power Supply Rejection Ratio VS = ±2 V −90 −100 dB
Page 5
AD8033/AD8034
Rev. D | Page 4 of 24
TA = 25°C, VS = 5 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 70 80 MHz
G = +2, VOUT = 0.2 V p-p 32 MHz
G = +2, VOUT = 2 V p-p 21 MHz
Input Overdrive Recovery Time −3 V to +3 V input 180 ns
Output Overdrive Recovery Time −1.5 V to +1.5 V input, G = +2 200 ns
Slew Rate (25% to 75%) G = +2, VOUT = 4 V step 55 70 V/μs
Settling Time to 0.1% G = +2, VOUT = 2 V step 100 ns
NOISE/HARMONIC PERFORMANCE
Distortion fC = 1 MHz, VOUT = 2 V p-p
Second Harmonic RL = 500 Ω −80 dBc
RL = 1 kΩ −84 dBc
Third Harmonic RL = 500 Ω −70 dBc
RL = 1 kΩ −80 dBc
Crosstalk, Output to Output f = 1 MHz, G = +2 −86 dB
Input Voltage Noise f = 100 kHz 11 nV/√Hz
Input Current Noise f = 100 kHz 0.7 fA/√Hz
DC PERFORMANCE
Input Offset Voltage VCM = 0 V 1 2 mV
TMIN − TMAX 3.5 mV
Input Offset Voltage Match 2.5 mV
Input Offset Voltage Drift 4 30 μV/°C
Input Bias Current 1 10 pA
TMIN − TMAX 50 pA
Open-Loop Gain VOUT = 0 V to 3 V 87 92 dB
INPUT CHARACTERISTICS
Common-Mode Input Impedance 1000||2.3 GΩ||pF
Differential Input Impedance 1000||1.7 GΩ||pF
Input Common-Mode Voltage Range
FET Input Range 0 to 2.0 V
Common-Mode Rejection Ratio VCM = 1.0 V to 2.5 V −80 −100 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing RL = 1 kΩ 0.16 to 4.83 0.04 to 4.95 V
Output Short-Circuit Current 30 mA
Capacitive Load Drive 30% overshoot, G = +1, VOUT = 400 mV p-p 25 pF
POWER SUPPLY
Operating Range 5 24 V
Quiescent Current per Amplifier 3.3 3.5 mA
Power Supply Rejection Ratio VS = ±1 V −80 −100 dB
Page 6
AD8033/AD8034
Rev. D | Page 5 of 24
TA = 25°C, VS = ±12 V, RL = 1 kΩ, gain = +2, unless otherwise noted.
Table 3.
Parameter Conditions Min Typ Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth G = +1, VOUT = 0.2 V p-p 65 80 MHz
G = +2, VOUT = 0.2 V p-p 30 MHz
G = +2, VOUT = 2 V p-p 21 MHz
Input Overdrive Recovery Time −13 V to +13 V input 100 ns
Output Overdrive Recovery Time −6.5 V to +6.5 V input, G = +2 100 ns
Slew Rate (25% to 75%) G = +2, VOUT = 4 V step 55 80 V/μs
Settling Time to 0.1% G = +2, VOUT = 2 V step 90 ns
G = +2, VOUT = 10 V step 225 ns
NOISE/HARMONIC PERFORMANCE
Distortion fC = 1 MHz, VOUT = 2 V p-p
Second Harmonic RL = 500 Ω −80 dBc
RL = 1 kΩ −82 dBc
Third Harmonic RL = 500 Ω −70 dBc
RL = 1 kΩ −82 dBc
Crosstalk, Output to Output f = 1 MHz, G = +2 −86 dB
Input Voltage Noise f = 100 kHz 11 nV/√Hz
Input Current Noise f = 100 kHz 0.7 fA/√Hz
DC PERFORMANCE
Input Offset Voltage VCM = 0 V 1 2 mV
TMIN − TMAX 3.5 mV
Input Offset Voltage Match 2.5 mV
Input Offset Voltage Drift 4 24 μV/°C
Input Bias Current 2 12 pA
TMIN − TMAX 50 pA
Open-Loop Gain VOUT = ±8 V 88 96 dB
INPUT CHARACTERISTICS
Common-Mode Input Impedance 1000||2.3 GΩ||pF
Differential Input Impedance 1000||1.7 GΩ||pF
Input Common-Mode Voltage Range
FET Input Range −12.0 to +9.0 V
Common-Mode Rejection Ratio VCM = ±5 V −92 −100 dB
OUTPUT CHARACTERISTICS
Output Voltage Swing ±11.52 ±11.84 V
Output Short-Circuit Current 60 mA
Capacitive Load Drive 30% overshoot, G = +1 35 pF
POWER SUPPLY
Operating Range 5 24 V
Quiescent Current per Amplifier 3.3 3.5 mA
Power Supply Rejection Ratio VS = ±2 V −85 −100 dB
Page 7
AD8033/AD8034
Rev. D | Page 6 of 24
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage 26.4 V
Power Dissipation See Figure 5
If the rms signal levels are indeterminate, consider the worst case,
when VOUT = VS/4 for RL to midsupply
PD = (VS × IS) + (VS/4)2/RL
In single-supply operation with RL referenced to VS−, worst case
is VOUT = VS/2.
Common-Mode Input Voltage 26.4 V
Differential Input Voltage 1.4 V
Storage Temperature Range −65°C to +125°C
Operating Temperature Range −40°C to +85°C
Lead Temperature (Soldering 10 sec) 300°C
AMBIENT TEMPERATURE (°C)
–60 –20–40 10060 80
2.0
1.5
M
A
X
IM
U
M
P
O
W
E
R
D
IS
S
IP
A
T
IO
N
(
W
)
1.0
0.5
0
SOIC-8SOT-23-8
SC70-5
400 20
0
29
24
-0
0
5
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the AD8033/AD8034
packages is limited by the associated rise in junction temperature
(TJ) on the die. The plastic that encapsulates the die locally
reaches the junction temperature. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Even temporarily exceeding this temperature limit
can change the stresses that the package exerts on the die,
permanently shifting the parametric performance of the AD8033/
AD8034. Exceeding a junction temperature of 175°C for an
extended period can result in changes in silicon devices, potentially
causing failure.
Figure 5. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
Airflow increases heat dissipation, effectively reducing θJA. In
addition, more metal directly in contact with the package leads
from metal traces, through holes, ground, and power planes
reduces the θJA. Care must be taken to minimize parasitic
capacitances at the input leads of high speed op amps as discussed
in the Layout, Grounding, and Bypassing Considerations section.
Figure 5 shows the maximum power dissipation in the package
vs. the ambient temperature for the 8-lead SOIC (125°C/W),
5-lead SC70 (210°C/W), and 8-lead SOT-23 (160°C/W) packages
on a JEDEC standard 4-layer board. θJA values are approximations.
The still-air thermal properties of the package and PCB (θJA),
ambient temperature (TA), and the total power dissipated in the
package (PD) determine the junction temperature of the die.
The junction temperature can be calculated as
OUTPUT SHORT CIRCUIT
Shorting the output to ground or drawing excessive current for
the AD8033/AD8034 will likely cause catastrophic failure.
TJ = TA + (PD × θJA)
PD is the sum of the quiescent power dissipation and the power
dissipated in the package due to the load drive for all outputs.
The quiescent power is the voltage between the supply pins (VS)
times the quiescent current (IS). Assuming the load (RL) is
referenced to midsupply, the total drive power is VS/2 × IOUT,
some of which is dissipated in the package and some in the load
(VOUT × IOUT). The difference between the total drive power and
the load power is the drive power dissipated in the package
ESD CAUTION
PD = Quiescent Power + (Total Drive Power − Load Power)
PD = [VS × IS] + [(VS/2) × (VOUT/RL)] − [VOUT2/RL]
RMS output voltages should be considered. If RL is referenced
to −VS, as in single-supply operation, the total drive power is
VS × IOUT.
Page 8
AD8033/AD8034
Rev. D | Page 7 of 24
TYPICAL PERFORMANCE CHARACTERISTICS
Default conditions: VS = ±5 V, CL = 5 pF, RL = 1 kΩ, TA = 25°C.
1000.1 1
FREQUENCY (MHz)
21
18
–9
15
12
9
6
3
0
–3
–6
24
G
A
IN
(
d
B
)
G = +5
1000
G = +1
VOUT = 200mV p-p
G = +10
G = +2
G = –1
10
02
92
4-
0
06
Figure 6. Small Signal Frequency Response for Various Gains
FREQUENCY (MHz)
–6
1
0
–1
–2
–3
–4
–5
VS = +5V
G = +1
VOUT = 200mV p-p
G
A
IN
(
d
B
) VS = ±12V
VS = ±5V
1000.1 1 10
02
92
4-
00
7
Figure 7. Small Signal Frequency Response for Various Supplies
(See Figure 44)
FREQUENCY (MHz)
2
1
–6
1000.1 1
G
A
IN
(
d
B
)
10
0
–1
–5
–2
–3
–4
G = +1
VOUT = 2V p-p
VS = ±12V
VS = ±5V
VS = +5V
02
92
4-
0
08
Figure 8. Large Signal Frequency Response for Various Supplies
(See Figure 44)
FREQUENCY (MHz)
1000.1 1 10
8
7
0
6
5
1
4
3
2
G
A
IN
(
d
B
)
VOUT = 1V p-p
VOUT = 4V p-p
VOUT = 2V p-p
VOUT = 0.2V p-p
G = +2
02
92
4-
0
09
Figure 9. Frequency Response for Various Output Amplitudes (See Figure 45)
1000.1 1 10
FREQUENCY (MHz)
8
7
0
6
5
1
4
3
2
G
A
IN
(
d
B
)
VS = +5V
VS = ±12V
VS = ±5V
G = +2
VOUT = 200mV p-p
02
92
4-
01
0
Figure 10. Small Signal Frequency Response for Various Supplies
(See Figure 45)
1000.1 1 10
FREQUENCY (MHz)
7
G
A
IN
(
d
B
)
6
5
1
4
3
2
0
G = +2
VOUT = 2V p-p
VS = ±12V
VS = ±5V
VS = +5V
0
29
2
4-
0
11
Figure 11. Large Signal Frequency Response for Various Supplies
(See Figure 45)
Page 9
AD8033/AD8034
Rev. D | Page 8 of 24
FREQUENCY (MHz)
1000.1 1 10
8
6
4
–4
2
0
–2
–6
G
A
IN
(
d
B
)
CL = 100pF
CL = 100pF
RSNUB = 25Ω
CL = 33pF
CL = 2pF
VOUT = 200mV p-p
G = +1
02
92
4-
0
12
Figure 12. Small Signal Frequency Response for Various CL (See Figure 44)
1000.1 1 10
9
8
0
7
6
2
5
4
3
1
G
A
IN
(
d
B
)
FREQUENCY (MHz)
CF = 0pF
CF = 1pF
CF = 1.5pF
CF = 2pF
VOUT = 200mV p-p
RF = 3kΩ
G = +2
0
29
24
-0
13
Figure 13. Small Signal Frequency Response for Various CF (See Figure 45)
FREQUENCY (Hz)
0.1
IM
P
E
D
A
N
C
E
(
Ω
)
100
10
1
G = +2
G = +1
VOUT = 200mV p-p
0.01
100 1k 10k 100k 1M 10M 100M
0
29
24
-0
1
4
Figure 14. Output Impedance vs. Frequency (See Figure 47)
1000.1 1 10
FREQUENCY (MHz)
G
A
IN
(
d
B
)
10
9
0
8
7
6
5
4
3
2
1
CL = 100pF
CL = 51pF
CL = 33pF
CL = 2pF
VOUT = 200mV p-p
G = +2
0
29
24
-0
1
5
Figure 15. Small Signal Frequency Response for Various CL (See Figure 45)
FREQUENCY (MHz)
1000.1 1 10
8
7
0
G
A
IN
(
d
B
)
6
5
1
4
3
2
RL = 500Ω
RL = 1kΩ
VOUT = 200mV p-p
G = +2
0
29
24
-0
16
Figure 16. Small Signal Frequency Response for Various RL (See Figure 45)
FREQUENCY (Hz)
100 1k 10k 100k 1M 10M 100M
100
80
–20
G
A
IN
(
d
B
)
40
20
0
60
180
150
0
P
H
A
S
E
(
D
eg
re
es
)
90
60
30
120
GAIN
PHASE
VS = ±12V
02
92
4-
0
17
Figure 17. Open-Loop Response
Page 10
AD8033/AD8034
Rev. D | Page 9 of 24
FREQUENCY (MHz)
–40
–50
–120
510.1
D
IS
T
O
R
T
IO
N
(
d
B
c)
–60
–70
–110
–80
–90
–100
G = +2
HD2 RL = 500Ω
HD2 RL = 1kΩ
HD3 RL = 1kΩ
HD3 RL = 500Ω
0
29
24
-0
1
8
Figure 18. Harmonic Distortion vs. Frequency for Various Loads
(See Figure 45)
FREQUENCY (MHz)
–40
–50
–120
50.1 1
D
IS
T
O
R
T
IO
N
(
d
B
c)
–60
–70
–110
–80
–90
–100
G = +2
HD3 VS = 24V
HD2 VS = 24V
HD2 VS = 5V
HD3 VS = 5V
02
92
4-
0
19
Figure 19. Harmonic Distortion vs. Frequency for Various Supply Voltages
(See Figure 45)
FREQUENCY (Hz)
1000
10
M0110 100 1k 10k 100k 1M 100M
N
O
IS
E
(
n
V
/√
H
z)
100
02
92
4-
0
20
Figure 20. Voltage Noise vs. Frequency
FREQUENCY (MHz)
–40
–50
–120
50.1 1
D
IS
T
O
R
T
IO
N
(
d
B
c)
–60
–70
–110
–80
–90
–100
HD3 G = +2
HD2 G = +1
HD3 G = +1
HD2 G = +2
0
29
24
-0
2
1
Figure 21. Harmonic Distortion vs. Frequency for Various Gains
FREQUENCY (MHz)
–40
–50
–120
50.1 1
D
IS
T
O
R
T
IO
N
(
d
B
c) –60
–70
–110
–80
–90
–100
HD3 VOUT = 20V p-p
HD2 VOUT = 20V p-pHD3 VOUT = 10V p-p
HD2 VOUT = 10V p-p
HD3 VOUT = 2V p-p
HD2 VOUT = 2V p-p
–30
–20
02
92
4-
0
22
G = +2
Figure 22. Harmonic Distortion vs. Frequency for Various Amplitudes
(See Figure 45), VS = 24 V
CAPACITIVE LOAD (pF)
80
0
P
E
R
C
E
N
T
O
V
E
R
S
H
O
O
T
(
%
)
70
40
30
20
10
60
50
10 30 50 70 90 110
VS = +5V POSITIVE SIDE
VS = ±5V POSITIVE SIDE
VS = ±5V NEGATIVE SIDE
VS = +5V NEGATIVE SIDE
0
29
24
-0
2
3
G = +1
Figure 23. Percent Overshoot vs. Capacitive Load (See Figure 44)
