AD8512BRZ

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Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers Date Sheet AD8510/AD8512/AD8513 Rev. J Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2002–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Fast settling time: 500 ns to 0.1% Low offset voltage: 400 μV maximum Low TCVOS: 1 μV/°C typical Low input bias current: 25 pA typical at VS = ±15 V Dual-supply operation: ±5 V to ±15 V Low noise: 8 nV/√Hz typical at f = 1 kHz Low distortion: 0.0005% No phase reversal Unity gain stable APPLICATIONS Instrumentation Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio PIN CONFIGURATIONS AD8510 TOP VIEW (Not to Scale) NULL –IN +IN V– NC V+ OUT NULL 02 72 9- 00 3 NC = NO CONNECT 1 2 3 4 5 6 7 8 AD8510 TOP VIEW (Not to Scale) NULL –IN +IN V– NC V+ OUT NULL 02 72 9- 00 4 NC = NO CONNECT 1 2 3 4 5 6 7 8 Figure 1. 8-Lead MSOP (RM Suffix) Figure 2. 8-Lead SOIC_N (R Suffix) AD8512 OUT A –IN A +IN A V– V+ OUT B –IN B +IN B TOP VIEW (Not to Scale) 02 72 9- 00 1 1 2 3 4 5 6 7 8 AD8512 TOP VIEW (Not to Scale) OUT A –IN A +IN A V– V+ OUT B –IN B +IN B 02 72 9- 00 2 1 2 3 4 5 6 7 8 Figure 3. 8-Lead MSOP (RM Suffix) Figure 4. 8-Lead SOIC_N (R Suffix) AD8513 TOP VIEW (Not to Scale) OUT A 1 –IN A 2 +IN A 3 V+ 4 +IN B 5 OUT D –IN D +IN D V– +IN C 14 13 12 11 10 –IN B 6 OUT B 7 –IN C OUT C 9 8 02 72 9- 00 5 AD8513 TOP VIEW (Not to Scale) OUT A –IN A +IN A V+ +IN B OUT D –IN D +IN D V– +IN C –IN B OUT B –IN C OUT C 02 72 9- 00 6 1 2 3 4 5 14 13 12 11 10 6 7 9 8 Figure 5. 14-Lead SOIC_N (R Suffix) Figure 6. 14-Lead TSSOP (RU Suffix) GENERAL DESCRIPTION The AD8510/AD8512/AD8513 are single-, dual-, and quad- precision JFET amplifiers that feature low offset voltage, input bias current, input voltage noise, and input current noise. The combination of low offsets, low noise, and very low input bias currents makes these amplifiers especially suitable for high impedance sensor amplification and precise current measurements using shunts. The combination of dc precision, low noise, and fast settling time results in superior accuracy in medical instruments, electronic measurement, and automated test equipment. Unlike many competitive amplifiers, the AD8510/ AD8512/AD8513 maintain their fast settling performance even with substantial capacitive loads. Unlike many older JFET amplifiers, the AD8510/AD8512/AD8513 do not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. Fast slew rate and great stability with capacitive loads make the AD8510/AD8512/AD8513 a perfect fit for high performance filters. Low input bias currents, low offset, and low noise result in a wide dynamic range of photodiode amplifier circuits. Low noise and distortion, high output current, and excellent speed make the AD8510/AD8512/AD8513 great choices for audio applications. The AD8510/AD8512 are both available in 8-lead narrow SOIC_N and 8-lead MSOP packages. MSOP-packaged parts are only available in tape and reel. The AD8513 is available in 14-lead SOIC_N and TSSOP packages. The AD8510/AD8512/AD8513 are specified over the −40°C to +125°C extended industrial temperature range.

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AD8510/AD8512/AD8513 Date Sheet Rev. J | Page 2 of 20 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configurations ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Electrical Characteristics ............................................................. 4 Absolute Maximum Ratings ............................................................ 6 ESD Caution .................................................................................. 6 Typical Performance Characteristics ............................................. 7 General Application Information ................................................. 13 Input Overvoltage Protection ................................................... 13 Output Phase Reversal ............................................................... 13 Total Harmonic Distortion (THD) + Noise .............................. 13 Total Noise Including Source Resistors ................................... 13 Settling Time ............................................................................... 14 Overload Recovery Time .......................................................... 14 Capacitive Load Drive ............................................................... 14 Open-Loop Gain and Phase Response .................................... 15 Precision Rectifiers..................................................................... 16 I-V Conversion Applications .................................................... 17 Outline Dimensions ....................................................................... 19 Ordering Guide .......................................................................... 20 REVISION HISTORY 6/2017—Rev. I to Rev. J Changes to Figure 14 Caption ......................................................... 8 Deleted Figure 39; Renumbered Sequentially............................. 12 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 20 2/2009—Rev. H to Rev. I Changes to Figure 25 ...................................................................... 10 Changes to Ordering Guide .......................................................... 20 10/2007—Rev. G to Rev. H Changes to Crosstalk Section ........................................................ 18 Added Figure 58 .............................................................................. 18 6/2007—Rev. F to Rev. G Changes to Figure 1 and Figure 2 ................................................... 1 Changes to Table 1 and Table 2 ....................................................... 3 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 20 6/2006—Rev. E to Rev. F Changes to Figure 23 ........................................................................ 9 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 20 6/2004—Rev. D to Rev. E Changes to Format ............................................................. Universal Changes to Specifications ................................................................ 3 Updated Outline Dimensions ....................................................... 19 10/2003—Rev. C to Rev. D Added AD8513 Model ....................................................... Universal Changes to Specifications ................................................................ 3 Added Figure 36 through Figure 40 ............................................. 10 Added Figure 55 and Figure 57 .................................................... 17 Changes to Ordering Guide .......................................................... 20 9/2003—Rev. B to Rev. C Changes to Ordering Guide ............................................................ 4 Updated Figure 2 ............................................................................ 10 Changes to Input Overvoltage Protection Section .................... 10 Changes to Figure 10 and Figure 11 ............................................ 12 Changes to Photodiode Circuits Section..................................... 13 Changes to Figure 13 and Figure 14 ............................................ 13 Deleted Precision Current Monitoring Section ......................... 14 Updated Outline Dimensions ....................................................... 15 3/2003—Rev. A to Rev. B Updated Figure 5 ............................................................................ 11 Updated Outline Dimensions ....................................................... 15 8/2002—Rev. 0 to Rev. A Added AD8510 Model ....................................................... Universal Added Pin Configurations ............................................................... 1 Changes to Specifications ................................................................. 2 Changes to Ordering Guide ............................................................. 4 Changes to TPC 2 and TPC 3 .......................................................... 5 Added TPC 10 and TPC 12 .............................................................. 6 Replaced TPC 20 ............................................................................... 8 Replaced TPC 27 ............................................................................... 9 Changes to General Application Information Section .............. 10 Changes to Figure 5 ........................................................................ 11 Changes to I-V Conversion Applications Section ..................... 13 Changes to Figure 13 and Figure 14 ............................................ 13 Changes to Figure 17 ...................................................................... 14

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Date Sheet AD8510/AD8512/AD8513 Rev. J | Page 3 of 20 SPECIFICATIONS @ VS = ±5 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (B Grade)1 VOS 0.08 0.4 mV −40°C < TA < +125°C 0.8 mV Offset Voltage (A Grade) VOS 0.1 0.9 mV −40°C < TA < +125°C 1.8 mV Input Bias Current IB 21 75 pA −40°C < TA < +85°C 0.7 nA −40°C < TA < +125°C 7.5 nA Input Offset Current IOS 5 50 pA −40°C < TA < +85°C 0.3 nA −40°C < TA < +125°C 0.5 nA Input Capacitance Differential 12.5 pF Common Mode 11.5 pF Input Voltage Range −2.0 +2.5 V Common-Mode Rejection Ratio CMRR VCM = −2.0 V to +2.5 V 86 100 dB Large-Signal Voltage Gain AVO RL = 2 kΩ, VO = −3 V to +3 V 65 107 V/mV Offset Voltage Drift (B Grade)1 ΔVOS/ΔT 0.9 5 µV/°C Offset Voltage Drift (A Grade) ΔVOS/ΔT 1.7 12 µV/°C OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 10 kΩ 4.1 4.3 V Output Voltage Low VOL RL = 10 kΩ, −40°C < TA < +125°C −4.9 −4.7 V Output Voltage High VOH RL = 2 kΩ 3.9 4.2 V Output Voltage Low VOL RL = 2 kΩ, −40°C < TA < +125°C −4.9 −4.5 V Output Voltage High VOH RL = 600 Ω 3.7 4.1 V Output Voltage Low VOL RL = 600 Ω, −40°C < TA < +125°C −4.8 −4.2 V Output Current IOUT ±40 ±54 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±4.5 V to ±18 V 86 130 dB Supply Current/Amplifier ISY AD8510/AD8512/AD8513 VO = 0 V 2.0 2.3 mA AD8510/AD8512 −40°C < TA < +125°C 2.5 mA AD8513 −40°C < TA < +125°C 2.75 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kΩ 20 V/µs Gain Bandwidth Product GBP 8 MHz Settling Time tS To 0.1%, 0 V to 4 V step, G = +1 0.4 µs Total Harmonic Distortion (THD) + Noise THD + N 1 kHz, G = +1, RL = 2 kΩ 0.0005 % Phase Margin φM 44.5 Degrees NOISE PERFORMANCE Voltage Noise Density en f = 10 Hz 34 nV/√Hz f = 100 Hz 12 nV/√Hz f = 1 kHz 8.0 10 nV/√Hz f = 10 kHz 7.6 nV/√Hz Peak-to-Peak Voltage Noise en p-p 0.1 Hz to 10 Hz bandwidth 2.4 5.2 µV p-p 1 AD8510/AD8512 only.

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AD8510/AD8512/AD8513 Date Sheet Rev. J | Page 4 of 20 ELECTRICAL CHARACTERISTICS @ VS = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (B Grade)1 VOS 0.08 0.4 mV −40°C < TA < +125°C 0.8 mV Offset Voltage (A Grade) VOS 0.1 1.0 mV −40°C < TA < +125°C 1.8 mV Input Bias Current IB 25 80 pA −40°C < TA < +85°C 0.7 nA −40°C < TA < +125°C 10 nA Input Offset Current IOS 6 75 pA −40°C < TA < +85°C 0.3 nA −40°C < TA < +125°C 0.5 nA Input Capacitance Differential 12.5 pF Common Mode 11.5 pF Input Voltage Range −13.5 +13.0 V Common-Mode Rejection Ratio CMRR VCM = −12.5 V to +12.5 V 86 108 dB Large-Signal Voltage Gain AVO RL = 2 kΩ, VCM = 0 V, VO = −13.5 V to +13.5 V 115 196 V/mV Offset Voltage Drift (B Grade)1 ΔVOS/ΔT 1.0 5 µV/°C Offset Voltage Drift (A Grade) ΔVOS/ΔT 1.7 12 µV/°C OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 10 kΩ +14.0 +14.2 V Output Voltage Low VOL RL = 10 kΩ, −40°C < TA < +125°C −14.9 −14.6 V Output Voltage High VOH RL = 2 kΩ +13.8 +14.1 V Output Voltage Low VOL RL = 2 kΩ, −40°C < TA < +125°C –14.8 −14.5 V Output Voltage High VOH RL = 600 Ω +13.5 +13.9 V RL = 600 Ω, −40°C < TA < +125°C +11.4 V Output Voltage Low VOL RL = 600 Ω −14.3 −13.8 V RL = 600 Ω, −40°C < TA < +125°C −12.1 V Output Current IOUT ±70 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±4.5 V to ±18 V 86 dB Supply Current/Amplifier ISY AD8510/AD8512/AD8513 VO = 0 V 2.2 2.5 mA AD8510/AD8512 −40°C < TA < +125°C 2.6 mA AD8513 −40°C < TA < +125°C 3.0 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kΩ 20 V/µs Gain Bandwidth Product GBP 8 MHz Settling Time tS To 0.1%, 0 V to 10 V step, G = +1 0.5 µs To 0.01%, 0 V to 10 V step, G = +1 0.9 µs Total Harmonic Distortion (THD) + Noise THD + N 1 kHz, G = +1, RL = 2 kΩ 0.0005 % Phase Margin φM 52 Degrees

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Date Sheet AD8510/AD8512/AD8513 Rev. J | Page 5 of 20 Parameter Symbol Conditions Min Typ Max Unit NOISE PERFORMANCE Voltage Noise Density en f = 10 Hz 34 nV/√Hz f = 100 Hz 12 nV/√Hz f = 1 kHz 8.0 10 nV/√Hz f = 10 kHz 7.6 nV/√Hz Peak-to-Peak Voltage Noise en p-p 0.1 Hz to 10 Hz bandwidth 2.4 5.2 µV p-p 1 AD8510/AD8512 only.

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AD8510/AD8512/AD8513 Date Sheet Rev. J | Page 6 of 20 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage ±18 V Input Voltage ±VS Output Short-Circuit Duration to GND Observe derating curves Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C Electrostatic Discharge (Human Body Model) 2000 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Table 4. Thermal Resistance Package Type θJA1 θJC Unit 8-Lead MSOP (RM) 210 45 °C/W 8-Lead SOIC_N (R) 158 43 °C/W 14-Lead SOIC_N (R) 120 36 °C/W 14-Lead TSSOP (RU) 180 35 °C/W 1 θJA is specified for worst-case conditions, that is, θJA is specified for device soldered in circuit board for surface-mount packages. ESD CAUTION

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Date Sheet AD8510/AD8512/AD8513 Rev. J | Page 7 of 20 TYPICAL PERFORMANCE CHARACTERISTICS INPUT OFFSET VOLTAGE (mV) N U M B E R O F A M P L IF IE R S –0.5 0 20 40 60 –0.4 –0.3 80 100 120 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 VSY = ±15V TA = 25°C 02 72 9- 00 7 Figure 7. Input Offset Voltage Distribution TCVOS (µV/°C) N U M B E R O F A M P L IF IE R S 0 0 5 10 15 1 20 25 30 2 3 4 5 6 02 72 9- 00 8 VSY = ±15V B GRADE Figure 8. AD8510/AD8512 TCVOS Distribution TCVOS (µV/°C) N U M B E R O F A M P L IF IE R S 0 0 5 10 15 1 20 25 30 2 3 4 5 6 02 72 9- 00 9 VSY = ±15V A GRADE Figure 9. AD8510/AD8512 TCVOS Distribution TEMPERATURE (°C) IN P U T B IA S C U R R E N T ( p A ) –40 1 10 100 1k –25 10k 100k –10 5 20 35 50 65 80 95 110 125 02 72 9- 01 0 VSY = ±5V, ±15V Figure 10. Input Bias Current vs. Temperature TEMPERATURE (°C) IN P U T O F F S E T C U R R E N T ( p A ) –40 0.1 1 10 100 –25 1000 –10 5 20 35 50 65 80 95 110 125 ±15V ±5V 02 72 9- 01 1 Figure 11. Input Offset Current vs. Temperature SUPPLY VOLTAGE (V+ – V– ) IN P U T B IA S C U R R E N T ( p A ) 8 0 5 10 15 13 20 25 30 18 23 28 30 35 40 TA = 25°C 02 72 9- 01 2 Figure 12. Input Bias Current vs. Supply Voltage

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AD8510/AD8512/AD8513 Date Sheet Rev. J | Page 8 of 20 SUPPLY VOLTAGE (V+ – V–) S U P P LY C U R R E N T P E R A M P L IF IE R ( m A ) 8 1.0 1.1 1.2 13 1.3 1.4 1.6 18 23 28 30 1.7 1.8 1.5 1.9 2.0 TA = 25°C 02 72 9- 01 3 Figure 13. AD8512 Supply Current per Amplifier vs. Supply Voltage LOAD CURRENT (mA) O U T P U T V O LT A G E ( V ) 0 0 2 4 10 6 8 12 20 30 40 50 14 16 10 60 70 80 VOL VOH VSY = ±15V VSY = ±5V VOH VOL 02 72 9- 03 9 Figure 14. Output Voltage vs. Load Current TEMPERATURE (°C) S U P P LY C U R R E N T P E R A M P L IF IE R ( m A ) –40 1.00 1.25 1.50 1.75 –10 2.00 2.25 2.50 5 20 65 80 110–25 35 50 95 125 ±15V ±5V 02 72 9- 01 5 Figure 15. AD8512 Supply Current per Amplifier vs. Temperature SUPPLY VOLTAGE (V+ – V–) S U P P LY C U R R E N T ( m A ) 8 1.0 1.2 1.4 13 1.6 1.8 2.2 18 23 28 33 2.4 2.6 2.0 2.8 TA = 25°C 02 72 9- 01 6 Figure 16. AD8510 Supply Current vs. Supply Voltage FREQUENCY (Hz) G A IN ( d B ) 10k –30 –20 –10 100k 0 10 30 1M 10M 50M 40 50 20 60 70 –135 –90 –45 0 45 90 135 180 225 270 315 P H A S E ( D eg re es ) VSY = ±15V RL = 2.5kΩ CSCOPE = 20pF ΦM = 52° 02 72 9- 01 7 Figure 17. Open-Loop Gain and Phase vs. Frequency TEMPERATURE (°C) S U P P LY C U R R E N T ( m A ) –40 1.00 1.25 1.50 1.75 –10 2.00 2.25 2.50 5 20 65 80 110–25 35 50 95 125 ±15V ±5V 02 72 9- 01 8 Figure 18. AD8510 Supply Current vs. Temperature

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Date Sheet AD8510/AD8512/AD8513 Rev. J | Page 9 of 20 FREQUENCY (Hz) C L O S E D -L O O P G A IN ( d B ) 1k –30 –20 –10 10k 0 10 30 1M 10M 50M 40 50 20 60 70 100k 02 72 9- 01 9 VSY = ±15V, ±5V AV = 100 AV = 1 AV = 10 Figure 19. Closed-Loop Gain vs. Frequency FREQUENCY (Hz) C M R R ( d B ) 100 1k 0 40 10k 10M 100M 60 80 20 100 120 100k 1M VSY = ±15V 02 72 9- 02 0 Figure 20. CMRR vs. Frequency FREQUENCY (Hz) P S R R ( d B ) 100 1k 0 40 10k 10M 100M 60 80 20 100 120 100k 1M –20 –PSRR +PSRR VSY = ±5V, ±15V 02 72 9- 02 1 Figure 21. PSRR vs. Frequency FREQUENCY (Hz) O U T P U T I M P E D A N C E ( Ω ) 100 1k 0 90 10k 10M 100M 150 180 60 270 300 100k 1M 30 120 210 240 AV = 1 AV = 100 AV = 10 VSY = ±15V VIN = 50mV 02 72 9- 02 2 Figure 22. Output Impedance vs. Frequency FREQUENCY (Hz) 1 10 100 1k 1 1k 100 10 10k V O L T A G E N O IS E D E N S IT Y ( n V / H z) VSY = ±5V TO ±15V 02 72 9- 02 3 Figure 23. Voltage Noise Density vs. Frequency TIME (1s/DIV) V O LT A G E ( 1µ V /D IV ) VSY = ±15V 02 72 9- 02 4 Figure 24. 0.1 Hz to 10 Hz Input Voltage Noise