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ADM485EARZ

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ADM485EARZ

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Part Number ADM485EARZ
Manufacturer Analog Devices Inc.
Description IC TXRX HALF DUP RS485/422 8SOIC
Datasheet ADM485EARZ Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 39,412 piece(s)
Unit Price $ 2.8900 *
Lead Time Can Ship Immediately
Estimated Delivery Time Aug 11 - Aug 16 (Choose Expedited Shipping)
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Part Number # ADM485EARZ (Interface - Drivers, Receivers, Transceivers) is manufactured by Analog Devices Inc. and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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ADM485EARZ Specifications

ManufacturerAnalog Devices Inc.
CategoryIntegrated Circuits (ICs) - Interface - Drivers, Receivers, Transceivers
Datasheet ADM485EARZDatasheet
Package8-SOIC (0.154", 3.90mm Width)
Series-
TypeTransceiver
ProtocolRS422, RS485
Number of Drivers/Receivers1/1
DuplexHalf
Receiver Hysteresis70mV
Data Rate2.5Mbps
Voltage - Supply4.75 V ~ 5.25 V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mount
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SOIC

ADM485EARZ Datasheet

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5 V, ±15 kV ESD Protected Half-Duplex, RS-485/RS-422 Transceivers ADM485E/ADM487E/ADM1487E Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007–2010 Analog Devices, Inc. All rights reserved. FEATURES TIA/EIA RS-485/RS-422 compliant ESD protection on RS-485 I/O pins ±15 kV human body model (HBM) Data rates ADM487E: 250 kbps ADM485E/ADM1487E: 2.5 Mbps Half-duplex Reduced slew rates for low EMI Common-mode input range: −7 V to +12 V Thermal shutdown and short-circuit protection 8-lead SOIC packages ADM487EW qualified for automotive applications APPLICATIONS Energy/power metering Lighting systems Industrial control Telecommunications Security systems Instrumentation FUNCTIONAL BLOCK DIAGRAM B A R D RO RE DE DI GND VCC ADM485E/ ADM487E/ ADM1487E 0 63 56 -0 01 Figure 1. GENERAL DESCRIPTION The ADM485E/ADM487E/ADM1487E are 5 V, low power data transceivers with ±15 kV ESD protection suitable for half- duplex communication on multipoint bus transmission lines. They are designed for balanced data transmission and comply with Telecommunication Industry Association/Electronics Industries Association (TIA/EIA) standards RS-485 and RS-422. The ADM487E and ADM1487E have a 1/4 unit load receiver input impedance that allows up to 128 transceivers on a bus, whereas the ADM485E allows up to 32 transceivers on a bus. Because only one driver is enabled at any time, the output of a disabled or power-down driver is three-stated to avoid overloading the bus. The driver outputs are slew rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or output shorting is prevented with a thermal shutdown circuit. The parts are fully specified over the industrial temperature ranges and are available in 8-lead SOIC packages. Table 1. Selection Table Part Number Half-/Full- Duplex Guaranteed Data Rate (Mbps) Slew Rate Limited Low Power Shutdown Driver/Receiver Enable Quiescent Current (μA) Number of Nodes on Bus Pin Count ADM485E Half 2.5 No No Yes 300 32 8 ADM487E Half 0.25 Yes Yes Yes 120 128 8 ADM1487E Half 2.5 No No Yes 230 128 8

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ADM485E/ADM487E/ADM1487E Rev. B | Page 2 of 16 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 4 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ..............................................8 Test Circuits and Switching Characteristics................................ 11 Theory of Operation ...................................................................... 13 Circuit Description .................................................................... 13 Applications Information .............................................................. 15 Differential Data Transmission ................................................ 15 Cable and Data Rate................................................................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16 Automotive Products ................................................................. 16 REVISION HISTORY 10/10—Rev. A to Rev. B Added ADM487EW Qualified for Automotive Applications to Features Section ................................................................................ 1 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 16 Added Automotive Products Section .......................................... 16 3/08—Rev. 0 to Rev. A Changes to Supply Voltage Range ....................................Universal Added Endnote 1 .............................................................................. 3 Changes to Table 3............................................................................ 4 Changes to Table 4............................................................................ 5 Changes to Figure 12........................................................................ 9 Changes to Figure 27 and Table 9................................................. 14 Changes to Figure 29...................................................................... 15 Updated Outline Dimensions ....................................................... 16 1/07—Revision 0: Initial Version

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ADM485E/ADM487E/ADM1487E Rev. B | Page 3 of 16 SPECIFICATIONS VCC = 5 V ± 10%, TA = TMIN to TMAX, unless otherwise noted. Table 2. ADM485E/ADM487E/ADM1487E Parameter Symbol Min Typ Max Unit Test Conditions/Comments DRIVER Differential Outputs Differential Output Voltage (No Load) VOD1 5 V VOD2 2 V RL = 50 Ω (RS-422) Differential Output Voltage (with Load) 1.5 5 V RL = 27 Ω (RS-485) (see Figure 18) Δ |VOD| for Complementary Output States 0.2 V RL = 27 Ω or 50 Ω (see Figure 18) Common-Mode Output Voltage VOC 3 V RL = 27 Ω or 50 Ω (see Figure 18) Δ |VOC| for Complementary Output States 0.2 V RL = 27 Ω or 50 Ω (see Figure 18) Logic Inputs Input High Voltage VIH 2.0 V DE, DI, RE Input Low Voltage VIL 0.8 V DE, DI, RE Logic Input Current1 IIN1 ±2 μA DE, DI, RE RECEIVER IIN2 1.0 mA DE = 0 V, VIN = 12 V −0.8 mA VCC = 0 V or 5.25 V, VIN = −7 V (ADM485E) 0.25 mA DE = 0 V, VIN = 12 V Input Current (A, B) −0.2 mA VCC = 0 V or 5.25 V, VIN = −7 V (ADM487E/ADM1487E) Differential Inputs Differential Input Threshold Voltage VTH −0.2 +0.2 V −7 V < VCM < +12 V Input Hysteresis ΔVTH 70 mV VCM = 0 V Receiver Output Logic Output Voltage High VOH 3.5 V IOUT = −4 mA, VID = +200 mV Output Voltage Low VOL 0.4 V IOUT = +4 mA, VID = −200 mV Three-State Output Leakage Current IOZR ±1 μA 0.4 V < VO < 2.4 V RIN 12 kΩ −7 V < VCM < +12 V (ADM485E) Receiver Input Resistance 48 kΩ −7 V < VCM < +12 V (ADM487E/ADM1487E) POWER SUPPLY ICC 500 900 μA RE = 0 V or VCC, DE = VCC (ADM485E) 300 500 μA RE = 0 V or VCC, DE = 0 V (ADM485E) 300 500 μA RE = 0 V or VCC, DE = VCC (ADM1487E) 230 400 μA RE = 0 V or VCC, DE = 0 V (ADM1487E) 250 400 μA RE = 0 V or VCC, DE = VCC (ADM487E) No Load Supply Current 120 250 μA RE = 0 V, DE = 0 V (ADM487E) Supply Current in Shutdown ISHDN 0.5 10 μA DE = 0 V, RE = VCC (ADM487E) Driver Short-Circuit Current, VO High IOSD1 35 250 mA −7 V ≤ VO ≤ +12 V, applies to peak current Driver Short-Circuit Current, VO Low IOSD2 35 250 mA −7 V ≤ VO ≤ +12 V, applies to peak current Receiver Short-Circuit Current IOSR 7 95 mA 0 V ≤ VO ≤ VCC ESD PROTECTION A, B ±15 kV Human body model 1 Supply voltage is 5 V ± 5%.

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ADM485E/ADM487E/ADM1487E Rev. B | Page 4 of 16 TIMING SPECIFICATIONS VCC = 5 V ± 10%, TA = TMIN to TMAX, unless otherwise noted. Table 3. ADM485E/ADM1487E Parameter Symbol Min Typ Max Unit Test Conditions/Comments DRIVER Driver Propagation Delay Input to Output, Low to High tDPLH 10 40 60 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Driver Propagation Delay Input to Output, High to Low tDPHL 10 40 60 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Output Skew to Output tSKEW 5 10 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Rise/Fall Time tDR, tDF 3 20 40 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Enable Time to High Level tDZH 45 70 ns CL = 100 pF, S1 closed (see Figure 21) Enable Time to Low Level tDZL 45 70 ns CL = 100 pF, S1 closed (see Figure 22) Disable Time from Low Level tDLZ 45 70 ns CL = 15 pF, S1 closed (see Figure 22) Disable Time from High Level tDHZ 45 70 ns CL = 15 pF, S1 closed (see Figure 21) RECEIVER Receiver Propagation Delay Input to Output, Low to High tRPLH 20 60 200 ns See Figure 23 and Figure 24 Receiver Propagation Delay Input to Output, High to Low tRPHL 20 60 200 ns See Figure 23 and Figure 24 |tPLH − tPHL| Differential Receiver Skew tSKEW 5 ns See Figure 23 and Figure 24 Enable Time to Low Level tRZL 25 50 ns CL = 15 pF, S2 closed (see Figure 25) Enable Time to High Level tRZH 20 50 ns CL = 15 pF, S1 closed (see Figure 25) Disable Time from Low Level tRLZ 20 50 ns CL = 15 pF, S2 closed (see Figure 25) Disable Time from High Level tRHZ 20 50 ns tPLH, tPHL < 50% of data period MAXIMUM DATA RATE fMAX 2.5 Mbps

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ADM485E/ADM487E/ADM1487E Rev. B | Page 5 of 16 VCC = 5 V ± 10%, TA = TMIN to TMAX, unless otherwise noted. Table 4. ADM487E Parameter Symbol Min Typ Max Unit Test Conditions/Comments DRIVER Driver Propagation Delay Input to Output, Low to High tDPLH 250 800 2000 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Driver Propagation Delay Input to Output, High to Low tDPHL 250 800 2000 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Output Skew to Output tSKEW 250 20 800 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Rise/Fall Time tDR, tDF 250 2000 ns RDIFF = 54 Ω, CL1 = CL2 = 100 pF (see Figure 19 and Figure 20) Enable Time to High Level tDZH 250 2000 ns CL = 100 pF, S1 closed (see Figure 21) Enable Time to Low Level tDZL 2000 ns CL = 100 pF, S1 closed (see Figure 22) Disable Time from Low Level tDLZ 300 3000 ns CL = 15 pF, S1 closed (see Figure 22) Disable Time from High Level tDHZ 300 3000 ns CL = 15 pF, S1 closed (see Figure 21) RECEIVER Receiver Propagation Delay Input to Output, Low to High tRPLH 250 2000 ns See Figure 23 and Figure 24 Receiver Propagation Delay Input to Output, High to Low tRPHL 250 2000 ns See Figure 23 and Figure 24 |tPLH − tPHL| Differential Receiver Skew tSKEW 100 ns See Figure 23 and Figure 24 Enable Time to Low Level tRZL 25 50 ns CL = 15 pF, S2 closed (see Figure 25) Enable Time to High Level tRZH 25 50 ns CL = 15 pF, S1 closed (see Figure 25) Disable Time from Low Level tRLZ 25 50 ns CL = 15 pF, S2 closed (see Figure 25) Disable Time from High Level tRHZ 25 50 ns tPLH, tPHL < 50% of data period Maximum Data Rate fMAX 250 kbps Time to Shutdown1 tSHDN 50 200 600 ns Driver Enable from Shutdown to Output High tDZH(SHDN) 5000 ns CL = 100 pF, S1 closed (see Figure 21) Driver Enable from Shutdown to Output Low tDZL(SHDN) 5000 ns CL = 100 pF, S1 closed (see Figure 22) Receiver Enable from Shutdown to Output High tRZH(SHDN) 5000 ns CL = 15 pF, S2 closed (see Figure 25) Receiver Enable from Shutdown to Output Low tRZL(SHDN) 5000 ns CL = 15 pF, S1 closed (see Figure 25) 1 The ADM487E is put into shutdown mode by bringing RE high and DE low. If the inputs are in this state for less than 50 ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600 ns, the ADM487E is guaranteed to enter shutdown.

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ADM485E/ADM487E/ADM1487E Rev. B | Page 6 of 16 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. Table 5. Parameter Rating VCC to GND −0.5 V to +6 V Digital I/O Voltage (DE, RE) −0.5 V to (VCC + 0.5 V) Driver Input Voltage (DI) −0.5 V to (VCC + 0.5 V) Receiver Output Voltage (RO) −0.5 V to (VCC + 0.5 V) Driver Output/Receiver Input Voltage (A, B) −9 V to +14 V Operating Temperature Range −40°C to +85°C Storage Temperature Range −65°C to +150°C θJA Thermal Impedance, 8-Lead SOIC 158°C/W Lead Temperature, Soldering (10 sec) 260°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ESD CAUTION

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ADM485E/ADM487E/ADM1487E Rev. B | Page 7 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADM485E/ ADM487E/ ADM1487E TOP VIEW (Not to Scale) RO 1 RE 2 DE 3 DI 4 VCC8 B7 A6 GND5 06 35 6- 00 2 Figure 2. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 RO Receiver Output. When enabled, if A > B by 200 mV, then RO = high. If A < B by 200 mV, then RO = low. 2 RE Receiver Output Enable. A low level enables the RO; a high level places it in a high impedance state. 3 DE Driver Output Enable. A high level enables the driver differential outputs, Pin A and Pin B; a low level places the driver in a high impedance state. 4 DI Driver Input. When the driver is enabled, a logic low on DI forces Pin A low and Pin B high; a logic high on DI forces Pin A high and Pin B low. 5 GND Ground Connection (0 V). 6 A Noninverting Receiver Input A/Driver Output A. 7 B Inverting Receiver Input B/Driver Output B. 8 VCC Power Supply (5 V ± 10%).

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ADM485E/ADM487E/ADM1487E Rev. B | Page 8 of 16 TYPICAL PERFORMANCE CHARACTERISTICS 0 0.5 1.0 1.5 2.0 2.5 06 35 6- 01 6 O U T P U T C U R R E N T ( m A ) OUTPUT LOW VOLTAGE (V) 0 5 10 15 20 25 30 35 40 45 50 Figure 3. Output Current vs. Receiver Output Low Voltage 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 63 56 -0 1 7 O U T P U T C U R R E N T ( m A ) OUTPUT HIGH VOLTAGE (V) 0 –5 –10 –15 –20 –25 –30 Figure 4. Output Current vs. Receiver Output High Voltage –40 –20 0 20 40 60 80 06 35 6- 01 8 O U T P U T H IG H V O L T A G E ( V ) TEMPERATURE (°C) 3.9 4.0 4.1 4.2 4.3 4.4 4.5 IRO = –8mA Figure 5. Receiver Output High Voltage vs. Temperature –40 –20 0 20 40 60 80 0 63 56 -0 1 9 O U T P U T L O W V O L T A G E ( V ) TEMPERATURE (°C) 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 IRO = 8mA Figure 6. Receiver Output Low Voltage vs. Temperature 0 63 56 -0 2 0 O U T P U T C U R R E N T ( m A ) DIFFERENTIAL OUTPUT VOLTAGE (V) 0 5 10 15 20 25 30 35 40 45 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Figure 7. Driver Output Current vs. Differential Output Voltage 0 63 56 -0 21D IF F E R E N T IA L O U T P U T V O L T A G E ( V ) TEMPERATURE (°C) 1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2 2.3 –40 –20 0 20 40 60 80 Figure 8. Driver Differential Output Voltage vs. Temperature

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ADM485E/ADM487E/ADM1487E Rev. B | Page 9 of 16 0 63 56 -0 2 2 O U T P U T C U R R E N T ( m A ) OUTPUT LOW VOLTAGE (V) 0 20 40 60 80 100 120 140 0 2 4 6 8 10 12 Figure 9. Output Current vs. Driver Output Low Voltage 06 35 6- 02 3 O U T P U T C U R R E N T ( m A ) OUTPUT HIGH VOLTAGE (V) 0 –20 –40 –60 –80 –100 –120 –140 –8 –6 –4 –2 0 2 4 6 Figure 10. Output Current vs. Driver Output High Voltage 0 63 56 -0 2 4 S U P P L Y C U R R E N T ( µ A ) TEMPERATURE (°C) 0 100 200 300 400 500 600 –40 –20 0 20 40 60 80 DE = VCC AND RE = 1 DE = 0 AND RE = 1 Figure 11. ADM485E/ADM1487E Supply Current vs. Temperature 06 35 6- 02 5 S U P P L Y C U R R E N T ( µ A ) TEMPERATURE (°C) 0 100 200 300 400 500 600 –40 –20 0 20 40 60 80 DE = VCC AND RE = 1 DE = 0 AND RE = 0 Figure 12. ADM487E Supply Current vs. Temperature 06 3 56 -0 2 6 S H U T D O W N C U R R E N T ( µ A ) TEMPERATURE (°C) 0 1 2 3 4 5 7 8 9 10 6 –60 –20–40 0 20 40 60 1080 0 Figure 13. Shutdown Current vs. Temperature 06 35 6- 0 27 CH1 5.00V CH3 500mV CH2 500mV M200ns A CH1 2.80V 1 2 3 T 57.60% T A B RO Figure 14. ADM487E Receiver tRPHL

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