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ADP3303ARZ-5

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ADP3303ARZ-5

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Part Number ADP3303ARZ-5
Manufacturer Analog Devices Inc.
Description IC REG LINEAR 5V 200MA 8SOIC
Datasheet ADP3303ARZ-5 Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 955 piece(s)
Unit Price $ 3.5300 *
Lead Time Can Ship Immediately
Estimated Delivery Time Oct 29 - Nov 3 (Choose Expedited Shipping)
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Part Number # ADP3303ARZ-5 (PMIC - Voltage Regulators - Linear) is manufactured by Analog Devices Inc. and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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ADP3303ARZ-5 Specifications

ManufacturerAnalog Devices Inc.
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - Linear
Datasheet ADP3303ARZ-5Datasheet
Package8-SOIC (0.154", 3.90mm Width)
SeriesanyCAP?
Output ConfigurationPositive
Output TypeFixed
Number of Regulators1
Voltage - Input (Max)12V
Voltage - Output (Min/Fixed)5V
Voltage - Output (Max)-
Voltage Dropout (Max)0.4V @ 200mA
Current - Output200mA
Current - Quiescent (Iq)-
Current - Supply (Max)400µA ~ 4mA
PSRR-
Control FeaturesEnable
Protection FeaturesOver Temperature
Operating Temperature-25°C ~ 125°C
Mounting TypeSurface Mount
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SOIC

ADP3303ARZ-5 Datasheet

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High Accuracy anyCAP™ 200 mA Low Dropout Linear Regulator Data Sheet ADP3303 Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2014–2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES High accuracy over line and load ±0.8% at +25°C, ±1.4% over temperature Ultralow dropout voltage: 180 mV (typical) at 200 mA Requires only CO = 0.47 μF for stability anyCAP = stable with all types of capacitors (including MLCC) 3.2 V to 12 V supply range Current and thermal limiting Low noise Dropout detector Low shutdown current: < 1 μA Thermally enhanced SOIC_N package Excellent Line and Load Regulation Performance APPLICATIONS Cellular telephones Notebook, palmtop computers Battery powered systems Portable instruments Post regulator for switching supplies Bar code scanners FUNCTIONAL BLOCK DIAGRAMS Q2 THERMAL PROTECTION gm Q1 CC BANDGAP REF DRIVER R1 R2 ADP3303 OUTIN ERR SD GND 10 33 5- 00 1 Figure 1. Functional Block Diagram ADP3303-5.0 5 4 6 3NR OUTIN 1 2 7 8 ERR 330kΩ EOUT C2 0.47µF VOUT = +5V ON OFF SD C1 0.47µF VIN SD GND 10 33 5- 00 2 Figure 2. Typical Application Circuit GENERAL DESCRIPTION The ADP3303 is a member of the ADP3300, ADP3301, and ADP3309 family of precision low dropout anyCAP1 voltage regulators. The ADP3303 stands out from the conventional LDOs with a different architecture, an enhanced process, and a different package. Its patented design requires only a 0.47 μF output capacitor for stability. This device is insensitive to capacitor Equivalent Series Resistance (ESR) and is stable with any good quality capacitor, including ceramic types (MLCC) for space restricted applications. The ADP3303 achieves exceptional accuracy of ±0.8% at room temperature and ±1.4% overall accuracy over temperature, line, and load regulations. The dropout voltage of the ADP3303 is only 180 mV (typical) at 200 mA. In addition to the architecture and process, the Analog Devices, Inc., proprietary thermally enhanced package (Thermal Coastline) can handle 1 W of power dissipation without external heatsink or large copper surface on the printed circuit board (PCB). This keeps PCB real estate to a minimum and makes the ADP3303 very attractive for use in portable equipment. The ADP3303 operates with a wide input voltage range from 3.2 V to 12 V and delivers a load current in excess of 200 mA. It features an error flag that signals when the device is about to lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP3300, ADP3301, and ADP3309 anyCAP LDO family offers a wide range of output voltages and output current levels: Table 1. ADP3300, ADP3301, and ADP3309 anyCAP LDO Family Model Output Current Package Options ADP3300 50 mA 6-Lead SOT-23 ADP3301 100 mA 8-Lead SOIC_N ADP3309 100 mA 5-Lead SOT-23 1 anyCAP is a trademark of Analog Devices, Inc.

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ADP3303 Data Sheet Rev. D | Page 2 of 16 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagrams ............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 4 Thermal Resistance ...................................................................... 4 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ........................................................................ 9 Application Information ................................................................ 10 Capacitor Selection .................................................................... 10 Noise Reduction ......................................................................... 10 Thermal Overload Protection .................................................. 10 Calculating Junction Temperature ........................................... 10 Printed Circuit Board Layout Consideration ......................... 10 Error Flag Dropout Detector .................................................... 11 Shutdown Mode ......................................................................... 11 Application Circuits ....................................................................... 12 Crossover Switch ........................................................................ 12 Higher Output Current ............................................................. 12 Constant Dropout Post Regulator ............................................ 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13 REVISION HISTORY 8/2017—Rev. C to Rev. D Changes to General Description Section and Table 1 Title ........ 1 Changes to Ordering Guide .......................................................... 13 3/2014—Rev. B to Rev. C Changed SO-8 Package Notation to SOIC_N............ Throughout Changes to General Description, Added Table 1; Renumbered Sequentially ....................................................................................... 1 Changed Figure 1 to Figure 1 and Figure 2; Renumbered Sequentially ....................................................................................... 1 Changes to Table 6 ............................................................................ 5 Changes to Ordering Guide ............................................................ 9 11/2011—Rev. A to Rev. B Changed TA = −20°C to +85°C to TA = −25°C to +85°C ............. 2 Changed Operating Ambient Temperature Range from −20°C to +85°C to −25°C to +85°C ............................................................ 3 Changed Operating Junction Temperature Range from −20°C to +85°C to −25°C to +125°C .......................................................... 3 Updated Outline Dimensions .......................................................... 9 Changes to Ordering Guide ............................................................. 9

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Data Sheet ADP3303 Rev. D | Page 3 of 16 SPECIFICATIONS TA = −25°C to +85°C, VIN = 7 V, CIN = 0.47 µF, COUT = 0.47 µF, unless otherwise noted.1 Specifications subject to change without notice. Table 2. Parameter Symbol Conditions Min Typ Max Units OUTPUT VOLTAGE ACCURACY VOUT VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA TA = +25°C −0.8 +0.8 % VIN = VOUTNOM +0.5 V to 12 V IL = 0.1 mA to 200 mA –1.4 +1.4 % LINE REGULATION IN O V V ∆ ∆ VIN = VOUTNOM +0.5 V to 12 V, TA = +25°C 0.01 mV/V LOAD REGULATION L O I V ∆ ∆ IL = 0.1 mA to 200 mA, TA = +25°C 0.013 mV/mA GROUND CURRENT IGND IL = 200 mA 1.5 4 mA IL = 0.1 mA 0.25 0.4 mA GROUND CURRENT IN DROPOUT IGND VIN = 2.5 V, IL = 0.1 mA 1.12 2.5 mA DROPOUT VOLTAGE VDROP VOUT = 98% of VOUTNOM IL = 200 mA 0.18 0.4 V IL = 10 mA 0.02 0.07 V IL = 1 mA 0.003 0.03 V SHUTDOWN THRESHOLD VTHSD ON 2.0 V OFF 0.3 V SHUTDOWN PIN INPUT CURRENT ISDIN 0 < VSD < 5 V 1 µA 5 ≤ VSD ≤ 12 V at VIN = 12 V 22 µA GROUND CURRENT IN SHUTDOWN MODE IQ VSD = 0, VIN = 12 V, TA = +25°C 1 µA VSD = 0, VIN = 12 V, TA = +85°C 5 µA OUTPUT CURRENT IN SHUTDOWN MODE IOSD TA = +25°C at VIN = 12 V 2.5 µA TA = +85°C t VIN = 12 V 4 µA ERROR PIN OUTPUT LEAKAGE IEL VEO = 5 V 13 µA ERROR PIN OUTPUT LOW VOLTAGE VEOL ISINK = 400 µA 0.15 0.3 V PEAK LOAD CURRENT ILDPK VIN = VOUTNOM + 1 V 300 mA OUTPUT NOISE AT 5 V OUTPUT VNOISE f = 10 Hz–100 kHz CNR = 0 100 µV rms CNR = 10 nF, CL = 10 µF 30 µV rms 1 Ambient temperature of +85°C corresponds to a typical junction temperature of +125°C under typical full load test conditions.

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ADP3303 Data Sheet Rev. D | Page 4 of 16 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Input Supply Voltage –0.3 V to +16 V Shutdown Input Voltage –0.3 V to +16 V Error Flag Output Voltage –0.3 V to +16 V Noise Bypass Pin Voltage –0.3 V to +5 V Power Dissipation Internally Limited Operating Ambient Temperature Range −25°C to +85°C Operating Junction Temperature Range −25°C to +125°C Storage Temperature Range −65°C to +150°C Lead Temperature Range (Soldering 10 sec) +300°C Vapor Phase (60 sec) +215°C Infrared (15 sec) +220°C Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. THERMAL RESISTANCE Table 4. Thermal Resistance Package Type θJA θJC Unit 8-Lead SOIC_N 96 55 °C/W ESD CAUTION

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Data Sheet ADP3303 Rev. D | Page 5 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS OUT 1 OUT 2 NR 3 GND 4 IN8 IN7 ERR6 SD5 ADP3303 TOP VIEW (Not to Scale) 10 33 5- 00 3 Figure 3. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1, 2 OUT Output of the Regulator. Bypass to ground with a 0.47 µF or larger capacitor. Pin 1 and Pin 2 must be connected together for proper operation. 3 NR Noise Reduction Pin. Used for reduction of the output noise. See the Noise Reduction section for details. No connection if not used. 4 GND Ground Pin. 5 SD Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, connect this pin to the input pin. 6 ERR Open Collector Output. Goes low to indicate that the output is about to go out of regulation. 7, 8 IN Regulator Input. Pin 7 and Pin 8 must be connected together for proper operation. Table 6. Other Members of anyCAP Family1 Model Output Current Package Options2 Comments ADP3300 50 mA 6-Lead SOT-23 High accuracy ADP3301 100 mA 8-Lead SOIC_N High accuracy ADP3309 100 mA 5-Lead SOT-23 Improved MIC5205 1 See individual data sheets for detailed ordering information. 2 SOIC_N = small outline, SOT = surface mount.

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ADP3303 Data Sheet Rev. D | Page 6 of 16 TYPICAL PERFORMANCE CHARACTERISTICS INPUT VOLTAGE (V) O U TP U T VO LT A G E (V ) 3.3005 3.2985 3.2970 1643.3 5 6 7 8 9 10 11 12 13 14 15 3.3000 3.2995 3.2980 3.2975 3.2990 VOUT = 3.3V IL = 0mA IL = 10mA IL = 200mA IL = 100mA 10 33 5- 00 4 Figure 4. Line Regulation: Output Voltage vs. Supply Voltage OUTPUT LOAD (mA) O U TP U T VO LT A G E (V ) 3.2005 3.1990 3.1975 40200 60 80 100 120 140 160 180 200 3.2000 3.1995 3.1985 3.1980 VIN = 7V VOUT = 3.2V 10 33 5- 00 5 Figure 5. Output Voltage vs. Load Current INPUT VOLTAGE (V) 1.0 0.8 0 160 2 4 6 8 12 1410 0.6 0.4 0.2 VOUT = 3.3V IL = 0mA G R O U N D C U R R EN T (µ A ) 10 33 5- 00 6 Figure 6. Quiescent Current vs. Supply Voltage OUTPUT LOAD (mA) G R O U N D C U R R EN T (µ A ) 1600 800 200 1400 1200 600 400 1000 IL = 0mA TO 200mA 40200 60 80 100 120 140 160 180 200 10 33 5- 00 7 Figure 7. Quiescent Current vs. Load Current TEMPERATURE (°C) O U TP U T VO LT A G E (% ) 0.2 –0.4 135–25–45 –5 15 35 9575 11555 0.1 0 –0.1 –0.2 –0.3 IL = 0mA 10 33 5- 00 8 Figure 8. Output Voltage Variation % vs. Temperature TEMPERATURE (°C) 135–25 –5 15 35 9575 11555 G R O U N D C U R R EN T (µ A ) 2500 2000 0 1500 1000 500 VIN = 7V IL = 200mA IL = 0mA 10 33 5- 00 9 Figure 9. Quiescent Current vs. Temperature

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Data Sheet ADP3303 Rev. D | Page 7 of 16 OUTPUT LOAD (mA) 180 160 0 80 60 40 20 140 100 120 IN PU T- O U TP U T VO LT A G E (m V) 40200 60 80 100 120 140 160 180 200 10 33 5- 01 0 Figure 10. Dropout Voltage vs. Output Current INPUT VOLTAGE (V) 5 0 030 4 3 2 4 2 1 3 2 11 IN PU T- O U TP U T VO LT A G E (V ) RL = 16.5Ω VOUT = 3.3V 10 33 5- 01 1 Figure 11. Power-Up/Power-Down TIME (µs) 0 0 100 120 140 160 180 200 2 VSD = VIN OR 3V CL = 0.47µF RL = 16.5Ω VOUT = 3.3V 1 3 4 5 6 7 8 20 IN PU T- O U TP U T VO LT A G E (V ) 40 60 80 VIN VOUT 10 33 5- 01 2 Figure 12. Power-Up Transient TIME (µs) 0 100 120 140 160 180 20020 40 60 80 5.02 4.99 5.01 5.00 7.0 4.98 7.5 VO LT A G E (V ) 25Ω, 0.47µF LOAD VIN VOUT = 5V 10 33 5- 01 3 Figure 13. Line Transient Response TIME (µs) 0 100 120 140 160 180 20020 40 60 80 5.02 4.99 5.01 5.00 7.0 4.98 7.5 VO LT A G E (V ) 5kΩ, 0.47µF LOAD VIN VOUT = 5V 10 33 5- 01 4 Figure 14. Line Transient Response VO LT A G E (V ) TIME (µs) 3.310 3.305 10002000 600400 800 3.290 200 10 3.300 3.295 VOUT = 3.3V I (VOUT) VOUT CL = 0.47µF 10 33 5- 01 5 Figure 15. Load Transient for 10 mA to 200 mA Pulse

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ADP3303 Data Sheet Rev. D | Page 8 of 16 3.310 3.305 3.290 200 10 3.300 3.295 VOUT = 3.3V I (VOUT) VOUT CL = 10µF TIME (µs) 10002000 600400 800 (V ) (m A ) 10 33 5- 01 6 Figure 16. Load Transient for 10 mA to 200 mA Pulse (V ) 3.5 0 50 4321 0 300 100 400 200 3.3V (m A ) VOUT IOUT VIN = 7V TIME (Seconds) 10 33 5- 01 7 Figure 17. Short Circuit Current TIME (µs) V O LT A G E ( V ) 200400 16012080 4 1 0 5 0 3 2 3 CL = 0.47µF, RL = 3.3kΩ 3.3V VOUT SD VIN = 7V CL = 10µF, RL = 3.3kΩ CL = 10µF, RL = 16.5kΩ 10 33 5- 01 8 Figure 18. Turn On 4 1 250 5 10 15 20 3 2 0 0 5 VOUT VSD C = 0.47µF R = 16.5Ω ON 3.3V OUTPUT V O LT A G E ( V ) TIME (µs) 10 33 5- 01 9 Figure 19. Turn Off FREQUENCY (Hz) R IP P L E R E JE C T IO N ( d B ) 0 –100 10M10010 1k 10k 100k 1M –10 –60 –70 –80 –90 –20 –30 –50 –40 b a VOUT = 3.3V a. 0.47µF, RL = 33kΩ b. 0.47µF, RL = 16.5Ω c. 10µF, RL = 33kΩ d. 10µF, RL = 16.5Ω b d a c c d 10 33 5- 02 0 Figure 20. Power Supply Ripple Rejection FREQUENCY (Hz) V O LT A G E N O IS E S P E C T R A L D E N S IT Y ( µ V /√ H z) 10 1 0.01 100k1k100 10k 0.1 0.47µF BYPASS PIN 7, 8 TO PIN 3 VOUT = 5V, CL = 0.47µF, IL = 1mA, CNR = 0 VOUT = 3.3V, CL = 0.47µF, IL = 1mA, CNR = 0 VOUT = 2.7 TO 5V, CL = 10µF, IL = 1mA, CNR = 10nF 10 33 5- 02 1 Figure 21. Output Noise Density

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Data Sheet ADP3303 Rev. D | Page 9 of 16 THEORY OF OPERATION The new anyCAP LDO ADP3303 uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2, which is varied to provide the available output voltage options. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier. gm PTAT VOS R4 R3 D1 R1 ATTENUATION (VBANDGAP/VOUT) R2 (a) COMPENSATION CAPACITOR NONINVERTING WIDEBAND DRIVER Q1 IN CLOAD OUT ADP3303 RLOADPTATCURRENT GND 10 33 5- 02 2 Figure 22. Functional Block Diagram A very high gain error amplifier is used to control this loop. The amplifier is constructed so that at equilibrium it produces a large, temperature proportional input offset voltage that is repeatable and very well controlled. The temperature-proportional offset voltage is combined with the complementary diode voltage to form a virtual band gap voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the tradeoff of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the band gap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1 and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. This unique arrangement specifically corrects for the loading of the divider to avoid the error resulting from base current loading in conventional circuits. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type, and ESR of the load capacitance. Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with LDOs more difficult because of their unclear specifications and extreme variations over temperature. This is not true with the ADP3303 anyCAP LDO. The ADP3303 can be used with virtually any capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 0.47 µF capacitor on the output. Additional advantages of the pole splitting scheme include superior line noise rejection and very high regulator gain, which leads to excellent line and load regulation. An impressive ±1.4% accuracy is guaranteed over line, load, and temperature. Additional features of the circuit include current limit, thermal shutdown, and noise reduction. Compared to standard solutions that give warning after the output loses regulation, the ADP3303 provides improved system performance by enabling the ERR pin to give warning before the device loses regulation. As the temperature of the chip rises above 165°C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR pin, to reduce the current to a safe level. To reduce the noise gain of the loop, the node of the main divider network (a) is made available at the noise reduction (NR) pin, which can be bypassed with a small capacitor (10 nF to 100 nF).

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Theo***** Kala

August 19, 2020

Good communication and fast shipping! Recommended!

Am*****Din

August 15, 2020

Well packed, good item, capacitors both within 2.5% tolerance!

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