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BR24S64F-WE2

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BR24S64F-WE2

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Part Number BR24S64F-WE2
Manufacturer Rohm Semiconductor
Description IC EEPROM 64KBIT 400KHZ 8SOP
Datasheet BR24S64F-WE2 Datasheet
Package 8-SOIC (0.173", 4.40mm Width)
In Stock 105,892 piece(s)
Unit Price $ 0.6037 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jun 2 - Jun 7 (Choose Expedited Shipping)
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Part Number # BR24S64F-WE2 (Memory) is manufactured by Rohm Semiconductor and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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BR24S64F-WE2 Specifications

ManufacturerRohm Semiconductor
CategoryIntegrated Circuits (ICs) - Memory
Datasheet BR24S64F-WE2Datasheet
Package8-SOIC (0.173", 4.40mm Width)
Series-
Memory TypeNon-Volatile
Memory FormatEEPROM
TechnologyEEPROM
Memory Size64Kb (8K x 8)
Memory InterfaceI2C
Clock Frequency400kHz
Write Cycle Time - Word, Page5ms
Access Time-
Voltage - Supply1.7 V ~ 5.5 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeSurface Mount
Package / Case8-SOIC (0.173", 4.40mm Width)
Supplier Device Package8-SOP

BR24S64F-WE2 Datasheet

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○Product structure:Silicon monolithic integrated circuit ○This product is not designed protection against radioactive rays 1/33 TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・14・001 www.rohm.com Datasheet Serial EEPROM series Standard EEPROM I2C BUS EEPROM (2-Wire) BR24Sxxx-W (8K 16K 32K 64K 128K 256K) ●General Description BR24Sxxx-W is a serial EEPROM of I2C BUS interface method ●Features Completely conforming to the world standard I2C BUS. All controls available by 2 ports of serial clock (SCL) and serial data (SDA) Other devices than EEPROM can be connected to the same port, saving microcontroller port 1.7V to 5.5V single power source action most suitable for battery use FAST MODE 400kHz at 1.7V to 5.5V Page write mode useful for initial value write at factory shipment Highly reliable connection by Au pad and Au wire Auto erase and auto end function at data rewrite Low current consumption At write operation (5V) : 0.5mA (Typ.) At read operation (5V) : 0.2mA (Typ.) At standby operation (5V) : 0.1μA (Typ.) Write mistake prevention function Write (write protect) function added Write mistake prevention function at low voltage Data rewrite up to 1,000,000 times Data kept for 40 years Noise filter built in SCL / SDA terminal Shipment data all address FFh ●Packages W(Typ.) x D(Typ.) x H(Max.) ●Page write Number of pages 16Byte 32Byte 64Byte Product number BR24S08-W BR24S16-W BR24S32-W BR24S64-W BR24S128-W BR24S256-W ●BR24Sxxx-W Capacity Bit format Type Power source voltage SOP8 SOP-J8 SSOP-B8 TSSOP-B8 MSOP8 TSSOP-B8J VSON008 X2030 8Kbit 1K×8 BR24S08-W 1.7V to 5.5V ● ● ● ● ● ● ● 16Kbit 2K×8 BR24S16-W 1.7V to 5.5V ● ● ● ● ● ● ● 32Kbit 4K×8 BR24S32-W 1.7V to 5.5V ● ● ● ● ● ● ● 64Kbit 8K×8 BR24S64-W 1.7V to 5.5V ● ● ● ● ● ● 128Kbit 16K×8 BR24S128-W 1.7V to 5.5V ● ● ● ● 256Kbit 32K×8 BR24S256-W 1.7V to 5.5V ● ● VSON008X2030 2.00mm x 3.00mm x 0.60mm TSSOP-B8 3.00mm x 6.40mm x 1.20mm SOP8 5.00mm x 6.20mm x 1.71mm SOP- J8 4.90mm x 6.00mm x 1.65mm TSSOP-B8J 3.00mm x 4.90mm x 1.10mm MSOP8 2.90mm x 4.00mm x 0.90mm SSOP-B8 3.00mm x 6.40mm x 1.35mm

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Datasheet 2/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com ●Absolute Maximum Ratings (Ta=25℃) Parameter Symbol Ratings Unit Remarks Supply Voltage VCC -0.3 to +6.5 V 450 (SOP8) When using at Ta=25℃ or higher 4.5mW to be reduced per 1℃. 450 (SOP-J8) When using at Ta=25℃ or higher 4.5mW to be reduced per 1℃. 300 (SSOP-B8) When using at Ta=25℃ or higher 3.0mW to be reduced per 1℃. 330 (TSSOP-B8) When using at Ta=25℃ or higher 3.3mW to be reduced per 1℃. 310 (TSSOP-B8J) When using at Ta=25℃ or higher 3.1mW to be reduced per 1℃. 310 (MSOP8) When using at Ta=25℃ or higher 3.1mW to be reduced per 1℃. Power Dissipation Pd 300 (VSON008X2030) mW When using at Ta=25℃ or higher 3.0mW to be reduced per 1℃. Storage Temperature Tstg -65 to +125 ℃ Operating Temperature Topr -40 to +85 ℃ Terminal Voltage ‐ -0.3 to Vcc+1.0 V ●Memory cell characteristics (Ta=25℃, Vcc=1.7V to 5.5V) Limits Parameter Min. Typ. Max. Unit Number of data rewrite times *1 1,000,000 - - Times Data hold years *1 40 - - Years *1 Not 100% TESTED ●Recommended Operating Ratings Parameter Symbol Ratings Unit Power source voltage Vcc 1.7 to 5.5 Input voltage VIN 0 to Vcc V ●Electrical Characteristics (Unless otherwise specified, Ta=-40℃ to +85℃, VCC=1.7V to 5.5V) Limits Parameter Symbol Min Typ. Max. Unit Condition "H" Input Voltage1 VIH1 0.7Vcc - Vcc+1.0 V "L" Input Voltage1 VIL1 -0.3 - 0.3Vcc V "L" Output Voltage1 VOL1 - - 0.4 V IOL=3.0mA , 2.5V≦Vcc≦5.5V (SDA) "L" Output Voltage2 VOL2 - - 0.2 V IOL=0.7mA , 1.7V≦Vcc≦2.5V (SDA) Input Leakage Current ILI -1 - 1 μA VIN=0 to Vcc Output Leakage Current ILO -1 - 1 μA VOUT=0 to Vcc (SDA) - - 2.0 Vcc=5.5V , fSCL =400kHz, tWR=5ms Byte Write, Page Write BR24S08/16/32/64-W ICC1 - - 2.5 mA Vcc=5.5V , fSCL =400kHz, tWR=5ms Byte Write, Page Write BR24S128/256-W Current consumption at action ICC2 - - 0.5 mA Vcc=5.5V , fSCL =400kHz Random read, Current read, Sequential read Standby Current ISB - - 2.0 μA Vcc=5.5V , SDA・SCL=Vcc A0, A1, A2=GND, WP=GND

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Datasheet 3/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com ●Action timing characteristics (Unless otherwise specified, Ta=-40℃ to +85℃, VCC=1.7V to 5.5V) Limits Parameter Symbol Min. Typ. Max. Unit SCL Frequency fSCL - - 400 kHz Data clock "High" time tHIGH 0.6 - - μs Data clock "Low" time tLOW 1.2 - - μs SDA, SCL rise time *1 tR - - 0.3 *2 μs SDA, SCL fall time *1 tF - - 0.3 μs Start condition hold time tHD:STA 0.6 - - μs Start condition setup time tSU:STA 0.6 - - μs Input data hold time tHD:DAT 0 - - ns Input data setup time tSU:DAT 100 - - ns Output data delay time tPD 0.1 - 0.9 μs Output data hold time tDH 0.1 - - μs Stop condition data setup time tSU:STO 0.6 - - μs Bus release time before transfer start tBUF 1.2 - - μs Internal write cycle time tWR - - 5 ms Noise removal valid period (SDA,SCL terminal) tI - - 0.1 μs WP hold time tHD:WP 0 - - ns WP setup time tSU:WP 0.1 - - μs WP valid time tHIGH:WP 1.0 - - μs *1 : Not 100% TESTED *2 : BR24S16/64-W : 1.0μs. ●Sync data input / output timing SDA tSU:STA tSU:STOtHD:STA START BIT STOP BIT SCL ○Input read at the rise edge of SCL ○Data output in sync with the fall of SCL Figure 1-(a) Sync data input / output timing Figure 1-(b) Start - stop bit timing SDA SCL D0 ACK STOP CONDITION START CONDITION tWRWRITE DATA(n) Figure 1-(c) Write cycle timing Figure 1-(d) WP timing at write execution ○At write execution, in the area from the D0 taken clock rise of the first DATA(1), to tWR, set WP= 'LOW'. ○By setting WP "HIGH" in the area, write can be cancelled. When it is set WP = 'HIGH' during tWR, write is forcibly ended, and data of address under access is not guaranteed, therefore write it once again. Figure 1-(e) WP timing at write cancel SDA (入力) SDA (出力) tHD:STA tHD:DATtSU:DAT tBUF tPD tDH tLOW tHIGHtR tF SCL (Input) (Output) SCL SDA WP tHD:WP ストップコンディション tWR D1 D0 ACK ACK DATA(1) DATA(n) tSU:WP Stop condition tHIGH:WP WP SDA D1 D0 ACK ACK DATA(1) DATA(n) tWR SCL tWR

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Datasheet 4/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com ●Block Diagram ●Pin Configuration ●Pin Descriptions Function Terminal name Input/ Output BR24S08-W BR24S16-W BR24S32/64/128/256-W A0 Input Don't use Don't use Slave address setting A1 Input Don't use Don't use Slave address setting A2 Input Slave address setting Don't use Slave address setting GND - Reference voltage of all input / output, 0V. SDA Input / Output Slave and word address, Serial data input serial data output SCL Input Serial clock input WP Input Write protect terminal Vcc - Connect the power source. *1 10bit: BR24S08-W 11bit: BR24S16-W 12bit: BR24S32-W 13bit: BR24S64-W 14bit: BR24S128-W 15bit: BR24S256-W *2 A0, A1=Don't use: BR24S08-W A0, A1, A2=Don't use: BR24S16-W Vcc SCL GND BR24S08-W BR24S16-W BR24S32-W BR24S64-W BR24S128-W BR24S256-W 1 2 3 4 5 6 7 8 WP SDA A2 A1 A0 (TOP VIEW) 8 7 6 5 4 3 2 1 SDA SCL WP Vcc GND A2 A1 A0 Add dress decoder Slave - word address register Data register Control circuit High voltage generating circuit Power source voltage detection 10bit 11bit 12bit 13bit 14bit 15bit 8bit ACK START STOP 8 Kbit to 256Kbit EEPROM array 10bit 11bit 12bit 13bit 14bit 15bit *1 *1 *2 *2 *2

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Datasheet 5/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Figure 4. "L" Output Voltage VOL-IOL1(Vcc=1.7V) Figure 5. "L" Output Voltage VOL-IOL (Vcc=2.5V) Figure 2. "H" Input Voltage VIH (A0, A1, A2, SCL, SDA, WP) Figure 3. "L" Input Voltage VIL (A0, A1, A2, SCL, SDA, WP) ●Typical Performance Curves (The following values are Typ. ones.)

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Datasheet 6/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Figure 6. Input Leak Current ILI (A0, A1, A2, SCL, WP) Figure 7. Output Leak Current ILO (SDA) Figure 9. Current consumption at WRITE operation ICC1 (fscl=400kHz BR24S128/256-W) Figure 8. Current consumption at WRITE operation ICC1 (fscl=400kHz BR24S16/32/64-W) ●Typical Performance Curves‐Continued I L O [u A ]

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Datasheet 7/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Figure 10. Current consumption at READ operation ICC2 (fscl=400kHz) Figure 12. SCL frequency fSCL Figure 13. Data clock High Period tHIGH Figure 11. Standby operation ISB ●Typical Performance Curves‐Continued

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Datasheet 8/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Figure 14. Data clock LOW Period tLOW Figure 15. Start Condition Hold Time tHD:STA Figure 16. Start Condition Setup Time tSU:STA Figure 17. Input Data Hold Time tHD:DAT(HIGH) ●Typical Performance Curves‐Continued

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Datasheet 9/33 BR24Sxxx-W (8K 16K 32K 64K 128K 256K) TSZ02201-0R2R0G100320-1-2 20.AUG.2012 Rev.001 ©2012 ROHM Co., Ltd. All rights reserved. TSZ22111・15・001 www.rohm.com Figure 18. Input Data Hold Time tHD:DAT(LOW) Figure 19. Input Data Setup Time tSU:DAT(HIGH) Figure 20. Input Data Setup Time tSU:DAT(LOW) Figure 21. “L” Data output delay time tPD0 ●Typical Performance Curves‐Continued

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