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CS5106LSWR24

hot CS5106LSWR24

CS5106LSWR24

For Reference Only

Part Number CS5106LSWR24
Manufacturer ON Semiconductor
Description IC REG CTRLR FWRD CONV 24SSOP
Datasheet CS5106LSWR24 Datasheet
Package 24-SSOP (0.209", 5.30mm Width)
In Stock 1686 piece(s)
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Lead Time Can Ship Immediately
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CS5106LSWR24

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CS5106LSWR24 Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - DC DC Switching Controllers
Datasheet CS5106LSWR24 Datasheet
Package24-SSOP (0.209", 5.30mm Width)
Series-
Output TypeTransistor Driver
FunctionStep-Up/Step-Down
Output ConfigurationPositive, Isolation Capable
TopologyForward Converter
Number of Outputs1
Output Phases1
Voltage - Supply (Vcc/Vdd)9 V ~ 16 V
Frequency - Switching512kHz
Duty Cycle (Max)60%
Synchronous RectifierYes
Clock SyncYes
Control FeaturesCurrent Limit, Enable, Frequency Control, Ramp
Operating Temperature-40°C ~ 85°C (TA)
Package / Case24-SSOP (0.209", 5.30mm Width)
Supplier Device Package24-SSOP

CS5106LSWR24 Datasheet

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© Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 9 1 Publication Order Number: CS5106/D CS5106 Multi−Feature, Synchronous plus Auxiliary PWM Controller The CS5106 is a fixed frequency, current mode controller with one single NFET driver and one dual FET, synchronous driver. The synchronous driver allows for increased efficiency of the main isolated power stage and the single driver allows the designer to develop auxiliary supplies for controller power as well as secondary side house keeping. In addition, because the synchronous drivers have programmable FET non−overlap, the CS5106 is an ideal controller for soft−switched converter topologies. The CS5106 is specifically designed for isolated topologies where speed, flexibility, reduced size and reduced component count are requirements. The controller contains the following features: Undervoltage Shutdown, Overvoltage Shutdown, Programmable Frequency, Programmable Synchronous Non−Overlap Time, Master/Slave Clocking with Frequency Range Detection, Enable, Output Undervoltage Protection with Timer, 20 mA 5.0 V Output, 80 ns PWM propagation delay, and Controlled Hiccup Mode. The CS5106 has junction temperature and supply ranges of −40°C to 125°C and 9.0 V to 16 V respectively and is available in the 24 lead SSOP package. Features • Programmable Fixed Frequency • Programmable FET Non−Overlap • Enable Lead • 12 V Fixed Auxiliary Supply Control • Under and Overvoltage Shutdown • Output Undervoltage Protection with Timer • Master/Slave Clock Sync Capability • Sync Frequency Range Detection • 80 ns PWM Propagation Delay • 20 mA 5.0 V Reference Output • Small 24 Lead SSOP Package • Controlled Hiccup Mode CS5106LSWR24 http://onsemi.com A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week Device Package Shipping ORDERING INFORMATION CS5106LSW24 SSOP−24 59 Units/Rail 2000 Tape & ReelSSOP−24 SSOP−24 SW SUFFIX CASE 940D 1 C S 5106 A W LY Y W W 24 RAMP2RAMP1 ILIM2ILIM1 DLYSETOUVDELAY FADJOAOUT SYNCOUTOAM SYNCINV5REF PROGRAMOVSD ENABLEUVSD VFB2VFB1 GATE2BVSS VDDGATE1 GATE2VCC 1 24 PIN CONNECTIONS AND MARKING DIAGRAM

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CS5106 http://onsemi.com 2 Figure 1. Application Diagram, 48 V to 3.3 V Forward Converter with Synchronous Rectifiers V 5R E F E N A B LE V IN V M A IN R 18 C 13 C 14 R 1 C S 51 06 T L4 31 V IN V A U X P C 4 C 5 P R O G R A M V A U X S V A U X S R 24 C N Y 17 − 4 S Y N C IN S Y N C O U T V C C D 5 E N A B LE R 2 R 3 R 27 R 4 C 1 C 2 C 3 R 19 R 17 V A U X P S Y N C IN S Y N C O U T FA D J D LY S E T I L IM 2 R A M P 2 V F B 2 G A T E 2B G A T E 2 V D D G A T E 1 V S S V F B 1 R A M P 1 I L IM 1 O U V D E LA Y O A O U T O A M V 5R E F O V S D U V S D D 2 D 1 T 1 R 8 D 6 Q 1 Q 2 R 5 R 6 C 7 D 3 C 9 C 10 R 10R 9 R 11 R 12 V IN T 3 D 4 R 26 T 4 R 13 C 8 R 14 D 8 R 25 C 6 R 7 R 15 R 20 R 16 R 21 R 23 C 11 D 7 Q 3 R 22 Q 4 Q 5 C 12 L1 T 2 Q 6 Q 7 V IN

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CS5106 http://onsemi.com 3 ABSOLUTE MAXIMUM RATINGS* Rating Value Unit Operating Junction Temperature, TJ 150 °C Operating Temperature Range, TA −40 to 85 °C Storage Temperature Range, TS −65 to +150 °C ESD Susceptibility (Human Body Model) 2.0 kV Lead Temperature Soldering: Reflow: (SMD styles only) (Note 1) 230 peak °C 1. 60 second maximum above 183°C. *The maximum package power dissipation must be observed. ABSOLUTE MAXIMUM RATINGS Pin Name Pin Symbol VMAX VMIN ISOURCE ISINK Undervoltage Shutdown Input UVSD 6.0 V −0.3 V 1.0 mA N/A Overvoltage Shutdown Input OVSD 6.0 V −0.3 V 1.0 mA N/A 5.0 V Reference Output V5REF 6.0 V −0.3 V 150 mA 25 mA Error Amp Minus Input OAM 6.0 V −0.3 V 250 μA 1.2 mA Error Amp Output OAOUT 6.0 V −0.3 V 300 μA 100 mA Output Overcurrent Timer Capacitor OUVDELAY 6.0 V −0.3 V 15 μA N/A Auxiliary Primary Side Current Limit Input ILIM1 6.0 V −0.3 V 10 μA N/A Auxiliary Primary Side Current Ramp Input RAMP1 6.0 V −0.3 V 10 μA N/A Auxiliary Voltage Feedback Input VFB1 6.0 V −0.3 V 5.0 μA 100 μA Bootstrapped Power Input VSS 20 V −0.3 V 2.0 μA 0.5 A Peak, 300 mA DC Main Power Input VCC 20 V −0.3 V See Note 2 0.5 A Peak, 300 mA DC Auxiliary FET Driver Output GATE1 20 V −0.3 V 0.5 A Peak, 100 mA DC 0.5 A Peak, 100 mA DC Ground GND 0 V 0 V 0.5 A Peak N/A, 300 mA DC Synchronous FET Driver Output GATE2 20 V −0.3 V 0.5 A Peak, 100 mA DC 0.5 A Peak, 100 mA DC Synchronous FET Driver Output B GATE2B 20 V −0.3 V 0.5 A Peak, 100 mA DC 0.5 A Peak, 100 mA DC Synchronous Voltage Feedback Input VFB2 6.0 V −0.3 V 10 μA 100 μA Synchronous Primary Side Current Ramp Input RAMP2 6.0 V −0.3 V 10 μA N/A Synchronous Primary Side Current Limit Input ILIM2 6.0 V −0.3 V 10 μA N/A Gate Non−Overlap Programming Input DLYSET 2.5 V −0.3 V 125 μA N/A Frequency Programming Input FADJ 2.5 V −0.3 V 125 μA N/A Clock Master Output SYNCOUT 6.0 V −0.3 V 50 mA 100 mA Clock Slave Input SYNCIN 6.0 V −0.3 V N/A 1.0 mA Enable Programming Input PROGRAM 16 V −0.3 V 30 μA N/A Enable Input ENABLE 16 V −0.3 V 300 μA N/A 2. Current out of VCC is not limited. Care should be taken to prevent shorting VCC to Ground.

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CS5106 http://onsemi.com 4 ELECTRICAL CHARACTERISTICS (TJ = −40°C to 125°C, VSS = 9.0 to 16 V, V5REF ILOAD = 2.0 mA, SYNCOUT Free Running, unless otherwise specified. For All Specs: UVSD = 6.0 V, OVSD = 0 V, ENABLE = 0 V, ILIM(1,2) = 0, VFB(1,2) = 3.0 V, RFADJ = RDLYSET = 27.4 kΩ.) Characteristic Test Conditions Min Typ Max Unit VSS Supply Current VSS Supply Current Measure current into VSS when V5REF ILOAD = 0 mA. 9.0 V ≤ VSS ≤ 13 V. Measure current into VSS when V5REF ILOAD = 0 mA. 13 V < VSS ≤ 16 V. Measure current into VSS when V5REF ILOAD = 0 mA. 16 V < VSS ≤ 20 V. − − − 16 16 16 23 25 30 mA mA mA Low VCC Supply Current Low VCC Supply Current Float VSS. Set VCC = 7.0 V & measure VCC current while V5REF ILOAD = 0 mA. − 1.5 3.5 mA VSS to VCC Diode Diode ON Voltage Measure VSS − VCC 0.2 0.75 1.0 V Reference 5.0 V Internal Voltage Reference Measure VREF voltage when IREF = 0 and IREF = 20 mA 4.85 5.0 5.15 V VREFOK Threshold Adjust VREF from 4.8 V−4.0 V until PWM1,2 goes low. 4.3 4.55 4.7 V Low VCC Lockout VCC Turn−on Threshold Voltage VCC increasing until ICC > 3.5 mA V5REF ILOAD = 0 mA 7.0 7.25 7.5 V VCC Turn−off Threshold Voltage VCC decreasing until ICC < 3.5 mA V5REF ILOAD = 0 mA 6.3 6.7 7.1 V Hysteresis Turn−on − Turn−off 0.40 0.55 0.70 V Clock Operating Frequency1 Measure frequency from SYNCOUT. 485 512 540 kHz SYNCIN Input Impedance Measure input impedance. 7.0 15 − kΩ SYNCOUT Output Low Voltage RLOAD = 2.0 kΩ to V5REF − 1.0 1.5 V SYNCOUT Output High Voltage RLOAD = 2.0 kΩ to GND 3.5 4.2 − V SYNCIN Detect Frequency Verify SYNCOUT = SYNCIN, RLOAD = 2.0 kΩ to GND 425 − 555 kHz Max. Low SYNC Rej. Frequency Verify SYNCOUT = FCLK when RLOAD = 2.0 kΩ to GND − − 340 kHz Min. High SYNC Rej. Frequency Verify SYNCOUT = FCLK when RLOAD = 2.0 kΩ to GND 690 − − kHz SYNCIN Input Threshold Voltage Functional Testing Verify FCLK from 1.0 V to 2.8 V 0.9 1.85 2.9 V Main PWM Clock Pulse Width (GBD) − CLPH1 One Shot Pulse Width 80 100 120 ns Aux PWM Clock Pulse Width (GBD) − CLPH2 One Shot Pulse Width 80 100 120 ns

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CS5106 http://onsemi.com 5 ELECTRICAL CHARACTERISTICS (continued) (TJ = −40°C to 125°C, VSS = 9.0 to 16 V, V5REF ILOAD = 2.0 mA, SYNCOUT Free Running, unless otherwise specified. For All Specs: UVSD = 6.0 V, OVSD = 0 V, ENABLE = 0 V, ILIM(1,2) = 0, VFB(1,2) = 3.0 V, RFADJ = RDLYSET = 27.4 kΩ.) Characteristic UnitMaxTypMinTest Conditions Bias Supply Error Amplifier Output Low Voltage VSS > 12.6 V. Measure OAOUT voltage when sinking 1.0 mA. − 43 85 mV Output High Voltage VSS < 11.4 V. Measure OAOUT voltage when sourcing 150 μA. 4.55 4.75 − V Output High Source Current VSS < 11.4 V. Measure OAOUT source current when OAOUT = 0.5 V 150 225 300 μA Output Low Sink Current VSS > 12.6 V. Measure OAOUT sink current when OAOUT = 2.5 V. 3.0 20 50 mA VSS Set Point Adjust VSS until OAOUT goes low. 11.6 12.25 12.8 V Large Signal Gain (GBD) 15 − − V/mV Unity Gain Bandwidth (GBD) − 1.0 − MHz Common Mode Input Range (GBD) 1.0 − 2.0 V VSS Voltage VSS Reset Voltage Toggle ENABLE between GND & VCC, then adjust VSS from 2.0 V−0.8 V until OAOUT goes high. 1.0 1.4 1.8 V Undervoltage Lockout UVSD Turn−On Threshold Voltage Adjust UVSD from 4.7 V−5.3 V until GATE1,2 goes high. 4.8 5.0 5.1 V UVSD Turn−Off Threshold Voltage Adjust UVSD from 5.1 V−4.3 V until GATE1,2 goes low. 4.45 4.7 4.95 V Hysteresis Turn−on − Turn−off 0.2 0.27 0.4 V UVSD Input Bias Current Set UVSD = 0 V. Measure Current out of UVSD lead. − 0.2 0.5 μA Overvoltage Lockout OVSD Threshold Voltage Adjust OVSD from 4.7 V−5.3 V until GATE1,2 goes low. 4.85 5.0 5.15 V OVSD Input Bias Current Set OVSD = 0 V. Measure Current out of OVSD lead. − 0.2 0.5 μA ENABLE & PROGRAM ENABLE Lead Output Current Measure current out of ENABLE when ENABLE = 0 V 100 266 500 μA PROGRAM Lead Output Current Measure current out of PROGRAM when PROGRAM = 0 V 20 60 100 μA PROGRAM Threshold Voltage ENABLE = GND. Adjust PROGRAM from 1.0 V−1.8 V until GATE1,2 goes high. 1.2 1.4 1.6 V ENABLE Threshold Voltage PROGRAM = GND. Adjust ENABLE from 1.0 V−1.8 V until GATE1,2 goes high. 1.2 1.4 1.6 V

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CS5106 http://onsemi.com 6 ELECTRICAL CHARACTERISTICS (continued) (TJ = −40°C to 125°C, VSS = 9.0 to 16 V, V5REF ILOAD = 2.0 mA, SYNCOUT Free Running, unless otherwise specified. For All Specs: UVSD = 6.0 V, OVSD = 0 V, ENABLE = 0 V, ILIM(1,2) = 0, VFB(1,2) = 3.0 V, RFADJ = RDLYSET = 27.4 kΩ.) Characteristic UnitMaxTypMinTest Conditions Output Undervoltage Delay OUVDELAY Charging Current Set OUVDELAY = 1.0 V, VFB1 = 4.4 V Measure OUVDELAY ICHARGE. 7.5 10 12.5 μA OUVDELAY Latch−off Voltage Toggle ENABLE between GND & VCC, then adjust OUVDELAY from 4.7 V−5.3 V until GATE1,2, goes low. 4.8 5.0 5.2 V OUVDELAY Set Current OUVDELAY = VOCLO + 50 mV. Measure current into OUVDELAY. − 0.5 1.0 mA VFB1 Charge Threshold VSS = 1.0 V. Toggle ENABLE between GND & VCC, adjust VFB1 from 3.8 V−4.6 V until GATE1,2 goes low. 4.05 4.22 4.4 V VFB2 Charge Threshold VSS = 1.0 V. Toggle ENABLE between GND & VCC, adjust VFB2 from 3.8 V−4.6 V until GATE1,2 goes low. 3.9 4.15 4.35 V Current Limit Circuits ILIM1 Current Limit Threshold Voltage Adjust ILIM1 from 1.0 V−1.3 V until GATE1 goes low. 1.16 1.24 1.3 V ILIM1 Short Circuit Threshold Voltage Adjust ILIM1 from 1.30 V−1.50 V until GATE1 skips 2−cycles with reference to SYNCOUT. 1.35 1.44 1.51 V ILIM1 Input Bias Current Set ILIM1 = 0 V. Measure current out of ILIM1 lead. − 0.5 5.0 μA ILIM2 Current Limit Threshold Voltage Adjust ILIM2 from 1.0 V−1.3 V until GATE2 goes low. 1.16 1.24 1.3 V ILIM2 Short Circuit Threshold Voltage Adjust ILIM2 from 1.30 V−1.50 V until GATE2 skips 2−cycles with reference to SYNCOUT. 1.35 1.44 1.51 V ILIM2 Input Bias Current Set ILIM2 = 0 V. Measure current out of ILIM2 lead. − 0.5 5.0 μA Voltage Feedback Control RAMP1 Offset Voltage VFB1 = 0 V. Adjust RAMP1 from 0 V−0.3 V until GATE1 goes low. Measure VRAMP1. 0.08 0.13 0.2 V RAMP1 Input Bias Current Set RAMP1 = 0 V. Measure Current out of RAMP1 lead. − 0.5 5.0 μA RAMP2 Offset Voltage VFB2 = 0 V. Adjust RAMP2 from 0 V−3.0 V until GATE2 goes low. Measure VRAMP2. 0.08 0.13 0.2 V RAMP2 Input Bias Current Set RAMP2 = 0 V. Measure Current out of RAMP2 lead. − 0.5 5.0 μA VFB1 Input Impedance Measure input impedance. 60 120 220 kΩ VFB2 Input Impedance Measure input impedance. 60 120 220 kΩ

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CS5106 http://onsemi.com 7 ELECTRICAL CHARACTERISTICS (continued) (TJ = −40°C to 125°C, VSS = 9.0 to 16 V, V5REF ILOAD = 2.0 mA, SYNCOUT Free Running, unless otherwise specified. For All Specs: UVSD = 6.0 V, OVSD = 0 V, ENABLE = 0 V, ILIM(1,2) = 0, VFB(1,2) = 3.0 V, RFADJ = RDLYSET = 27.4 kΩ.) Characteristic UnitMaxTypMinTest Conditions Gate1, 2, 2B, Output Voltages VSS = 12 V. VCC = VSS − VDON GATE1 Low State PROGRAM = 0 V. Measure GATE1 voltage when sinking 1.0 mA. − 0.15 0.8 V GATE2 Low State PROGRAM = 0 V. Measure GATE2 voltage when sinking 1.0 mA. − 0.18 0.8 V GATE2B Low State PROGRAM = 0 V. Measure GATE2B voltage when sinking 1.0 mA. − 0.18 0.8 V GATE2B High State Measure VCC − GATE2B voltage when sourcing 1.0 mA. − 1.65 2.0 V GATE2 High State Measure VCC − GATE2 voltage when sourcing 1.0 mA. − 1.65 2.0 V GATE1 High State Measure VCC − GATE1 voltage when sourcing 1.0 mA. − 1.65 2.0 V Propagation Delays ILIM1 Delay to Output GATE1 Measure delay from ILIM1 going high to GATE1 going low. − 80 120 ns ILIM2 Delay to Output GATE2 Measure delay from ILIM2 going high to GATE2 going low. − 80 100 ns RAMP1 Delay to Output GATE1 Measure delay from RAMP1 going high to GATE1 going low. − 80 115 ns RAMP2 Delay to Output GATE2 Measure delay from RAMP2 going high to GATE2 going low. − 80 100 ns GATE2, 2B Non−Overlap Delay GATE2 Turn−on Delay from GATE2B Measure delay from GATE2B going low @ 1.7 V to GATE2 going high @ 1.7 V. 20 45 70 ns GATE2B Turn−on Delay from GATE2 Measure delay from GATE2 going low @ 1.7 V to GATE2B going high @ 1.7 V. 20 45 70 ns GATE1, 2, 2B Rise & Fall Times VSS = 12 V, VCC = VSS−VDON GATE1 Rise Time Measure GATE1 Rise Time from 90% to 10%. CLOAD = 150 pF. − 50 80 ns GATE1 Fall Time Measure GATE1 Fall Time from 10% to 90%. CLOAD = 150 pF. − 30 60 ns GATE2 Rise Time Measure GATE2 Rise Time from 90% to 10%. CLOAD = 50 pF. − 50 80 ns GATE2 Fall Time Measure GATE2 Fall Time from 10% to 90%. CLOAD = 50 pF. − 15 30 ns GATE2B Rise Time Measure GATE2B Rise Time from 90% to 10%. CLOAD = 50 pF. − 50 80 ns GATE2B Fall Time Measure GATE2B Rise Time from 10% to 90%. CLOAD = 50 pF. − 15 30 ns

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CS5106 http://onsemi.com 8 PACKAGE PIN DESCRIPTION PACKAGE PIN # PIN SYMBOL FUNCTIONSSOP−24 1 UVSD Undervoltage shutdown lead. Typically this lead is connected through a resistor divider to the main high voltage (VIN) line. If the voltage on this lead is less than 5.0 V then a fault is initi- ated such that GATE1, GATE2 and GATE2B go low. 2 OVSD Overvoltage shutdown lead. Typically this lead is connected through a resistor divider to the main high voltage (VIN) line. If the voltage on this lead exceeds 5.0 V then a fault is initiated such that GATE1, GATE2 and GATE2B go low. 3 V5REF 5.0 V reference output lead. Capable of 20 mA nominal output. If this lead falls to 4.5 V, a fault is initiated such that GATE1, GATE2 and GATE2B go low. 4 OAM Auxiliary error amplifier minus input. This lead is compared to 1.2 V nominal on the auxiliary error amp plus lead and represents the VSS voltage divided by ten. 5 OAOUT Auxiliary error amplifier output lead. Source current 300 μA max. 6 OUVDELAY Output undervoltage timing capacitor lead. If the controlled output voltages of either the main or the auxiliary supply are such that either VFB1 or VFB2 is greater that 4.1 V nominal, then capacitor from OUVDELAY to ground will begin charging. If the over voltage duration is such that the OUVDELAY voltage exceeds 5.0 V, then a fault will be initiated such that GATE1, GATE2 and GATE2B will go low. 7 ILIM1 Pulse by pulse over current protection lead for the auxiliary PWM. A voltage exceeding 1.2 V nominal on ILIM1 will cause GATE1 to go low. A voltage exceeding 1.4 V nominal on ILIM1 will cause GATE1 to go low for at least two clock cycles. 8 RAMP1 Current Ramp Input Lead for the Auxiliary PWM. A voltage which is linear with respect to current in the primary side of the auxiliary transformer is usually represented on this lead. A voltage exceeding VFB1 − 0.13 on RAMP1 will cause GATE1 to go low. 9 VFB1 Voltage Feedback Lead for the Auxiliary PWM. A voltage which represents the auxiliary pow- er supply output voltage is fed to this lead. A voltage less than RAMP1+0.13 on VFB1 will cause GATE1 to go low. 10 VSS VSS power/feedback input lead. See VCC for description of power operation. In addition, this lead is fed to a divide by ten resistor divider and compared to 1.2 V nominal at the positive side of the error amplifier. 11 VCC VCC power input lead. This input runs off a Zener referenced supply until VSS > VCC. Then an internal diode which runs between VSS and VCC turns on and all main power is derived from VSS. 12 GATE1 Auxiliary PWM gate drive lead. This output normally drives the FET which drives the auxiliary transformer. 13 GND Ground lead. 14 GATE2 Synchronous PWM gate drive lead. This output normally drives the FET which drives the main transformer. 15 GATE2B Synchronous PWM gate drive lead. This output normally drives the FET for the gate drive transformer used for synchronous rectification. 16 VFB2 Voltage feedback lead for the synchronous PWM. A voltage which represents the main pow- er supply output voltage is fed to this lead. A voltage less than RAMP2+0.13 on VFB2 will cause GATE2 to go low and GATE2B to go high. 17 RAMP2 Current ramp input lead for the synchronous PWM. A voltage which is linear with respect to current in the primary side of the main transformer is usually represented on this lead. A voltage exceeding VFB2 − 0.13 on RAMP2 will cause GATE2 to go low and GATE2B to go high. 18 ILIM2 Pulse by pulse over current protection lead for the synchronous PWM. A voltage exceeding 1.2V nominal on ILIM2 will cause GATE2 to go low and GATE2B to go high. A voltage ex- ceeding 1.4 V nominal on ILIM2 will cause GATE2 to go low and GATE2B to go high for at least two clock cycles. 19 DLYSET GATE2, GATE2B non−overlap time adjustment lead. A 27 kΩ resistor from DLYSET to ground sets the non−overlap time to 45 ns nominal.

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CS5106 http://onsemi.com 9 PACKAGE PIN # FUNCTIONPIN SYMBOLSSOP−24 20 FADJ Frequency adjustment lead. A 27 kΩ resistor from FADJ to ground sets the clock frequency to 512 kHz nominal. 21 SYNCOUT Clock output lead. This is a 50% duty cycle, 1.0 V to 5.0 V pulse whose rising edge is in phase with GATE1. This signal can be used to synchronize other power supplies. 22 SYNCIN Clock synchronization lead. The internal clock frequency can be adjusted +10%, −15% by the onset of positive edges of an external clock occurring on the SYNCIN lead. If the external clock frequency is outside the internal clock frequency by +25%, −35% the external clock is ignored and the internal clock free runs. 23 PROGRAM ENABLE programming input. See ENABLE for programming states. PROGRAM has at least 20 μA min. of available source current. 24 ENABLE PWM enable input. If PROGRAM is HIGH then a LOW on ENABLE will allow GATE1, GATE2 and GATE2B to switch. If PROGRAM is LOW then a HIGH on ENABLE will allow GATE1, GATE2 and GATE2B to switch. If ENABLE is left floating, it will pull up to a HIGH level. ENABLE has at least 100 μA (min) of available source current.

CS5106LSWR24 Reviews

Average User Rating
5 / 5 (141)
★ ★ ★ ★ ★
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127
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Kno*****ane

January 11, 2020

can supply almost all of my necessary parts in short lead time.

Tea***** Frye

December 26, 2019

These are great for projects with the kids or doing any type of DIY projects. The case is nice to keep everything separated. Very nice.

Ly***** Dey

October 1, 2019

I tested some and all look good.

Joha*****Sangha

September 19, 2019

Received the parts, and all parts are in tight packaging without any problems, professional seller.

Aliy*****ucas

September 12, 2019

I am a novice technician. I really rely on reviews to help guide me, as I do not have anyone to assist me with electronics. I purchased these items and report I am happy with the purchase. I took a chance and it was one of the better choices I made.

Guad*****e Dutt

August 19, 2019

These function just as well. You do need to spend some time modifying the harness, but no big deal.

Ani*****Boone

June 7, 2019

I love this website, and get a quick response. Good experience! Good customer service.

Ernes*****rillo

May 25, 2019

They were easy to work with and did what I expected.

Arya*****Nagar

May 24, 2019

To be honest, I think you are doing an outstanding job.

Xioma*****hnston

April 15, 2019

Awesome!!! great prices, easy to order and great service, thank you!

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hotCS5106LSWR24 BZX84C9V1ET3G ON Semiconductor, DIODE ZENER 9.1V 225MW SOT23-3, TO-236-3, SC-59, SOT-23-3, - View
hotCS5106LSWR24 MR854G ON Semiconductor, DIODE GEN PURP 400V 3A DO201AD, DO-201AA, DO-27, Axial, - View
hotCS5106LSWR24 CS5165AGDW16 ON Semiconductor, IC CTRLR BUCK SYNC 5BIT 16-SOIC, 16-SOIC (0.295", 7.50mm Width), - View
hotCS5106LSWR24 CS5157HGD16 ON Semiconductor, IC CTRLR BUCK SYNC 5BIT 16-SOIC, 16-SOIC (0.154", 3.90mm Width), - View
hotCS5106LSWR24 CS51412EMNR2G ON Semiconductor, IC REG BUCK ADJ 1.5A 18DFN, 18-VFDFN Exposed Pad, - View
hotCS5106LSWR24 CS5174GD8G ON Semiconductor, IC REG MULT CONFIG INV ADJ 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View
hotCS5106LSWR24 CS51414GD8 ON Semiconductor, IC REG BUCK ADJ 1.5A 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View
hotCS5106LSWR24 CS51412GD8G ON Semiconductor, IC REG BUCK ADJ 1.5A 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View
hotCS5106LSWR24 CS51414GDR8G ON Semiconductor, IC REG BUCK ADJ 1.5A 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View
hotCS5106LSWR24 CS5172GDR8 ON Semiconductor, IC REG MULT CONFIG INV ADJ 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View

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