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EP1S20F780I6

hot EP1S20F780I6

EP1S20F780I6

For Reference Only

Part Number EP1S20F780I6
Manufacturer Altera
Description IC FPGA 586 I/O 780FBGA
Datasheet EP1S20F780I6 Datasheet
Package 780-BBGA, FCBGA
In Stock 242 piece(s)
Unit Price $ 961.4033 *
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EP1S20F780I6 Specifications

ManufacturerAltera
CategoryIntegrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array)
Datasheet EP1S20F780I6 Datasheet
Package780-BBGA, FCBGA
SeriesStratix?
Number of LABs/CLBs1846
Number of Logic Elements/Cells18460
Total RAM Bits1669248
Number of I/O586
Voltage - Supply1.425 V ~ 1.575 V
Mounting TypeSurface Mount
Operating Temperature-40°C ~ 100°C (TJ)
Package / Case780-BBGA, FCBGA
Supplier Device Package780-FBGA (29x29)

EP1S20F780I6 Datasheet

Page 1

Page 2

101 Innovation Drive San Jose, CA 95134 (408) 544-7000 http://www.altera.com Stratix Device Handbook, Volume 1 S5V1-3.4

Page 3

Copyright © 2006 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device des- ignations, and all other words and logos that are identified as trademarks and/or service marks are, unless noted otherwise, the trademarks and service marks of Altera Corporation in the U.S. and other countries. All other product or service names are the property of their respective holders. Al- tera products are protected under numerous U.S. and foreign patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the ap- plication or use of any information, product, or service described herein except as expressly agreed to in writing by Altera Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published in- formation and before placing orders for products or services. ii Altera Corporation

Page 4

Altera Corporation iii Contents Chapter Revision Dates .......................................................................... vii About This Handbook .............................................................................. ix How to Find Information ........................................................................................................................ ix How to Contact Altera ............................................................................................................................. ix Typographic Conventions ........................................................................................................................ x Section I. Stratix Device Family Data Sheet Revision History ............................................................................................................................ Part I–1 Chapter 1. Introduction Introduction ............................................................................................................................................ 1–1 Features ................................................................................................................................................... 1–2 Chapter 2. Stratix Architecture Functional Description .......................................................................................................................... 2–1 Logic Array Blocks ................................................................................................................................ 2–3 LAB Interconnects ............................................................................................................................ 2–4 LAB Control Signals ......................................................................................................................... 2–5 Logic Elements ....................................................................................................................................... 2–6 LUT Chain & Register Chain .......................................................................................................... 2–8 addnsub Signal ................................................................................................................................. 2–8 LE Operating Modes ........................................................................................................................ 2–8 Clear & Preset Logic Control ........................................................................................................ 2–13 MultiTrack Interconnect ..................................................................................................................... 2–14 TriMatrix Memory ............................................................................................................................... 2–21 Memory Modes ............................................................................................................................... 2–22 Clear Signals .................................................................................................................................... 2–24 Parity Bit Support ........................................................................................................................... 2–24 Shift Register Support .................................................................................................................... 2–25 Memory Block Size ......................................................................................................................... 2–26 Independent Clock Mode .............................................................................................................. 2–44 Input/Output Clock Mode ........................................................................................................... 2–46 Read/Write Clock Mode ............................................................................................................... 2–49 Single-Port Mode ............................................................................................................................ 2–51 Multiplier Block .............................................................................................................................. 2–57 Adder/Output Blocks ................................................................................................................... 2–61 Modes of Operation ....................................................................................................................... 2–64

Page 5

iv Altera Corporation Contents Stratix Device Handbook, Volume 1 DSP Block Interface ........................................................................................................................ 2–70 PLLs & Clock Networks ..................................................................................................................... 2–73 Global & Hierarchical Clocking ................................................................................................... 2–73 Enhanced & Fast PLLs ................................................................................................................... 2–81 Enhanced PLLs ............................................................................................................................... 2–87 Fast PLLs ........................................................................................................................................ 2–100 I/O Structure ...................................................................................................................................... 2–104 Double-Data Rate I/O Pins ......................................................................................................... 2–111 External RAM Interfacing ........................................................................................................... 2–115 Programmable Drive Strength ................................................................................................... 2–119 Open-Drain Output ...................................................................................................................... 2–120 Slew-Rate Control ........................................................................................................................ 2–120 Bus Hold ........................................................................................................................................ 2–121 Programmable Pull-Up Resistor ................................................................................................ 2–122 Advanced I/O Standard Support .............................................................................................. 2–122 Differential On-Chip Termination ............................................................................................. 2–127 MultiVolt I/O Interface ............................................................................................................... 2–129 High-Speed Differential I/O Support ............................................................................................ 2–130 Dedicated Circuitry ...................................................................................................................... 2–137 Byte Alignment ............................................................................................................................. 2–140 Power Sequencing & Hot Socketing ............................................................................................... 2–140 Chapter 3. Configuration & Testing IEEE Std. 1149.1 (JTAG) Boundary-Scan Support ............................................................................ 3–1 SignalTap II Embedded Logic Analyzer ............................................................................................ 3–5 Configuration ......................................................................................................................................... 3–5 Operating Modes .............................................................................................................................. 3–5 Configuring Stratix FPGAs with JRunner .................................................................................... 3–7 Configuration Schemes ................................................................................................................... 3–7 Partial Reconfiguration .................................................................................................................... 3–7 Remote Update Configuration Modes .......................................................................................... 3–8 Stratix Automated Single Event Upset (SEU) Detection ................................................................ 3–12 Custom-Built Circuitry .................................................................................................................. 3–13 Software Interface ........................................................................................................................... 3–13 Temperature Sensing Diode ............................................................................................................... 3–13 Chapter 4. DC & Switching Characteristics Operating Conditions ........................................................................................................................... 4–1 Power Consumption ........................................................................................................................... 4–17 Timing Model ....................................................................................................................................... 4–19 Preliminary & Final Timing .......................................................................................................... 4–19 Performance .................................................................................................................................... 4–20 Internal Timing Parameters .......................................................................................................... 4–22 External Timing Parameters ......................................................................................................... 4–33 Stratix External I/O Timing .......................................................................................................... 4–36 I/O Timing Measurement Methodology .................................................................................... 4–60 External I/O Delay Parameters .................................................................................................... 4–66

Page 6

Altera Corporation v Contents Contents Maximum Input & Output Clock Rates ...................................................................................... 4–76 High-Speed I/O Specification ........................................................................................................... 4–87 PLL Specifications ................................................................................................................................ 4–94 DLL Specifications ............................................................................................................................. 4–102 Chapter 5. Reference & Ordering Information Software .................................................................................................................................................. 5–1 Device Pin-Outs ..................................................................................................................................... 5–1 Ordering Information ........................................................................................................................... 5–1 Index

Page 7

vi Altera Corporation Contents Stratix Device Handbook, Volume 1

Page 8

Altera Corporation vii Chapter Revision Dates The chapters in this book, Stratix Device Handbook, Volume 1, were revised on the following dates. Where chapters or groups of chapters are available separately, part numbers are listed. Chapter 1. Introduction Revised: July 2005 Part number: S51001-3.2 Chapter 2. Stratix Architecture Revised: July 2005 Part number: S51002-3.2 Chapter 3. Configuration & Testing Revised: July 2005 Part number: S51003-1.3 Chapter 4. DC & Switching Characteristics Revised: January 2006 Part number: S51004-3.4 Chapter 5. Reference & Ordering Information Revised: September 2004 Part number: S51005-2.1

Page 9

viii Altera Corporation Chapter Revision Dates Stratix Device Handbook, Volume 1

Page 10

Altera Corporation ix About This Handbook This handbook provides comprehensive information about the Altera® Stratix family of devices. How to Find Information You can find more information in the following ways: ■ The Adobe Acrobat Find feature, which searches the text of a PDF document. Click the binoculars toolbar icon to open the Find dialog box. ■ Acrobat bookmarks, which serve as an additional table of contents in PDF documents. ■ Thumbnail icons, which provide miniature previews of each page, provide a link to the pages. ■ Numerous links, shown in green text, which allow you to jump to related information. How to Contact Altera For the most up-to-date information about Altera products, go to the Altera world-wide web site at www.altera.com. For technical support on this product, go to www.altera.com/mysupport. For additional information about Altera products, consult the sources shown below. Information Type USA & Canada All Other Locations Technical support www.altera.com/mysupport/ www.altera.com/mysupport/ (800) 800-EPLD (3753) (7:00 a.m. to 5:00 p.m. Pacific Time) +1 408-544-8767 7:00 a.m. to 5:00 p.m. (GMT -8:00) Pacific Time Product literature www.altera.com www.altera.com Altera literature services literature@altera.com literature@altera.com Non-technical customer service (800) 767-3753 + 1 408-544-7000 7:00 a.m. to 5:00 p.m. (GMT -8:00) Pacific Time FTP site ftp.altera.com ftp.altera.com

EP1S20F780I6 Reviews

Average User Rating
5 / 5 (70)
★ ★ ★ ★ ★
5 ★
63
4 ★
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Vivi*****ridhar

December 28, 2019

The fastest shipping I've seen yet

Alia*****chal

December 1, 2019

Excellent safe and secure packing. Fast ship out. Thanks

Mali*****ischer

November 7, 2019

Great Seller, Great Item, the quality is great, Highly Recommended.

Lyl*****orton

October 23, 2019

happy with the IC and received with perfect packaging, good comunication with seller thanks.

Este*****Henson

October 10, 2019

Better than ever - more stock, better prices, quicker shipments, many choices of payment.

Mali*****raham

September 26, 2019

The items I want are often in stock and available in small quantities.

Henl*****atla

May 18, 2019

Worked good to turn my AC welder into a DC welder.

Arth*****ankar

March 13, 2019

Excellent company. Product as described. Usually fast and well packed.Very nice.

Ste***** Park

March 3, 2019

EVERY OK ...GOOD ITEM AND SUPERFAST SHIPPING

Jess*****Bandi

January 23, 2019

These are high quality connectors. They work as you would expect them to. There is not much else you can say about them.

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