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EP2AGX95EF29C4N

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EP2AGX95EF29C4N

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Part Number EP2AGX95EF29C4N
Manufacturer Altera
Description IC FPGA 372 I/O 780FBGA
Datasheet EP2AGX95EF29C4N Datasheet
Package 780-BBGA, FCBGA
In Stock 518 piece(s)
Unit Price $ 980.0003 *
Lead Time Can Ship Immediately
Estimated Delivery Time Sep 24 - Sep 29 (Choose Expedited Shipping)
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Part Number # EP2AGX95EF29C4N (Embedded - FPGAs (Field Programmable Gate Array)) is manufactured by Altera and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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EP2AGX95EF29C4N Specifications

ManufacturerAltera
CategoryIntegrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array)
Datasheet EP2AGX95EF29C4NDatasheet
Package780-BBGA, FCBGA
SeriesArria II GX
Number of LABs/CLBs3747
Number of Logic Elements/Cells89178
Total RAM Bits6839296
Number of I/O372
Number of Gates-
Voltage - Supply0.87 V ~ 0.93 V
Mounting TypeSurface Mount
Operating Temperature0°C ~ 85°C (TJ)
Package / Case780-BBGA, FCBGA
Supplier Device Package780-FBGA (29x29)

EP2AGX95EF29C4N Datasheet

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Arria II Device Handbook Volume 3: Device Datashee December 2013 AIIGX53001-4.4 © 2013 Altera Corporation. All rights reserved. ALTERA, ARR and/or trademarks of Altera Corporation in the U.S. and other www.altera.com/common/legal.html. Altera warrants perform reserves the right to make changes to any products and services information, product, or service described herein except as exp specifications before relying on any published information and December 2013 AIIGX53001-4.41. Device Datasheet for Arria II DevicesThis chapter describes the electrical and switching characteristics of the Arria® II device family. The Arria II device family includes the Arria II GX and GZ devices. Electrical characteristics include operating conditions and power consumption. Switching characteristics include transceiver specifications, core, and periphery performance. This chapter also describes I/O timing, including programmable I/O element (IOE) delay and programmable output buffer delay. f For information regarding the densities and packages of devices in the Arria II device family, refer to Overview for the Arria II Device Family chapter. This chapter contains the following sections: ■ “Electrical Characteristics” on page 1–1 ■ “Transceiver Performance Specifications” on page 1–21 ■ “Glossary” on page 1–74 Electrical Characteristics The following sections describe the electrical characteristics. Operating Conditions Arria II devices are rated according to a set of defined parameters. To maintain the highest possible performance and reliability of Arria II devices, you must consider the operating requirements described in this chapter. Arria II devices are offered in both commercial and industrial grades. Arria II GX devices are offered in –4 (fastest), –5, and –6 (slowest) commercial speed grades and –3 and –5 industrial speed grades. Arria II GZ devices are offered in –3 and –4 speed grades for both commercial and industrial grades. 1 In this chapter, a prefix associated with the operating temperature range is attached to the speed grades; commercial with the "C" prefix and industrial with the “I” prefix. Commercial devices are indicated as C4, C5, and C6 speed grade, and the industrial devices are indicated as I3 and I5. Absolute Maximum Ratings Absolute maximum ratings define the maximum operating conditions for Arria II devices. The values are based on experiments conducted with the device and theoretical modeling of breakdown and damage mechanisms. The functional operation of the device is not implied under these conditions. Table 1–1 lists the absolute maximum ratings for Arria II GX devices. Table 1–2 lists the absolute maximum ratings for Arria II GZ devices.t and Addendum Subscribe IA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off. countries. All other trademarks and service marks are the property of their respective holders as described at ance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any ressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device before placing orders for products or services.

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1–2 Chapter 1: Device Datasheet for Arria II Devices Electrical Characteristicsc Conditions beyond those listed in Table 1–1 and Table 1–2 may cause permanent damage to the device. Additionally, device operation at the absolute maximum ratings for extended periods of time may have adverse effects on the device. Table 1–1 lists the absolute maximum ratings for Arria II GX devices. Table 1–2 lists the absolute maximum ratings for Arria II GZ devices. Table 1–1. Absolute Maximum Ratings for Arria II GX Devices Symbol Description Minimum Maximum Unit VCC Supplies power to the core, periphery, I/O registers, PCI Express® (PIPE) (PCIe) HIP block, and transceiver PCS –0.5 1.35 V VCCCB Supplies power for the configuration RAM bits –0.5 1.8 V VCCBAT Battery back-up power supply for design security volatile key register –0.5 3.75 V VCCPD Supplies power to the I/O pre-drivers, differential input buffers, and MSEL circuitry –0.5 3.75 V VCCIO Supplies power to the I/O banks –0.5 3.9 V VCCD_PLL Supplies power to the digital portions of the PLL –0.5 1.35 V VCCA_PLL Supplies power to the analog portions of the PLL and device-wide power management circuitry –0.5 3.75 V VI DC input voltage –0.5 4.0 V IOUT DC output current, per pin –25 40 mA VCCA Supplies power to the transceiver PMA regulator — 3.75 V VCCL_GXB Supplies power to the transceiver PMA TX, PMA RX, and clocking — 1.21 V VCCH_GXB Supplies power to the transceiver PMA output (TX) buffer — 1.8 V TJ Operating junction temperature –55 125 °C TSTG Storage temperature (no bias) –65 150 °C Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 1 of 2) Symbol Description Minimum Maximum Unit VCC Supplies power to the core, periphery, I/O registers, PCIe HIP block, and transceiver PCS -0.5 1.35 V VCCCB Power supply to the configuration RAM bits -0.5 1.8 V VCCPGM Supplies power to the configuration pins -0.5 3.75 V VCCAUX Auxiliary supply -0.5 3.75 V VCCBAT Supplies battery back-up power for design security volatile key register -0.5 3.75 V VCCPD Supplies power to the I/O pre-drivers, differential input buffers, and MSEL circuitry -0.5 3.75 V VCCIO Supplies power to the I/O banks -0.5 3.9 V VCC_CLKIN Supplies power to the differential clock input -0.5 3.75 V VCCD_PLL Supplies power to the digital portions of the PLL -0.5 1.35 V VCCA_PLL Supplies power to the analog portions of the PLL and device-wide power management circuitry -0.5 3.75 V VI DC input voltage -0.5 4.0 V IOUT DC output current, per pin -25 40 mAArria II Device Handbook Volume 3: Device Datasheet and Addendum December 2013 Altera Corporation

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Chapter 1: Device Datasheet for Arria II Devices 1–3 Electrical CharacteristicsMaximum Allowed Overshoot and Undershoot Voltage During transitions, input signals may overshoot to the voltage shown in Table 1–3 and undershoot to –2.0 V for magnitude of currents less than 100 mA and periods shorter than 20 ns. Table 1–3 lists the Arria II GX and GZ maximum allowed input overshoot voltage and the duration of the overshoot voltage as a percentage over the device lifetime. The maximum allowed overshoot duration is specified as a percentage of high-time over the lifetime of the device. A DC signal is equivalent to 100% duty cycle. For example, a signal that overshoots to 4.3 V can only be at 4.3 V for 5.41% over the lifetime of the device; for a device lifetime of 10 years, this amounts to 5.41/10ths of a year. VCCA_L Supplies transceiver high voltage power (left side) -0.5 3.75 V VCCA_R Supplies transceiver high voltage power (right side) -0.5 3.75 V VCCHIP_L Supplies transceiver HIP digital power (left side) -0.5 1.35 V VCCR_L Supplies receiver power (left side) -0.5 1.35 V VCCR_R Supplies receiver power (right side) -0.5 1.35 V VCCT_L Supplies transmitter power (left side) -0.5 1.35 V VCCT_R Supplies transmitter power (right side) -0.5 1.35 V VCCL_GXBLn (1) Supplies power to the transceiver PMA TX, PMA RX, and clocking (left side) -0.5 1.35 V VCCL_GXBRn (1) Supplies power to the transceiver PMA TX, PMA RX, and clocking (right side) -0.5 1.35 V VCCH_GXBLn (1) Supplies power to the transceiver PMA output (TX) buffer (left side) -0.5 1.8 V VCCH_GXBRn (1) Supplies power to the transceiver PMA output (TX) buffer (right side) -0.5 1.8 V TJ Operating junction temperature -55 125 °C TSTG Storage temperature (no bias) -65 150 °C Note to Table 1–2: (1) n = 0, 1, or 2. Table 1–2. Absolute Maximum Ratings for Arria II GZ Devices (Part 2 of 2) Symbol Description Minimum Maximum UnitDecember 2013 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum

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1–4 Chapter 1: Device Datasheet for Arria II Devices Electrical CharacteristicsMaximum Allowed I/O Operating Frequency Table 1–4 lists the maximum allowed I/O operating frequency for Arria II GX I/Os using the specified I/O standards to ensure device reliability. Table 1–3. Maximum Allowed Overshoot During Transitions for Arria II Devices Symbol Description Condition (V) Overshoot Duration as % of High Time Unit VI (AC) AC Input Voltage 4.0 100.000 % 4.05 79.330 % 4.1 46.270 % 4.15 27.030 % 4.2 15.800 % 4.25 9.240 % 4.3 5.410 % 4.35 3.160 % 4.4 1.850 % 4.45 1.080 % 4.5 0.630 % 4.55 0.370 % 4.6 0.220 % Table 1–4. Maximum Allowed I/O Operating Frequency for Arria II GX Devices I/O Standard I/O Frequency (MHz) HSTL-18 and HSTL-15 333 SSTL -15 400 SSTL-18 333 2.5-V LVCMOS 260 3.3-V and 3.0-V LVTTL 250 3.3-V, 3.0-V, 1.8-V, and 1.5-V LVCMOS PCI and PCI-X SSTL-2 1.2-V LVCMOS HSTL-12 200Arria II Device Handbook Volume 3: Device Datasheet and Addendum December 2013 Altera Corporation

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Chapter 1: Device Datasheet for Arria II Devices 1–5 Electrical CharacteristicsRecommended Operating Conditions This section lists the functional operation limits for AC and DC parameters for Arria II GX and GZ devices. All supplies are required to monotonically reach their full-rail values without plateaus within tRAMP . Table 1–5 lists the recommended operating conditions for Arria II GX devices. Table 1–5. Recommended Operating Conditions for Arria II GX Devices (Note 1) (Part 1 of 2) Symbol Description Condition Minimum Typical Maximum Unit VCC Supplies power to the core, periphery, I/O registers, PCIe HIP block, and transceiver PCS — 0.87 0.90 0.93 V VCCCB Supplies power to the configuration RAM bits — 1.425 1.50 1.575 V VCCBAT (2) Battery back-up power supply for design security volatile key registers — 1.2 — 3.3 V VCCPD (3) Supplies power to the I/O pre-drivers, differential input buffers, and MSEL circuitry — 3.135 3.3 3.465 V — 2.85 3.0 3.15 V — 2.375 2.5 2.625 V VCCIO Supplies power to the I/O banks (4) — 3.135 3.3 3.465 V — 2.85 3.0 3.15 V — 2.375 2.5 2.625 V — 1.71 1.8 1.89 V — 1.425 1.5 1.575 V — 1.14 1.2 1.26 V VCCD_PLL Supplies power to the digital portions of the PLL — 0.87 0.90 0.93 V VCCA_PLL Supplies power to the analog portions of the PLL and device-wide power management circuitry — 2.375 2.5 2.625 V VI DC Input voltage — –0.5 — 3.6 V VO Output voltage — 0 — VCCIO V VCCA Supplies power to the transceiver PMA regulator — 2.375 2.5 2.625 V VCCL_GXB Supplies power to the transceiver PMA TX, PMA RX, and clocking — 1.045 1.1 1.155 V VCCH_GXB Supplies power to the transceiver PMA output (TX) buffer — 1.425 1.5 1.575 V TJ Operating junction temperature Commercial 0 — 85 °C Industrial –40 — 100 °CDecember 2013 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum

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1–6 Chapter 1: Device Datasheet for Arria II Devices Electrical CharacteristicsTable 1–6 lists the recommended operating conditions for Arria II GZ devices. tRAMP Power Supply Ramp time Normal POR 0.05 — 100 ms Fast POR 0.05 — 4 ms Notes to Table 1–5: (1) For more information about supply pin connections, refer to the Arria II Device Family Pin Connection Guidelines. (2) Altera recommends a 3.0-V nominal battery voltage when connecting VCCBAT to a battery for volatile key backup. If you do not use the volatile security key, you may connect the VCCBAT to either GND or a 3.0-V power supply. (3) VCCPD must be 2.5-V for I/O banks with 2.5-V and lower VCCIO, 3.0-V for 3.0-V VCCIO, and 3.3-V for 3.3-V VCCIO. (4) VCCIO for 3C and 8C I/O banks where the configuration pins reside only supports 3.3-, 3.0-, 2.5-, or 1.8-V voltage levels. Table 1–5. Recommended Operating Conditions for Arria II GX Devices (Note 1) (Part 2 of 2) Symbol Description Condition Minimum Typical Maximum Unit Table 1–6. Recommended Operating Conditions for Arria II GZ Devices (Note 6) (Part 1 of 2) Symbol Description Condition Minimum Typical Maximum Unit VCC Core voltage and periphery circuitry power supply — 0.87 0.90 0.93 V VCCCB Supplies power for the configuration RAM bits — 1.45 1.50 1.55 V VCCAUX Auxiliary supply — 2.375 2.5 2.625 V VCCPD (2) I/O pre-driver (3.0 V) power supply — 2.85 3.0 3.15 V I/O pre-driver (2.5 V) power supply — 2.375 2.5 2.625 V VCCIO I/O buffers (3.0 V) power supply — 2.85 3.0 3.15 V I/O buffers (2.5 V) power supply — 2.375 2.5 2.625 V I/O buffers (1.8 V) power supply — 1.71 1.8 1.89 V I/O buffers (1.5 V) power supply — 1.425 1.5 1.575 V I/O buffers (1.2 V) power supply — 1.14 1.2 1.26 V VCCPGM Configuration pins (3.0 V) power supply — 2.85 3.0 3.15 V Configuration pins (2.5 V) power supply — 2.375 2.5 2.625 V Configuration pins (1.8 V) power supply — 1.71 1.8 1.89 V VCCA_PLL PLL analog voltage regulator power supply — 2.375 2.5 2.625 V VCCD_PLL PLL digital voltage regulator power supply — 0.87 0.90 0.93 V VCC_CLKIN Differential clock input power supply — 2.375 2.5 2.625 V VCCBAT (1) Battery back-up power supply (For design security volatile key register) — 1.2 — 3.3 V VI DC input voltage — –0.5 — 3.6 V VO Output voltage — 0 — VCCIO V VCCA_L Transceiver high voltage power (left side) — 2.85/2.375 3.0/2.5 (4) 3.15/2.625 V VCCA_R Transceiver high voltage power (right side) — VCCHIP_L Transceiver HIP digital power (left side) — 0.87 0.9 0.93 V VCCR_L Receiver power (left side) — 1.05 1.1 1.15 V VCCR_R Receiver power (right side) — 1.05 1.1 1.15 V VCCT_L Transmitter power (left side) — 1.05 1.1 1.15 V VCCT_R Transmitter power (right side) — 1.05 1.1 1.15 VArria II Device Handbook Volume 3: Device Datasheet and Addendum December 2013 Altera Corporation

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Chapter 1: Device Datasheet for Arria II Devices 1–7 Electrical CharacteristicsDC Characteristics This section lists the supply current, I/O pin leakage current, on-chip termination (OCT) accuracy and variation, input pin capacitance, internal weak pull-up and pull-down resistance, hot socketing, and Schmitt trigger input specifications. Supply Current Standby current is the current the device draws after the device is configured with no inputs or outputs toggling and no activity in the device. Because these currents vary largely with the resources used, use the Microsoft Excel-based Early Power Estimator (EPE) to get supply current estimates for your design. f For more information about power estimation tools, refer to the PowerPlay Early Power Estimator User Guide and the PowerPlay Power Analysis chapter. VCCL_GXBLn (3) Transceiver clock power (left side) — 1.05 1.1 1.15 V VCCL_GXBRn (3) Transceiver clock power (right side) — 1.05 1.1 1.15 V VCCH_GXBLn (3) Transmitter output buffer power (left side) — 1.33/1.425 1.4/1.5 (5) 1.575 V VCCH_GXBRn (3) Transmitter output buffer power (right side) — TJ Operating junction temperature Commercial 0 — 85 °C Industrial –40 — 100 °C tRAMP Power supply ramp time Normal POR (PORSEL=0) 0.05 — 100 ms Fast POR (PORSEL=1) 0.05 — 4 ms Notes to Table 1–6: (1) Altera recommends a 3.0-V nominal battery voltage when connecting VCCBAT to a battery for volatile key backup. If you do not use the volatile security key, you may connect the VCCBAT to either GND or a 3.0-V power supply. (2) VCCPD must be 2.5 V when VCCIO is 2.5, 1.8, 1.5, or 1.2 V. VCCPD must be 3.0 V when VCCIO is 3.0 V. (3) n = 0, 1, or 2. (4) VCCA_L/R must be connected to a 3.0-V supply if the clock multiplier unit (CMU) phase-locked loop (PLL), receiver clock data recovery (CDR), or both, are configured at a base data rate > 4.25 Gbps. For data rates up to 4.25 Gbps, you can connect VCCA_L/R to either 3.0 V or 2.5 V. (5) VCCH_GXBL/R must be connected to a 1.4-V supply if the transmitter channel data rate is > 6.5 Gbps. For data rates up to 6.5 Gbps, you can connect VCCH_GXBL/R to either 1.4 V or 1.5 V. (6) Transceiver power supplies do not have power-on-reset (POR) circuitry. After initial power-up, violating the transceiver power supply operating conditions could lead to unpredictable link behavior. Table 1–6. Recommended Operating Conditions for Arria II GZ Devices (Note 6) (Part 2 of 2) Symbol Description Condition Minimum Typical Maximum UnitDecember 2013 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum

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1–8 Chapter 1: Device Datasheet for Arria II Devices Electrical Characteristics itI/O Pin Leakage Current Table 1–7 lists the Arria II GX I/O pin leakage current specifications. Table 1–8 lists the Arria II GZ I/O pin leakage current specifications. Bus Hold Bus hold retains the last valid logic state after the source driving it either enters the high impedance state or is removed. Each I/O pin has an option to enable bus hold in user mode. Bus hold is always disabled in configuration mode. Table 1–9 lists bus hold specifications for Arria II GX devices. Table 1–7. I/O Pin Leakage Current for Arria II GX Devices Symbol Description Conditions Min Typ Max Unit II Input pin VI = 0 V to VCCIOMAX –10 — 10 µA IOZ Tri-stated I/O pin VO = 0 V to VCCIOMAX –10 — 10 µA Table 1–8. I/O Pin Leakage Current for Arria II GZ Devices Symbol Description Conditions Min Typ Max Unit II Input pin VI = 0 V to VCCIOMAX –20 — 20 µA IOZ Tri-stated I/O pin VO = 0 V to VCCIOMAX –20 — 20 µA Table 1–9. Bus Hold Parameters for Arria II GX Devices (Note 1) Parameter Symbol Cond. VCCIO (V) Un1.2 1.5 1.8 2.5 3.0 3.3 Min Max Min Max Min Max Min Max Min Max Min Max Bus-hold low, sustaining current ISUSL VIN > VIL (max.) 8 — 12 — 30 — 50 — 70 — 70 — µA Bus-hold high, sustaining current ISUSH VIN < VIL (min.) –8 — –12 — –30 — –50 — –70 — –70 — µA Bus-hold low, overdrive current IODL 0 V < VIN < VCCIO — 125 — 175 — 200 — 300 — 500 — 500 µA Bus-hold high, overdrive current IODH 0 V < VIN < VCCIO — –125 — –175 — –200 — –300 — –500 — –500 µA Bus-hold trip point VTRIP — 0.3 0.9 0.375 1.125 0.68 1.07 0.7 1.7 0.8 2 0.8 2 V Note to Table 1–9: (1) The bus-hold trip points are based on calculated input voltages from the JEDEC standard. Arria II Device Handbook Volume 3: Device Datasheet and Addendum December 2013 Altera Corporation

Page 10

Chapter 1: Device Datasheet for Arria II Devices 1–9 Electrical CharacteristicsTable 1–10 lists the bus hold specifications for Arria II GZ devices. OCT Specifications Table 1–11 lists the Arria II GX device and differential OCT with and without calibration accuracy. Table 1–10. Bus Hold Parameters for Arria II GZ Devices Parameter Symbol Cond. VCCIO (V) Unit1.2 1.5 1.8 2.5 3.0 Min Max Min Max Min Max Min Max Min Max Bus-hold Low sustaining current ISUSL VIN > VIL (max.) 22.5 — 25.0 — 30.0 — 50.0 — 70.0 — µA Bus-hold High sustaining current ISUSH VIN < VIH (min.) -22.5 — -25.0 — -30.0 — -50.0 — -70.0 — µA Bus-hold Low overdrive current IODL 0V < VIN < VCCIO — 120 — 160 — 200 — 300 — 500 µA Bus-hold High overdrive current IODH 0V < VIN < VCCIO — -120 — -160 — -200 — -300 — -500 µA Bus-hold trip point VTRIP — 0.45 0.95 0.50 1.00 0.68 1.07 0.70 1.70 0.80 2.00 V Table 1–11. OCT With and Without Calibration Specification for Arria II GX Device I/Os (Note 1) (Part 1 of 2) Symbol Description Conditions (V) Calibration Accuracy Unit Commercial Industrial 25- RS 3.0, 2.5 25- series OCT without calibration VCCIO = 3.0, 2.5 ± 30 ± 40 % 50- RS 3.0, 2.5 50- series OCT without calibration VCCIO = 3.0, 2.5 ± 30 ± 40 % 25- RS 1.8 25- series OCT without calibration VCCIO = 1.8 ± 40 ± 50 % 50- RS 1.8 50- series OCT without calibration VCCIO = 1.8 ± 40 ± 50 % 25- RS 1.5, 1.2 25- series OCT without calibration VCCIO = 1.5, 1.2 ± 50 ± 50 % 50- RS 1.5, 1.2 50- series OCT without calibration VCCIO = 1.5, 1.2 ± 50 ± 50 % 25- RS 3.0, 2.5, 1.8, 1.5, 1.2 25- series OCT with calibration VCCIO = 3.0, 2.5, 1.8, 1.5, 1.2 ± 10 ± 10 %December 2013 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum

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