FDS86267P

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May 2015 ©2015 Fairchild Semiconductor Corporation FDS86267P Rev 1.0 www.fairchildsemi.com1 F D S 8 6267P P -C h an n el S h ield ed G ate P o w erT ren ch ® M O S F E TSO-8 D D D D S S S G Pin 1 G S S S D D D D 4 3 2 1 5 6 7 8 FDS86267P P-Channel Shielded Gate PowerTrench® MOSFET -150 V, -2.2 A, 255 mΩ Features Shielded Gate MOSFET Technology Max rDS(on) = 255 mΩ at VGS = -10 V, ID = -2.2 A Max rDS(on) = 290 mΩ at VGS = -6 V, ID = -2 A Very Low rDS(on) Mid Voltage P-channel Silicon Technology Optimised for Low Qg This Product is Optimised for Fast Switching Applications as well as Load Switch Applications 100% UIL Tested RoHS Compliant General Description This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced PowerTrench® process that incorporates shielded gate technology. The process has been optimized for the on-state resistance and yet maintain superior switching performance. Applications Active Clamp Switch Load Switch MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Thermal Characteristics Package Marking and Ordering Information Symbol Parameter Ratings Units VDS Drain to Source Voltage -150 V VGS Gate to Source Voltage ±25 V ID Drain Current -Continuous (Note 1a) -2.2 A -Pulsed (Note 4) -34 EAS Single Pulse Avalanche Energy (Note 3) 54 mJ PD Power Dissipation TA = 25 °C (Note 1a) 2.5 W Power Dissipation TA = 25 °C (Note 1b) 1.0 TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C RθJA Thermal Resistance, Junction to Ambient (Note 1a) 50 °C/W RθJA Thermal Resistance, Junction to Ambient (Note 1b) 125 Device Marking Device Package Reel Size Tape Width Quantity FDS86267P FDS86267P SO-8 13 ’’ 12 mm 2500 units

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www.fairchildsemi.com2©2015 Fairchild Semiconductor Corporation FDS86267P Rev 1.0 F D S 8 6267P P -C h an n el S h ield ed G ate P o w erT ren ch ® M O S F E T Electrical Characteristics TJ = 25 °C unless otherwise noted. Off Characteristics On Characteristics Dynamic Characteristics Switching Characteristics Drain-Source Diode Characteristics Symbol Parameter Test Conditions Min. Typ. Max. Units BVDSS Drain to Source Breakdown Voltage ID = -250 μA, VGS = 0 V -150 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C -121 mV/°C IDSS Zero Gate Voltage Drain Current VDS = -120 V, VGS = 0 V -1 μA IGSS Gate to Source Leakage Current VGS = ±25 V, VDS = 0 V ±100 nA VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250 μA -2 -3 -4 V ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250 μA, referenced to 25 °C 5 mV/°C rDS(on) Static Drain to Source On Resistance VGS = -10 V, ID = -2.2 A 191 255 mΩVGS = -6 V, ID = -2 A 214 290 VGS = -10 V, ID = -2.2 A,TJ = 125 °C 342 448 gFS Forward Transconductance VDS = -10 V, ID = -2.2 A 6.8 S Ciss Input Capacitance VDS = -75 V, VGS = 0 V, f = 1 MHz 806 1130 pF Coss Output Capacitance 54 75 pF Crss Reverse Transfer Capacitance 1.6 2.3 pF Rg Gate Resistance 0.1 3 6 Ω td(on) Turn-On Delay Time VDD = -75 V, ID = -2.2 A, VGS = -10 V, RGEN = 6 Ω 9.7 20 ns tr Rise Time 2.5 10 ns td(off) Turn-Off Delay Time 17 30 ns tf Fall Time 5.7 12 ns Qg Total Gate Charge VGS = 0 V to -10 V VDD = -75 V, ID = -2.2 A 11 16 nC Qg Total Gate Charge VGS = 0 V to -6 V 7 10 nC Qgs Gate to Source Charge 3.2 nC Qgd Gate to Drain “Miller” Charge 1.9 nC VSD Source-Drain Diode Forward Voltage VGS = 0 V, IS = -2.2 A (Note 2) -0.8 -1.3 V VGS = 0 V, IS = -2 A (Note 2) -0.8 -1.2 trr Reverse Recovery Time IF = -2.2 A, di/dt = 100 A/μs 65 104 ns Qrr Reverse Recovery Charge 157 251 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Starting TJ = 25 °C, L = 3 mH, IAS = -6 A, VDD = -150 V, VGS = -10 V. 100% tested at L = 0.3 mH, IAS = -13 A. 4. Pulsed Id please refer to Fig 11 SOA graph for more details. a) 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b) 125 °C/W when mounted on a minimum pad. G D F D S S F S S G D F D S S F S S

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www.fairchildsemi.com3©2015 Fairchild Semiconductor Corporation FDS86267P Rev 1.0 F D S 8 6267P P -C h an n el S h ield ed G ate P o w erT ren ch ® M O S F E T Typical Characteristics TJ = 25 °C unless otherwise noted Figure 1. 0 1 2 3 4 5 0 2 4 6 8 10 VGS = -5.5 V VGS = -5 V VGS = -6 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX VGS = -4.5 V VGS = -10 V -I D , D R A IN C U R R E N T ( A ) -VDS, DRAIN TO SOURCE VOLTAGE (V) On Region Characteristics Figure 2. 0 2 4 6 8 10 0 10 20 30 40 VGS = -5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX N O R M A L IZ E D D R A IN T O S O U R C E O N -R E S IS T A N C E -ID, DRAIN CURRENT (A) VGS = -5.5 V VGS = -6 V VGS = -4.5 V VGS = -10 V Normalized On-Resistance vs Drain Current and Gate Voltage Figure 3. Normalized On Resistance -75 -50 -25 0 25 50 75 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 ID = -2.2 A VGS = -10 V N O R M A L IZ E D D R A IN T O S O U R C E O N -R E S IS T A N C E TJ, JUNCTION TEMPERATURE (oC) vs Junction Temperature Figure 4. 4 5 6 7 8 9 10 0 500 1000 1500 TJ = 125 oC ID = -2.2 A TJ = 25 oC -VGS, GATE TO SOURCE VOLTAGE (V) r D S (o n ), D R A IN T O S O U R C E O N -R E S IS T A N C E ( m Ω ) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX On-Resistance vs Gate to Source Voltage Figure 5. Transfer Characteristics 2 3 4 5 6 7 0 2 4 6 8 10 TJ = 150 oC VDS = -5 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX TJ = -55 oC TJ = 25 oC -I D , D R A IN C U R R E N T ( A ) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 6. 0.0 0.3 0.6 0.9 1.2 1.5 0.001 0.01 0.1 1 10 TJ = -55 oC TJ = 25 oC TJ = 150 oC VGS = 0 V -I S , R E V E R S E D R A IN C U R R E N T ( A ) -VSD, BODY DIODE FORWARD VOLTAGE (V) Source to Drain Diode Forward Voltage vs Source Current

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www.fairchildsemi.com4©2015 Fairchild Semiconductor Corporation FDS86267P Rev 1.0 F D S 8 6267P P -C h an n el S h ield ed G ate P o w erT ren ch ® M O S F E T Figure 7. 0 3 6 9 12 0 2 4 6 8 10 ID = -2.2 A VDD = -100 V VDD = -50 V -V G S , G A T E T O S O U R C E V O L T A G E ( V ) Qg, GATE CHARGE (nC) VDD = -75 V Gate Charge Characteristics Figure 8. 0.1 1 10 100 1 10 100 1000 f = 1 MHz VGS = 0 V C A P A C IT A N C E ( p F ) -VDS, DRAIN TO SOURCE VOLTAGE (V) Crss Coss Ciss Capacitance vs Drain to Source Voltage Figure 9. 0.001 0.01 0.1 1 10 1 10 50 TJ = 125 oC TJ = 25 oC TJ = 100 oC tAV, TIME IN AVALANCHE (ms) -I A S , A V A L A N C H E C U R R E N T ( A ) Unclamped Inductive Switching Capability Figure 10. 25 50 75 100 125 150 0.0 0.4 0.8 1.2 1.6 2.0 2.4 VGS = -6 V RθJA = 50 oC/W VGS = -10 V -I D , D R A IN C U R R E N T ( A ) TC, CASE TEMPERATURE ( o C) Maximum Continuous Drain Current vs Ambient Temperature Figure 11. Forward Bias Safe Operating Area 0.01 0.1 1 10 100 1000 0.001 0.01 0.1 1 10 100 10 s CURVE BENT TO MEASURED DATA 100 μs 10 ms DC 1 s 100 ms 1 ms -I D , D R A IN C U R R E N T ( A ) -VDS, DRAIN to SOURCE VOLTAGE (V) THIS AREA IS LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED RθJA = 125 oC/W TA = 25 oC Figure 12. Single Pulse Maximum Power Dissipation 10-4 10-3 10-2 10-1 1 10 100 1000 0.1 1 10 100 1000 SINGLE PULSE RθJA = 125 oC/W TA = 25 oC P ( P K ), P E A K T R A N S IE N T P O W E R ( W ) t, PULSE WIDTH (sec) Typical Characteristics TJ = 25 °C unless otherwise noted

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