ICM7228AIPI

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FN3160 Rev 9.00 Page 1 of 19 August 19, 2015 FN3160 Rev 9.00 August 19, 2015 ICM7228 8-Digit, Microprocessor-Compatible, LED Display Decoder Driver DATASHEET The Intersil ICM7228 display driver interfaces microprocessors to an 8-digit, 7-segment, numeric LED display. Included on chip are two types of 7-segment decoder, multiplex scan circuitry, LED display segment drivers, LED display digit drivers and an 8-byte static memory as display RAM. Data can be written to the ICM7228A and ICM7228B’s display RAM in sequential 8-digit update or in single-digit update format. Data is written to the ICM7228C display RAM in parallel random access format. The ICM7228A and ICM7228C drive common anode displays. The ICM7228B drives common cathode displays. All versions can display the RAM data as either Hexadecimal or Code B format. The ICM7228A and ICM7228B incorporate a No Decode mode allowing each bit of each digit's RAM word to drive individual display segments resulting in independent control of all display segments. As a result, bargraph and other irregular display segments and formats can be driven directly by this chip. The Intersil ICM7228 is an alternative to both the Maxim ICM7218 and the Intersil ICM7218 display drivers. Notice that the ICM7228A/B has an additional single digit access mode. This could make the Intersil ICM7218A/B software incompatible with ICM7228A/B operation. Features • Pb-Free Plus Anneal Available (RoHS Compliant) • Improved 2nd Source to Maxim ICM7218 • Fast Write Access Time of 200ns • Multiple Microprocessor Compatible Versions • Hexadecimal, Code B and No Decode Modes • Individual Segment Control with “No Decode” Feature • Digit and Segment Drivers On-Chip • Non-Overlapping Digits Drive • Common Anode and Common Cathode LED Versions • Low Power CMOS Architecture • Single 5V Supply Applications • Instrumentation • Test Equipment • Hand Held Instruments • Bargraph Displays • Numeric and Non-Numeric Panel Displays • High and Low Temperature Environments where LCD Display Integrity is Compromised

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ICM7228Ordering Information PART NUMBER PART MARKING DATA ENTRY PROTOCOL DISPLAY TYPE TEMP. RANGE (°C) PACKAGE PKG. DWG. # ICM7228AIBI (No longer available, recommended replacement: ICM7228AIBIZ) ICM7228AIBI Sequential Common Anode -40 to 85 28 Ld SOIC M28.3 ICM7228AIBIZ (Note) 7228AIBIZ Sequential Common Anode -40 to 85 28 Ld SOIC (Pb-free) M28.3 ICM7228AIPI (No longer available, recommended replacement: ICM7228AIPIZ) ICM7228AIPI Sequential Common Anode -40 to 85 28 Ld PDIP E28.6 ICM7228AIPIZ (Note) ICM7228AIPI Sequential Common Anode -40 to 85 28 Ld PDIP* (Pb-free) E28.6 ICM7228BIBI (No longer available, recommended replacement: ICM7228BIBIZ) ICM7228BIBI Sequential Common Cathode -40 to 85 28 Ld SOlC M28.3 ICM7228BIBIZ (Note) ICM7228BIBIZ Sequential Common Cathode -40 to 85 28 Ld SOlC (Pb-free) M28.3 ICM7228BIPI (No longer available, recommended replacement: ICM7228BIPIZ) ICM7228BIPI Sequential Common Cathode -40 to 85 28 Ld PDIP E28.6 ICM7228BIPIZ (Note) ICM7228BIPIZ Sequential Common Cathode -40 to 85 28 Ld PDIP (Pb-free) E28.6 ICM7228CIBI (No longer available, recommended replacement: ICM7228CIBIZ) ICM7228CIBI Random Common Anode -40 to 85 28 Ld SOlC M28.3 ICM7228CIBIZ (Note) ICM7228CIBIZ Random Common Anode -40 to 85 28 Ld SOlC (Pb-free) M28.3 ICM7228CIPI (No longer available, recommended replacement: ICM7228CIPIZ) ICM7228CIPI Random Common Anode -40 to 85 28 Ld PDIP E28.6 ICM7228CIPIZ (Note) ICM7228CIPI Random Common Anode -40 to 85 28 Ld PDIP (Pb-free) E28.6 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.FN3160 Rev 9.00 Page 2 of 19 August 19, 2015

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ICM7228Pinouts ICM7228A (PDIP, SOIC) COMMON ANODE TOP VIEW ICM7228B (PDIP, SOIC) COMMON CATHODE TOP VIEW ICM7228C (PDIP, SOIC) COMMON ANODE TOP VIEW SEG c SEG e SEG b DP ID6 (HEXA/CODE B) ID5 (DECODE) ID7 (DATA COMING) WRITE MODE ID4 (SHUTDOWN) ID1 ID0 ID2 ID3 VSS SEG g SEG d SEG f DIGIT 3 DIGIT 7 VDD DIGIT 8 DIGIT 5 DIGIT 2 DIGIT 1 SEG a DIGIT 6 DIGIT 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 DIGIT 4 DIGIT 6 DIGIT 3 DIGIT 1 ID6 (HEXA/CODE B) ID5 (DECODE) ID7 (DATA COMING) WRITE MODE ID4 (SHUTDOWN) ID1 ID0 ID2 ID3 VSS DIGIT 5 DIGIT 2 DIGIT 8 SEG g SEG e VDD SEG d SEG b SEG a DP DIGIT 7 SEG f SEG c 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 SEG c SEG e SEG b DP DA0 (DIGIT ADDRESS 0) DA1 (DIGIT ADDRESS 1) ID7 (INPUT DP) WRITE HEXA/CODE B/SHUTDOWN DA2 (DIGIT ADDRESS 2) ID1 ID0 ID2 ID3 VSS SEG g SEG d SEG f DIGIT 3 DIGIT 7 VDD DIGIT 8 DIGIT 5 DIGIT 2 DIGIT 1 SEG a DIGIT 6 DIGIT 4 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14FN3160 Rev 9.00 Page 3 of 19 August 19, 2015

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ICM7228Functional Block Diagram 8 SEGMENT DRIVERS 8 DIGIT DRIVERS DECODE NO-DECODE 8-BYTE STATIC RAM HEXADECIMAL/ CODE B DECODER MULTIPLEX OSCILLATOR WRITE ADDRESS COUNTER CONTROL LOGIC READ ADDRESS, DIGIT MULTIPLEXER ICM7228A, ICM7228B ID0 - ID7 INPUT DATA ID4 - ID7 CONTROL INPUTS MODE WRITE SHUTDOWN HEXA/CODE B DECODE INTERDIGIT BLANKING DECIMAL POINT 8 8 4 1 1 1 1 4 7 7 7 8 8 8 1 1 3 18 1 7 1 8 SEGMENT DRIVERS 8 DIGIT DRIVERS 8-BYTE STATIC RAM HEXADECIMAL/ CODE B DECODER MULTIPLEX OSCILLATOR WRITE ADDRESS COUNTER THREE LEVEL INPUT LOGIC READ ADDRESS MULTIPLEXER ICM7228C WRITE SHUTDOWN INTERDIGIT BLANKING DECIMAL POINT 1 5 1 1 4 7 8 8 8 5 18 1 1 DA0 - DA2 3 DIGIT ADDRESS ID0 - ID3 ID7 DATA INPUT HEXADECIMAL/ CODE B/ SHUTDOWNFN3160 Rev 9.00 Page 4 of 19 August 19, 2015

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ICM7228Absolute Maximum Ratings Thermal Information Supply Voltage (VDD - VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6V Digit Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA Segment Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Input Voltage (Note 1) (Any Terminal) . . (VSS-0.3V)

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ICM7228Input Leakage Current, IIL All Inputs Except Pin 9, ICM7228C, VIN = VSS - - 1 - - 1 A All Inputs Except Pin 9, ICM7228C, VIN = 5.0V - - -1 - - -1 Display Scan Rate, fMUX Per Digit - 390 - - 390 - Hz Inter-Digit Blanking Time, tIDB 2 10 - 2 - - s Logical “1” Input Voltage, VINH Three Level Input: Pin 9 ICM7228C, Hexadecimal VDD = 5V 4.2 - - 4.2 - - V Floating Input, VINF Three Level Input: Pin 9 ICM7228C, Code B, VDD = 5V 2.0 - 3.0 2.0 - 3.0 V Logical “0” Input Voltage, VINL Three Level Input: Pin 9 ICM7228C, Shutdown, VDD = 5V - - 0.8 - - 0.8 V Three Level Input Impedance, ZIN VCC = 5V, Pin 9 of ICM7228C 50 - - 50 - - k Logical “1” Input Voltage, VIH All Inputs Except, Pin 9 of ICM7228C, VDD = 5V 2.0 - - 2.0 - - V Logical “0” Input Voltage, VIL All Inputs Except, Pin 9 of ICM7228C, VDD = 5V - - 0.8 - - 0.8 V SWITCHING SPECIFICATIONS VDD = +5.0V 10%, VSS = 0V, VIL = +0.4V, VIH = +2.4V Write Pulsewidth (Low), tWL 200 100 - 250 - - ns Write Pulsewidth (High), tWH 850 540 - 1200 - - ns Mode Hold Time, tMH ICM7228A, ICM7228B 0 -65 - 0 - - ns Mode Setup Time, tMS ICM7228A, ICM7228B 250 150 - 250 - - ns Data Setup Time, tDS 250 160 - 250 - - ns Data Hold Time, tDH 0 -60 - 0 - - ns Digit Address Setup Time, tAS ICM7228C 250 110 - 250 - - ns Digit Address Hold Time, tAH ICM7228C 0 -60 - 0 - - ns Electrical Specifications VDD = +5.0V ±10%, VSS = 0V, Unless Otherwise Specified (Continued) PARAMETER TEST CONDITIONS TA = 25 oC -40oC TO 85oC UNITSMIN TYP MAX MIN TYP MAXFN3160 Rev 9.00 Page 6 of 19 August 19, 2015

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ICM7228Timing Diagrams FIGURE 1. ICM7228A/B WRITE CYCLE FIGURE 2. ICM7228A/B SEQUENTIAL 8-DIGIT RAM UPDATE FIGURE 3. ICM7228C WRITE CYCLE FIGURE 4. DISPLAY DIGITS MULTIPLEX (COMMON ANODE DISPLAY) tMS tWL tDS tMH MODE INPUT VALIDDATA tDH tWH WRITE DECODE/NO DECODE? ID5 (D8)(D1) MODE CONTROL WORD TYPE OF DECODER?ID6 DECODE/NO DECODE? ID5 SHUTDOWN?ID4 DATA COMING ID7 CONTROL WORD TYPE OF DECODER?ID6 SHUTDOWN? ID4 DATA COMING ID7 DON’T CAREWRITE DATA 8 PULSES WRITE VALID DATA VALID tWL tWH tAS tAH tDHtDS DATA WRITE DIGIT ADDRESS DAO-DAZ INTERDIGIT BLANKING INTERNAL SIGNAL TYPICAL DIGITS OUTPUT PULSES 10s (TYP) FREE RUNNING 320s (TYP) FREE RUNNING (PER DIGIT) INTERDIGIT BLANKING D2 D5 D1 D7 D8 D6 D4 D3FN3160 Rev 9.00 Page 7 of 19 August 19, 2015

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ICM7228Typical Performance Curves FIGURE 5. COMMON ANODE DIGIT DRIVER IDIG vs (VDD - VDIG) FIGURE 6. COMMON ANODE SEGMENT DRIVER ISEG vs VSEG FIGURE 7. COMMON CATHODE DIGIT DRIVER IDIG vs VDIG FIGURE 8. COMMON CATHODE SEGMENT DRIVER ISEG vs (VDD - VSEG) TABLE 1. ICM7228A PIN ASSIGNMENTS AND DESCRIPTIONS PIN NO. NAME FUNCTION DESCRIPTION 1 SEG c Output LED Display Segments c, e, b and Decimal Point Drive Lines. 2 SEG e 3 SEG b 4 DP 5 ID6, (HEXA/CODE B) Input When “MODE” Low: Display Data Input, Bit 7. When “MODE” High: Control Bit, Decoding Scheme Selection: High, Hexadecimal Decoding; Low, Code B Decoding. 6 ID5, (DECODE) Input When “MODE” Low: Display Data Input, Bit 6. When “MODE” High: Control Bit, Decode/No Decode Selection: High, No Decode; Low, Decode. 7 ID7, (DATA COMING) Input When “MODE” Low: Display Data Input, Bit 8, Decimal Point Data. When “MODE” High: Control Bit, Sequential Data Update Select: High, Data Coming; Low, No Data Coming. 8 WRITE Input Data Input Will Be Written to Control Register or Display RAM on Rising Edge of WRITE. VDD-VDIG (V) I D IG ( m A ) 0 100 200 300 400 500 01.02.03.04.05.0 -55oC 25oC 125oC -55oC 25oC 125oC VSEG (V) I S E G ( m A ) 80 60 40 20 0 0 1.0 2.0 3.0 4.0 5.0 -55oC 25oC 125oC VDIG (V) I D IG ( m A ) 300 200 100 0 0 1.0 2.0 3.0 4.0 5.0 -55oC 25oC 125oC VDD-VSEG (V) 0 10 20 30 40 50 01.02.03.04.05.0 I S E G ( m A ) -55oC 25oC 125oCFN3160 Rev 9.00 Page 8 of 19 August 19, 2015

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ICM72289 MODE Input Selects Data to Be Loaded to Control Register or Display RAM: High, Loads Control Register; Low, Loads Display RAM. 10 ID4, (SHUTDOWN) Input When “MODE” Low: Display Data Input, Bit 5. When “MODE” High: Control Bit, Low Power Mode Select: High, Normal Operation; Low, Oscillator and Display Disabled. 11 ID1 Input When “MODE” Low: Display Data Input, Bit 2. When “MODE” High and “ID7 (DATA COMING)” Low: Digit Address, Bit 2, Single Digit Update Mode. 12 ID0 Input When “MODE” Low: Display Data Input, Bit 1. When “MODE” High and “ID7 (DATA COMING)” Low: Digit Address, LSB, Single Digit Update Mode. 13 ID2 Input When “MODE” Low: Display Data Input, Bit 3. When “MODE” High and “ID7 (DATA COMING)” Low: Digit Address, MSB, Single Digit Update Mode. 14 ID3 Input When “MODE” Low: Display Data Input, Bit 4. When “MODE” High: RAM Bank Select (Decode Modes Only): High, RAM Bank A; Low, RAM Bank B 15 DIGIT 1 Output LED Display Digits 1, 2, 5 and 8 Drive Lines. 16 DlGlT 2 17 DIGIT 5 18 DlGlT 8 19 VDD Supply Device Positive Power Supply Rail. 20 DIGIT 4 Output LED Display Digits 4, 7, 6 and 3 Drive Lines. 21 DlGlT 7 22 DlGlT 6 23 DIGlT 3 24 SEG f Output LED Display Segments f, d, g and a Drive Lines. 25 SEG d 26 SEG g 27 SEG a 28 VSS Supply Device Ground or Negative Power Supply Rail. TABLE 2. ICM7228B PIN ASSIGNMENTS AND DESCRIPTIONS PIN NO. NAME FUNCTION DESCRIPTION 1 DIGIT 4 Output LED Display Digits 4, 6, 3 and 1 Drive Lines. 2 DlGlT 6 3 DIGIT 3 4 DlGlT 1 5 ID6, (HEXA/CODE B) Input When “MODE” Low: Display Data Input, Bit 7. When “MODE” High: Control Bit, Decoding Scheme Selection: High, Hexadecimal Decoding; Low, Code B Decoding. 6 ID5, (DECODE) Input When “MODE” Low: Display Data Input, Bit 6. When “MODE” High: Control Bit, Decode/No Decode Selection: High, No Decode; Low, Decode. 7 ID7, (DATA COMING) Input When “MODE” Low: Display Data Input, Bit 8, Decimal Point Data. When “MODE” High: Control Bit, Sequential Data Update Select: High, Data Coming; Low, No Data Coming. TABLE 1. ICM7228A PIN ASSIGNMENTS AND DESCRIPTIONS (Continued) PIN NO. NAME FUNCTION DESCRIPTIONFN3160 Rev 9.00 Page 9 of 19 August 19, 2015