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IR21094PBF

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IR21094PBF

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Part Number IR21094PBF
Manufacturer Infineon Technologies
Description IC DRIVER HALF-BRIDGE 14-DIP
Datasheet IR21094PBF Datasheet
Package 14-DIP (0.300", 7.62mm)
In Stock 335 piece(s)
Unit Price $ 2.8900 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jun 1 - Jun 6 (Choose Expedited Shipping)
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Part Number # IR21094PBF (PMIC - Gate Drivers) is manufactured by Infineon Technologies and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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IR21094PBF Specifications

ManufacturerInfineon Technologies
CategoryIntegrated Circuits (ICs) - PMIC - Gate Drivers
Datasheet IR21094PBFDatasheet
Package14-DIP (0.300", 7.62mm)
Series-
Driven ConfigurationHalf-Bridge
Channel TypeSynchronous
Number of Drivers2
Gate TypeIGBT, N-Channel MOSFET
Voltage - Supply10 V ~ 20 V
Logic Voltage - VIL, VIH0.8V, 2.9V
Current - Peak Output (Source, Sink)200mA, 350mA
Input TypeNon-Inverting
High Side Voltage - Max (Bootstrap)600V
Rise / Fall Time (Typ)150ns, 50ns
Operating Temperature-40°C ~ 150°C (TJ)
Mounting TypeThrough Hole
Package / Case14-DIP (0.300", 7.62mm)
Supplier Device Package14-DIP

IR21094PBF Datasheet

Page 1

Page 2

Typical Connection HALF-BRIDGE DRIVER Features • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune • Gate drive supply range from 10 to 20V • Undervoltage lockout for both channels • 3.3V, 5V and 15V input logic compatible • Cross-conduction prevention logic • Matched propagation delay for both channels • High side output in phase with IN input • Logic and power ground +/- 5V offset. • Internal 540ns dead-time, and programmable up to 5us with one external RDT resistor (IR21094) • Lower di/dt gate driver for better noise immunity • Shut down input turns off both channels. • Available in Lead-Free Description The IR2109(4)(S) are high voltage, high speed power MOSFET and IGBT drivers with dependent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable rugge- dized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high IR21094 IR2109 Packages IR2109(4) (S) & (PbF) Data Sheet No. PD60163-U VOFFSET 600V max. IO+/- 120 mA / 250 mA VOUT 10 - 20V ton/off (typ.) 750 & 200 ns Dead Time 540 ns (programmable up to 5uS for IR21094) Product Summary www.irf.com 1 VCC VB VS HO LOCOM IN SDSD IN up to 600V TO LOAD VCC IN up to 600V TO LOAD VCC VB VS HO LO COM IN DT VSS SD VCC SD VSS RDT 8 Lead PDIP 14 Lead PDIP 8 Lead SOIC 14 Lead SOIC pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. (Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.

Page 3

IR2109(4) (S) & (PbF) 2 www.irf.com Symbol Definition Min. Max. Units VB High side floating absolute voltage -0.3 625 VS High side floating supply offset voltage VB - 25 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VCC Low side and logic fixed supply voltage -0.3 25 VLO Low side output voltage -0.3 VCC + 0.3 DT Programmable dead-time pin voltage (IR21094 only) VSS - 0.3 VCC + 0.3 VIN Logic input voltage (IN & SD) VSS - 0.3 VCC + 0.3 VSS Logic ground (IR21094/IR21894 only) VCC - 25 VCC + 0.3 dVS/dt Allowable offset supply voltage transient — 50 V/ns PD Package power dissipation @ TA ≤ +25C (8 Lead PDIP) — 1.0 (8 Lead SOIC) — 0.625 (14 lead PDIP) — 1.6 (14 lead SOIC) — 1.0 RthJA Thermal resistance, junction to ambient (8 Lead PDIP) — 125 (8 Lead SOIC) — 200 (14 lead PDIP) — 75 (14 lead SOIC) — 120 TJ Junction temperature — 150 TS Storage temperature -50 150 TL Lead temperature (soldering, 10 seconds) — 300 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. V C C/W W

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IR2109(4) (S) & (PbF) www.irf.com 3 Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25C, DT = VSS unless otherwise specified. Symbol Definition Min. Typ. Max. Units Test Conditions ton Turn-on propagation delay — 750 950 VS = 0V toff Turn-off propagation delay — 200 280 VS = 0V or 600V tsd Shut-down propagation delay — 200 280 MT Delay matching, HS & LS turn-on/off — 0 70 tr Turn-on rise time — 150 220 VS = 0V tf Turn-off fall time — 50 80 VS = 0V DT Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 400 540 680 RDT= 0 HO turn-off to LO turn-on (DTHO-LO) 4 5 6 usec RDT = 200k (IR21094) MDT Deadtime matching = DTLO - HO - DTHO-LO — 0 60 RDT=0 — 0 600 RDT = 200k (IR21094) nsec nsec Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). VB High side floating supply absolute voltage VS + 10 VS + 20 VS High side floating supply offset voltage Note 1 600 VHO High side floating output voltage VS VB VCC Low side and logic fixed supply voltage 10 20 VLO Low side output voltage 0 VCC VIN Logic input voltage (IN & SD) VSS VCC DT Programmable dead-time pin voltage (IR21094 only) VSS VCC VSS Logic ground (IR21094 only) -5 5 TA Ambient temperature -40 125 C Symbol Definition Min. Max. Units Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential. V

Page 5

IR2109(4) (S) & (PbF) 4 www.irf.com Static Electrical Characteristics VBIAS (VCC, VBS) = 15V, VSS = COM, DT= VSS and TA = 25C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and SD. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” input voltage for HO & logic “0” for LO 2.9 — — VCC = 10V to 20V VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 VCC = 10V to 20V VSD,TH+ SD input positive going threshold 2.9 — — VCC = 10V to 20V VSD,TH- SD input negative going threshold — — 0.8 VCC = 10V to 20V VOH High level output voltage, VBIAS - VO — 0.8 1.4 IO = 20 mA VOL Low level output voltage, VO — 0.3 0.6 IO = 20 mA ILK Offset supply leakage current — — 50 VB = VS = 600V IQBS Quiescent VBS supply current 20 75 130 VIN = 0V or 5V IQCC Quiescent VCC supply current 0.4 1.0 1.6 mA VIN = 0V or 5V RDT = 0 IIN+ Logic “1” input bias current — 5 20 IN = 5V, SD = 0V IIN- Logic “0” input bias current — — 2 IN = 0V, SD = 5V VCCUV+ VCC and VBS supply undervoltage positive going 8.0 8.9 9.8 VBSUV+ threshold VCCUV- VCC and VBS supply undervoltage negative going 7.4 8.2 9.0 VBSUV- threshold VCCUVH Hysteresis 0.3 0.7 — VBSUVH IO+ Output high short circuit pulsed vurrent 120 200 — VO = 0V, PW ≤ 10 s IO- Output low short circuit pulsed current 250 350 — VO = 15V,PW ≤ 10 s V A V A mA

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IR2109(4) (S) & (PbF) www.irf.com 5 Functional Block Diagrams IR2109 SD UV DETECT DELAY COM LO VCC IN VS HO VB PULSE FILTER HV LEVEL SHIFTER R R S Q UV DETECT PULSE GENERATOR VSS/COM LEVEL SHIFT VSS/COM LEVEL SHIFT +5V DEADTIME SD UV DETECT DELAY COM LO VCC IN DT VSS VS HO VB PULSE FILTER HV LEVEL SHIFTER R R S Q UV DETECT PULSE GENERATOR VSS/COM LEVEL SHIFT VSS/COM LEVEL SHIFT +5V DEADTIME IR21094

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IR2109(4) (S) & (PbF) 6 www.irf.com 14 Lead PDIP 14 Lead SOIC IR21094 IR21094S Lead Assignments 8 Lead PDIP 8 Lead SOIC 1 2 3 4 8 7 6 5 VCC IN SD COM VB HO VS LO 1 2 3 4 8 7 6 5 VCC IN SD COM VB HO VS LO 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC IN SD DT VSS COM LO VB HO VS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC IN SD DT VSS COM LO VB HO VS Lead Definitions Symbol Description IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO (referenced to COM for IR2109 and VSS for IR21094) SD Logic input for shutdown (referenced to COM for IR2109 and VSS for IR21094) DT Programmable dead-time lead, referenced to VSS. (IR21094 only) VSS Logic Ground (21094 only) VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side and logic fixed supply LO Low side gate drive output COM Low side return IR2109 IR2109S

Page 8

IR2109(4) (S) & (PbF) www.irf.com 7 Figure 1. Input/Output Timing Diagram Figure 2. Switching Time Waveform Definitions Figure 4. Deadtime Waveform Definitions IN HO 50% 50% 90% 10% LO 90% 10% DTLO-HO DTLO-HOMDT= - DTHO-LO DTHO-LO SD IN HO LO IN(HO) trton tftoff LO HO 50% 50% 90% 90% 10% 10% IN(LO) Figure 3. Shutdown Waveform Definitions SD tsd HO LO 50% 90% Figure 5. Delay Matching Waveform Definitions HO 50% 50% 10% LO 90% MT HOLO MT IN(LO) IN (HO)

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IR2109(4) (S) & (PbF) 8 www.irf.com 500 700 900 1100 1300 -50 -25 0 25 50 75 100 125 Temperature (oC) Tu rn -o n Pr op ag at io n D el ay ( ns ) T yp. Max 500 700 900 1100 1300 10 12 14 16 18 20 VBIAS Supply Voltage (V) Tu rn -o n Pr op ag at io n D el ay ( ns ) T yp. Max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 Temperature (oC) Tu rn -o ff P ro pa ga tio n D el ay ( ns ) Max. T yp. 0 100 200 300 400 500 10 12 14 16 18 20 VBIAS Supply Voltage (V) Tu rn -o ff P ro pa ga tio n D el ay ( ns ) T yp. Max. Figure 6A. Turn-on Propagation Delay vs. Temperature Figure 6B. Turn-on Propagation Delay vs. Supply Voltage Figure 7A. Turn-off Propagation Delay vs. Temperature Figure 7B. Turn-off Propagation Delay vs. Supply Voltage

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IR2109(4) (S) & (PbF) www.irf.com 9 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 Temperature (oC) S D P ro pa ga tio n D el ay ( ns ) Max. T yp. 0 100 200 300 400 500 10 12 14 16 18 20 VBIAS Supply Voltage (V) S D P ro pa ga tio n D el ay ( ns ) T yp. Max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 Temperature (oC) Tu rn -o n R is e Ti m e (n s) Max. T yp. 0 100 200 300 400 500 10 12 14 16 18 20 VBIAS Supply Voltage (V) Tu rn -o n R is e Ti m e (n s) T yp. Max. Figure 8A. SD Propagation Delay vs. Temperature Figure 8B. SD Propagation Delay vs. Supply Voltage Figure 9A. Turn-on Rise Time vs. Temperature Figure 9B. Turn-on Rise Time vs. Supply Voltage

IR21094PBF Reviews

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May 22, 2020

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May 20, 2020

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May 8, 2020

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May 8, 2020

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April 21, 2020

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April 20, 2020

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April 8, 2020

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