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IRF830ASPBF

hot IRF830ASPBF

IRF830ASPBF

For Reference Only

Part Number IRF830ASPBF
Manufacturer Vishay Siliconix
Description MOSFET N-CH 500V 5A D2PAK
Datasheet IRF830ASPBF Datasheet
Package TO-263-3, D2Pak (2 Leads + Tab), TO-263AB
In Stock 839 piece(s)
Unit Price $ 1.71 *
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IRF830ASPBF Specifications

ManufacturerVishay Siliconix
CategoryDiscrete Semiconductor Products - Transistors - FETs, MOSFETs - Single
Datasheet IRF830ASPBF Datasheet
PackageTO-263-3, D2Pak (2 Leads + Tab), TO-263AB
Series-
FET TypeN-Channel
TechnologyMOSFET (Metal Oxide)
Drain to Source Voltage (Vdss)500V
Current - Continuous Drain (Id) @ 25��C5A (Tc)
Drive Voltage (Max Rds On, Min Rds On)10V
Vgs(th) (Max) @ Id4.5V @ 250µA
Gate Charge (Qg) (Max) @ Vgs24nC @ 10V
Input Capacitance (Ciss) (Max) @ Vds620pF @ 25V
Vgs (Max)��30V
Power Dissipation (Max)3.1W (Ta), 74W (Tc)
Rds On (Max) @ Id, Vgs1.4 Ohm @ 3A, 10V
Operating Temperature-55°C ~ 150°C (TJ)
Mounting TypeSurface Mount
Supplier Device PackageD2PAK
Package / CaseTO-263-3, D2Pak (2 Leads + Tab), TO-263AB

IRF830ASPBF Datasheet

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Document Number: 91062 www.vishay.com S11-1049-Rev. C, 30-May-11 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Power MOSFET IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix FEATURES • Halogen-free According to IEC 61249-2-21 Definition • Low Gate Charge Qg Results in Simple Drive Requirement • Improved Gate, Avalanche and Dynamic dV/dt Ruggedness • Fully Characterized Capacitance and Avalanche Voltage and Current • Effective Coss specified • Compliant to RoHS Directive 2002/95/EC APPLICATIONS • Switch Mode Power Supply (SMPS) • Uninterruptible Power Supply • High speed power switching TYPICAL SMPS TOPOLOGIES • Two Transistor Forward • Half Bridge and Full Bridge Note a. See device orientation. Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 18 mH, Rg = 25 , IAS = 5.0 A (see fig. 12). c. ISD  5.0 A, dI/dt  370 A/μs, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. e. Uses SiHF830A data and test conditions. PRODUCT SUMMARY VDS (V) 500 RDS(on) (Max.) () VGS = 10 V 1.40 Qg (Max.) (nC) 24 Qgs (nC) 6.3 Qgd (nC) 11 Configuration Single N-Channel MOSFET G D S D2PAK (TO-263) G D S I2PAK (TO-262) G D S ORDERING INFORMATION Package D2PAK (TO-263) D2PAK (TO-263) I2PAK (TO-262) Lead (Pb)-free and Halogen-free SiHF830AS-GE3 SiHF830ASTRL-GE3a SiHF830AL-GE3a Lead (Pb)-free IRF830ASPbF IRF830ASTRLPbFa IRF830ALPbF SiHF830AS-E3 SiHF830ASTL-E3a SiHF830AL-E3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT UNIT Drain-Source Voltage VDS 500 V Gate-Source Voltage VGS ± 30 Continuous Drain Current VGS at 10 V TC = 25 °C ID 5.0 ATC = 100 °C 3.2 Pulsed Drain Currenta, e IDM 20 Linear Derating Factor 0.59 W/°C Single Pulse Avalanche Energyb, e EAS 230 mJ Avalanche Currenta IAR 5.0 A Repetiitive Avalanche Energya EAR 7.4 mJ Maximum Power Dissipation TA = 25 °C PD 3.1 W TC = 25 °C 74 Peak Diode Recovery dV/dtc, e dV/dt 5.3 V/ns Operating Junction and Storage Temperature Range TJ, Tstg - 55 to + 150 °C Soldering Recommendations (Peak Temperature) for 10 s 300d * Pb containing terminations are not RoHS compliant, exemptions may apply

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www.vishay.com Document Number: 91062 2 S11-1049-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix Note a. When mounted on 1" square PCB (FR-4 or G-10 material). Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. d. Uses SiHF830A data and test conditions. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. UNIT Maximum Junction-to-Ambient (PCB Mounted, Steady-State)a RthJA - 40 °C/W Maximum Junction-to-Case (Drain) RthJC - 1.7 SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS VGS = 0, ID = 250 μA 500 - - V VDS Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mAd - 0.60 - V/°C Gate-Source Threshold Voltage VGS(th) VDS = VGS, ID = 250 μA 2.0 - 4.5 V Gate-Source Leakage IGSS VGS = ± 30 V - - ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 500 V, VGS = 0 V - - 25 μA VDS = 400 V, VGS = 0 V, TJ = 125 °C - - 250 Drain-Source On-State Resistance RDS(on) VGS = 10 V ID = 3.0 A b - - 1.4  Forward Transconductance gfs VDS = 50 V, ID = 3.0 A d 2.8 - - S Dynamic Input Capacitance Ciss VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5d - 620 - pFOutput Capacitance Coss - 93 - Reverse Transfer Capacitance Crss - 4.3 - Output Capacitance Coss VGS = 0 V VDS = 1.0 V, f = 1.0 MHz - 886 - VDS = 400 V, f = 1.0 MHz - 27 - Effective Output Capacitance Coss eff. VDS = 0 V to 400 V c, d - 39 - Total Gate Charge Qg VGS = 10 V ID = 5.0 A, VDS = 400 V, see fig. 6 and 13b, d - - 24 nC Gate-Source Charge Qgs - - 6.3 Gate-Drain Charge Qgd - - 11 Turn-On Delay Time td(on) VDD = 250 V, ID = 5.0 A, Rg = 14 , RD = 49 , see fig. 10b, d - 10 - ns Rise Time tr - 21 - Turn-Off Delay Time td(off) - 21 - Fall Time tf - 15 - Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS MOSFET symbol showing the integral reverse p - n junction diode - - 5.0 A Pulsed Diode Forward Currenta ISM - - 20 Body Diode Voltage VSD TJ = 25 °C, IS = 5.0 A, VGS = 0 V b - - 1.5 V Body Diode Reverse Recovery Time trr TJ = 25 °C, IF = 5.0 A, dI/dt = 100 A/μs b, d - 430 650 ns Body Diode Reverse Recovery Charge Qrr - 2.0 3.0 μC Forward Turn-On Time ton Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) S D G

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Document Number: 91062 www.vishay.com S11-1049-Rev. C, 30-May-11 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics Fig. 2 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature 91062_01 Bottom Top VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width TJ = 25 °C 4.5 V VDS, Drain-to-Source Voltage (V) I D , D ra in -t o -S o u rc e C u rr e n t (A ) 10 102 10 10-2 1 0.1 0.1 1 102 VDS, Drain-to-Source Voltage (V) I D , D ra in -t o -S o u rc e C u rr e n t (A ) Bottom Top VGS 15 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 4.5 V 20 µs Pulse Width TJ = 150 °C 91062_02 4.5 V 102 10 1 0.1 101 102 20 µs Pulse Width VDS = 50 V I D , D ra in -t o -S o u rc e C u rr e n t (A ) VGS, Gate-to-Source Voltage (V) 5.0 6.0 7.0 8.04.0 91062_03 TJ = 25 °C TJ = 150 °C 102 10 1 0.1 ID = 5.0 A VGS = 10 V 0.0 0.5 1.0 1.5 2.0 2.5 TJ, Junction Temperature (°C) R D S (o n ), D ra in -t o -S o u rc e O n R e s is ta n c e (N o rm a liz e d ) 91062_04 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160

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www.vishay.com Document Number: 91062 4 S11-1049-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area 10 102 C , C a p a c it a n c e ( p F ) VDS, Drain-to-Source Voltage (V) Ciss Crss Coss VGS = 0 V, f = 1 MHz Ciss = Cgs + Cgd, Cds Shorted Crss = Cgd Coss = Cds + Cgd 91062_05 1031 104 103 102 10 1 QG, Total Gate Charge (nC) V G S , G a te -t o -S o u rc e V o lt a g e ( V ) 20 16 12 8 0 4 8 24201612 VDS = 100 V VDS = 250 V For test circuit see figure 13 VDS = 400 V 91062_06 ID = 5.0 A 40 102 10 VSD, Source-to-Drain Voltage (V) I S D , R e v e rs e D ra in C u rr e n t (A ) 0.2 1.00.80.60.4 VGS = 0 V 91062_07 TJ = 25 °C TJ = 150 °C 1 0.1 1.2 10 µs 100 µs 1 ms 10 ms Operation in this area limited by RDS(on) VDS, Drain-to-Source Voltage (V) I D , D ra in C u rr e n t (A ) TC = 25 °C TJ = 150 °C Single Pulse 102 0.1 1 10 10 102 103 104 91062_08

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Document Number: 91062 www.vishay.com S11-1049-Rev. C, 30-May-11 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10a - Switching Time Test Circuit Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms I D , D ra in C u rr e n t (A ) TC, Case Temperature (°C) 0.0 1.0 2.0 3.0 4.0 5.0 25 1501251007550 91062_09 Pulse width ≤ 1 µs Duty factor ≤ 0.1 % RD VGS Rg D.U.T. 10 V + - VDS VDD VDS 90 % 10 % VGS td(on) tr td(off) tf 10 1 0.1 10-2 10-5 10-4 10-3 10-2 0.1 1 PDM t1 t2 t1, Rectangular Pulse Duration (s) T h e rm a l R e s p o n s e ( Z th J C ) Notes: 1. Duty Factor, D = t1/t2 2. Peak Tj = PDM x ZthJC + TC Single Pulse (Thermal Response) D = 0.50 0.20 0.05 0.02 0.01 91062_11 0.10 A Rg IAS 0.01 Ωtp D.U.T. LVDS + - VDD Driver 15 V 20 V IAS VDS tp

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www.vishay.com Document Number: 91062 6 S11-1049-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Fig. 13a - Maximum Avalanche Energy vs. Drain Current Fig. 12d - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit 500 0 100 200 300 400 25 1501251007550 Starting TJ, Junction Temperature (°C) E A S , S in g le P u ls e A v a la n c h e E n e rg y ( m J ) Bottom Top ID 2.2 A 3.2 A 5.0 A 91062_12c QGS QGD QG VG Charge VGS 785 770 775 780 0.0 5.04.03.02.01.0 IAV, Avalanche Current (A) V D S a v , A v a la n c h e V o lt a g e ( V ) 790 91062_12d D.U.T. 3 mA VGS VDS IG ID 0.3 µF 0.2 µF 50 kΩ 12 V Current regulator Current sampling resistors Same type as D.U.T. + -

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Document Number: 91062 www.vishay.com S11-1049-Rev. C, 30-May-11 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRF830AS, IRF830AL, SiHF830AS, SiHF830AL Vishay Siliconix Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91062. P.W. Period dI/dt Diode recovery dV/dt Ripple ≤ 5 % Body diode forward drop Re-applied voltage Reverse recovery current Body diode forward current VGS = 10 V a ISD Driver gate drive D.U.T. lSD waveform D.U.T. VDS waveform Inductor current D = P.W. Period + - + + +- - - Peak Diode Recovery dV/dt Test Circuit VDD • dV/dt controlled by Rg • Driver same type as D.U.T. • ISD controlled by duty factor “D” • D.U.T. - device under test D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer Rg Note a. VGS = 5 V for logic level devices VDD

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Document Number: 91364 www.vishay.com Revision: 15-Sep-08 1 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. 5 4 1 3 L1 L2 D B B E H BA Detail A A A c c2 A 2 x e 2 x b2 2 x b 0.010 A BM M ± 0.004 BM Base metal Plating b1, b3 (b, b2) c1(c) Section B - B and C - C Scale: none Lead tip 4 3 4 (Datum A) 2 C C 5 5 View A - A E1 D1 E 4 4 B H Seating plane Gauge plane 0° to 8° Detail “A” Rotated 90° CW scale 8:1 L3 A1L4 L MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D1 6.86 - 0.270 - A1 0.00 0.25 0.000 0.010 E 9.65 10.67 0.380 0.420 b 0.51 0.99 0.020 0.039 E1 6.22 - 0.245 - b1 0.51 0.89 0.020 0.035 e 2.54 BSC 0.100 BSC b2 1.14 1.78 0.045 0.070 H 14.61 15.88 0.575 0.625 b3 1.14 1.73 0.045 0.068 L 1.78 2.79 0.070 0.110 c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.066 c1 0.38 0.58 0.015 0.023 L2 - 1.78 - 0.070 c2 1.14 1.65 0.045 0.065 L3 0.25 BSC 0.010 BSC D 8.38 9.65 0.330 0.380 L4 4.78 5.28 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970

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Document Number: 91367 www.vishay.com Revision: 27-Oct-08 1 Package Information Vishay Siliconix I2PAK (TO-262) (HIGH VOLTAGE) Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost extremes of the plastic body. 3. Thermal pad contour optional within dimension E, L1, D1, and E1. 4. Dimension b1 and c1 apply to base metal only. AE BA A A c2 c A1 Base metal Plating b1, b3 (b, b2) c1c Section A - A Section B - B and C - C Scale: None E1 E Seating plane Lead tip (Datum A) L1 L2 B B C C L D 2 x e 3 x b2 3 x b 0.010 A BM M D1 MILLIMETERS INCHES MILLIMETERS INCHES DIM. MIN. MAX. MIN. MAX. DIM. MIN. MAX. MIN. MAX. A 4.06 4.83 0.160 0.190 D 8.38 9.65 0.330 0.380 A1 2.03 3.02 0.080 0.119 D1 6.86 - 0.270 - b 0.51 0.99 0.020 0.039 E 9.65 10.67 0.380 0.420 b1 0.51 0.89 0.020 0.035 E1 6.22 - 0.245 - b2 1.14 1.78 0.045 0.070 e 2.54 BSC 0.100 BSC b3 1.14 1.73 0.045 0.068 L 13.46 14.10 0.530 0.555 c 0.38 0.74 0.015 0.029 L1 - 1.65 - 0.065 c1 0.38 0.58 0.015 0.023 L2 3.56 3.71 0.140 0.146 c2 1.14 1.65 0.045 0.065 ECN: S-82442-Rev. A, 27-Oct-08 DWG: 5977

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