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ISL6227CA

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ISL6227CA

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Part Number ISL6227CA
Manufacturer Renesas Electronics America
Description IC CONTROLLER DDR, DDR2 28QSOP
Datasheet ISL6227CA Datasheet
Package 28-SSOP (0.154", 3.90mm Width)
In Stock 779 piece(s)
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Lead Time Can Ship Immediately
Estimated Delivery Time Jun 3 - Jun 8 (Choose Expedited Shipping)
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Part Number # ISL6227CA (PMIC - Voltage Regulators - Special Purpose) is manufactured by Renesas Electronics America and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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ISL6227CA Specifications

ManufacturerRenesas Electronics America
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - Special Purpose
Datasheet ISL6227CADatasheet
Package28-SSOP (0.154", 3.90mm Width)
Series-
ApplicationsController, DDR
Voltage - Input5 V ~ 28 V
Number of Outputs2
Voltage - Output0.9 V ~ 5.5 V
Operating Temperature-10°C ~ 100°C
Mounting TypeSurface Mount
Package / Case28-SSOP (0.154", 3.90mm Width)
Supplier Device Package28-SSOP/QSOP

ISL6227CA Datasheet

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Page 2

FN9094 Rev 7.00 May 4, 2009 ISL6227 Dual Mobile-Friendly PWM Controller with DDR Option DATASHEETThe ISL6227 dual PWM controller delivers high efficiency precision voltage regulation from two synchronous buck DC/DC converters. It was designed especially to provide power regulation for DDR memory, chipsets, graphics and other system electronics in Notebook PCs. The ISL6227’s wide input voltage range capability allows for voltage conversion directly from AC/DC adaptor or Li-Ion battery pack. Automatic mode transition of constant-frequency synchronous rectification at heavy load, and hysteretic (HYS) diode-emulation at light load, assure high efficiency over a wide range of conditions. The HYS mode of operation can be disabled separately on each PWM converter if constant-frequency continuous-conduction operation is desired for all load levels. Efficiency is further enhanced by using the lower MOSFET rDS(ON) as the current sense element. Voltage-feed-forward ramp modulation, current mode control, and internal feedback compensation provide fast response to input voltage and load transients. Input current ripple is minimized by channel-to-channel PWM phase shift of 0°, 90° or 180° (determined by input voltage and status of the DDR pin). The ISL6227 can control two independent output voltages adjustable from 0.9V to 5.5V, or by activating the DDR pin, transform into a complete DDR memory power supply solution. In DDR mode, CH2 output voltage VTT tracks CH1 output voltage VDDQ. CH2 output can both source and sink current, an essential power supply feature for DDR memory. The reference voltage VREF required by DDR memory is generated as well. In dual power supply applications the ISL6227 monitors the output voltage of both CH1 and CH2. An independent PGOOD (power good) signal is asserted for each channel after the soft-start sequence has completed, and the output voltage is within PGOOD window. In DDR mode CH1 generates the only PGOOD signal. Built-in overvoltage protection prevents the output from going above 115% of the set point by holding the lower MOSFET on and the upper MOSFET off. When the output voltage re-enters regulation, PGOOD will go HIGH and normal operation automatically resumes. Once the soft-start sequence has completed, undervoltage protection latches the offending channel off if the output drops below 75% of its set point value. Adjustable overcurrent protection (OCP) monitors the voltage drop across the rDS(ON) of the lower MOSFET. If more precise current-sensing is required, an external current sense resistor may be used. Features • Provides Regulated Output Voltage in the Range 0.9V to 5.5V • Operates From an Input Battery Voltage Range of 5V to 28V or From 3.3V/5V System Rail • Complete DDR1 and DDR2 Memory Power Solution with VTT Tracking VDDQ/2 and a VDDQ/2 Buffered Reference Output • Flexible PWM or HYS Plus PWM Mode Selection with HYS Diode Emulation at Light Loads for Higher System Efficiency • rDS(ON) Current Sensing • Excellent Dynamic Response With Voltage Feed-Forward and Current Mode Control Accommodating Wide Range LC Filter Selections • Undervoltage Lock-Out on VCC Pin • Power-Good, Overcurrent, Overvoltage, Undervoltage Protection for Both Channels • Synchronized 300kHz PWM Operation in PWM Mode • Pb-Free Available (RoHS compliant) Applications • Notebook PCs and Desknotes • Tablet PCs/Slates • Hand-Held Portable Instruments Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # ISL6227CA* ISL 6227CA -10 to +100 28 Ld QSOP M28.15 ISL6227CAZ* (Note) ISL 6227CAZ -10 to +100 28 Ld QSOP (Pb-Free) M28.15 ISL6227IA* ISL 6227IA -40 to +100 28 Ld QSOP M28.15 ISL6227IAZ* (Note) ISL 6227IAZ -40 to +100 28 Ld QSOP (Pb-Free) M28.15 ISL6227HRZ* (Note) ISL 6227HRZ -10 to +100 28 Ld QFN (Pb-Free) L28.5x5 ISL6227IRZ* (Note) ISL 6227IRZ -40 to +100 28 Ld QFN (Pb-Free) L28.5x5 *Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.FN9094 Rev 7.00 Page 1 of 27 May 4, 2009

Page 3

ISL6227Generic Application Circuits Pinouts ISL6227 28 LD QSOP TOP VIEW ISL6227 28 LD 5X5 QFN TOP VIEW EN1 GND DDR VSEN1 VIN PG1 VCC VOUT1 ISEN1 LGATE1 PGND1 BOOT1 UGATE1 PHASE1 ISEN2 LGATE2 PGND2 BOOT2 UGATE2 PHASE2 EN2 VSEN2 VOUT2 OCSET2OCSET1 SOFT1 SOFT2 PG2/REF 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1 2 3 4 5 6 7 21 20 19 18 17 16 15 28 27 26 25 24 23 22 8 9 10 11 12 13 14 UGATE2 BOOT2 ISEN2 EN2 VOUT2 VSEN2 OCSET2 PHASE1 UGATE1 BOOT1 ISEN1 EN1 VOUT1 VSEN1 O C S E T 1 S O F T 1 D D R V IN P G 1 P G 2/ R E F S O F T 2 P G N 1 L G A T E 1 G N D V C C L G A T E 2 P G N D 2 P H A S E 2 GND 29 VIN VOUT1 VOUT2 +1.80V +1.20V +5V TO +28V L1 Q1 Q2 OCSET1 DDR ISL6227 APPLICATION CIRCUIT FOR TWO CHANNEL POWER SUPPLY PWM1 PWM2 L2 Q3 Q4 C2 OCSET2 VCC EN2 EN1 +5V + C1 + ISL6227 APPLICATION CIRCUIT FOR COMPLETE DDR MEMORY POWER SUPPLY VIN VDDQ VTT +2.50V +1.25V +5V TO 28V L1 Q1 Q2 OCSET1 DDR PWM1 PWM2 L2 Q3 Q4 OCSET2 VCC EN2 EN1 +5V VREF +1.25V PG2/VREF C1 + C2 + FN9094 Rev 7.00 Page 2 of 27 May 4, 2009

Page 4

ISL6227Absolute Maximum Ratings Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +6.5V Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +28.0V PHASE, UGATE . . . . . . . . . . . . . . . . . . . GND -5V (Note 1) to 33.0V BOOT, ISEN . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to +33.0V BOOT with Respect to PHASE . . . . . . . . . . . . . . . . . . . . . . . . + 6.5V All Other Pins . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VCC + 0.3V Recommended Operating Conditions Bias Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5.0V 5% Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . .+5.0V to +28.0V Ambient Temperature Range . . . . . . . . . . . . . . . . . -10°C to +100°C Junction Temperature Range. . . . . . . . . . . . . . . . . -10°C to +125°C Thermal Information Thermal Resistance (Typical) JA (°C/W) JC (°C/W) QSOP Package (Note 2) . . . . . . . . . . . . . 80 N/A QFN Package (Notes 3, 4). . . . . . . . . . . . 36 6 Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C Maximum Storage Temperature Range . . . . . . . . . . -65°C to +150°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. 250ns transient. See Confining The Negative Phase Node Voltage Swing in Application Information Section 2. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 4. For JC, the “case temp” location is the center of the exposed metal pad on the package underside. 5. Limits established by characterization and are not production tested. Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS VCC SUPPLY Bias Current ICC LGATEx, UGATEx Open, VSENx forced above regulation point, VIN > 5V - 1.8 3.0 mA Shut-down Current ICCSN - - 1 µA VCC UVLO Rising VCC Threshold VCCU 4.3 4.45 4.5 V Falling VCC Threshold VCCD 4 4.14 4.34 V VIN Input Voltage Pin Current (Sink) IVIN - - 35 µA Shut-Down Current IVINS - - 1 µA OSCILLATOR PWM1 Oscillator Frequency fc Commercial, ISL6227C 255 300 345 kHz Industrial, ISL6227I 240 300 345 kHz Ramp Amplitude, pk-pk VR1 VIN = 16V (Note 5) - 2 - V Ramp Amplitude, pk-pk VR2 VIN = 5V (Note 5) - 0.625 - V Ramp Offset VROFF (Note 5) - 1 - V Ramp/VIN Gain GRB1 VIN  4.2V (Note 5) - 125 - mV/V Ramp/VIN Gain GRB2 VIN 4.1V (Note 5) - 250 - mV/V REFERENCE AND SOFT-START Internal Reference Voltage VREF - 0.9 - V Reference Voltage Accuracy -1.0 - +1.0 %FN9094 Rev 7.00 Page 3 of 27 May 4, 2009

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ISL6227Soft-Start Current During Start-Up ISOFT - -4.5 - µA Soft-Start Complete Threshold VST (Note 5) - 1.5 - V PWM CONVERTERS Load Regulation 0.0mA < IVOUT1 < 5.0A; 5.0V < VBATT < 28.0V -2.0 - +2.0 % VSEN Pin Bias Current IVSEN (Note 5) - 80 - nA Minimum Duty Cycle Dmin - 4 - % Maximum Duty Cycle Dmax - 87 - % VOUT Pin Input Impedance IVOUT VOUT = 5V - 134 - k Undervoltage Shut-Down Level VUVL Fraction of the set point; ~2µs noise filter 70 75 80 % Overvoltage Protection VOVP1 Fraction of the set point; ~2µs noise filter 110 115 - % GATE DRIVERS Upper Drive Pull-Up Resistance R2UGPUP VCC = 5V - 4 8  Upper Drive Pull-Down Resistance R2UGPDN VCC = 5V - 2.3 4  Lower Drive Pull-Up Resistance R2LGPUP VCC = 5V - 4 8  Lower Drive Pull-Down Resistance R2LGPDN VCC = 5V - 1.1 3  POWER GOOD AND CONTROL FUNCTIONS Power Good Lower Threshold VPG- Fraction of the set point; ~3µs noise filter 84 89 92 % Power Good Higher Threshold VPG+ Fraction of the set point; ~3µs noise filter. 110 115 120 % PGOODx Leakage Current IPGLKG VPULLUP = 5.5V - - 1 µA PGOODx Voltage Low VPGOOD IPGOOD = -4mA - 0.5 1 V ISEN Sourcing Current (Note 5) - - 260 µA OCSET Sourcing Current Range 2 - 20 µA EN - Low (Off) - - 0.8 V EN - High (On) 2.0 - - V Continuous-Conduction-Mode(CCM) Enforced (HYS Operation Inhibited) VOUTX pulled low - - 0.1 V Automatic CCM/HYS Operation Enabled VOUTX connected to the output 0.9 - - V DDR - Low (Off) - - 0.8 V DDR - High (On) 3 - - V DDR REF Output Voltage VDDREF DDR = 1, IREF = 0...10mA 0.99* VOC2 VOC2 1.01* VOC2 V DDR REF Output Current IDDREF DDR = 1 (Note 5) - 10 12 mA Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITSFN9094 Rev 7.00 Page 4 of 27 May 4, 2009

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ISL6227Typical Operation Performance FIGURE 1. EFFICIENCY OF CHANNEL 1, 2.5V, HYS/PWM MODE FIGURE 2. EFFICIENCY OF CHANNEL 2, 1.8V, HYS/PWM MODE FIGURE 3. OUTPUT VOLTAGE OF CHANNEL 1 vs LOAD FIGURE 4. OUTPUT VOLTAGE OF CHANNEL 2 vs LOAD FIGURE 5. SWITCHING FREQUENCY OVER-TEMPERATURE FIGURE 6. REFERENCE VOLTAGE ACCURACY OVER-TEMPERATURE 0 10 20 30 40 50 60 70 80 90 100 0.01 0.10 1.00 10.0 LOAD CURRENT (A) E F F IC IE N C Y ( % ) EFF@ 5V EFF@ 12V EFF@ 19.5V EFF@ 5V, PWM EFF@ 12V, PWM EFF@ 19.5V, PWM 0 10 20 30 40 50 60 70 80 90 100 0.01 0.10 1.00 10.0 LOAD CURRENT (A) E F F IC IE N C Y ( % ) EFF@ 19.5V EFF@ 19.5V, PWM EFF@ 12V, PWM EFF@ 5V EFF@ 5V, PWM EFF@ 12V 2.47 2.48 2.49 2.50 2.51 2.52 2.53 2.54 0 1 2 3 4 5 O U T P U T V O LT A G E ( V ) LOAD CURRENT (A) VOUT @ 19.5V VOUT @ 12V VOUT @ 19.5V, PWM VOUT @ 5V VOUT @ 5V, PWM VOUT @ 12V, PWM 1.78 1.79 1.80 1.81 1.82 1.83 0 1 2 3 4 5 O U T P U T V O LT A G E ( V ) LOAD CURRENT (A) VOUT @ 19.5V VOUT @ 12V VOUT @ 12V, PWM VOUT @ 5V VOUT @ 5V, PWM VOUT @ 19.5V, PWM 286 288 290 292 294 296 298 300 302 304 306 308 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) F R E Q U E N C Y ( kH z) 75% QUANTILE 25% QUANTILE FREQUENCY MEAN 0.8975 0.8980 0.8985 0.8990 0.8995 0.9000 0.9005 0.9010 0.9015 0.9020 0.9025 -20 0 20 40 60 80 100 120 TEMPERATURE (°C) V R E F ( V ) 75% QUANTILE 25% QUANTILE VREF MEANFN9094 Rev 7.00 Page 5 of 27 May 4, 2009

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ISL6227FIGURE 7. LOAD TRANSIENT (0A TO 3A AT CHANNEL 1) (DIODE EMULATION MODE) FIGURE 8. LOAD TRANSIENT (0A TO 3A AT CHANNEL 1) (FORCED PWM MODE) FIGURE 9. LOAD TRANSIENT (0A TO 2A AT CHANNEL 2) (DIODE EMULATION MODE) FIGURE 10. LOAD TRANSIENT (0A TO 3A AT CHANNEL 2) (FORCED PWM MODE) FIGURE 11. INPUT STEP-UP TRANSIENT AT PWM MODE FIGURE 12. INPUT STEP-UP TRANSIENT AT HYS MODE Typical Operation Performance (Continued) Vo1 Vphase1 Ilo1 Vo2 O1 VPHASE1 ILO1 VO2 Vo1 Ilo1 Vo2 Vphase1 O VPHASE ILO1 VO2 Vo1 Vphase2 Ilo2 Vo2 VO1 VPHASE2 ILO2 VO2 Vo1 Ilo2 Vo2 Vphase2 VO1 VPHASE ILO VO2 Vin1 Vo1 Vo2 IN O O Vin1 Vo1 Vo2 VIN1 VO1 VO2FN9094 Rev 7.00 Page 6 of 27 May 4, 2009

Page 8

ISL6227FIGURE 13. INPUT STEP-DOWN TRANSIENT AT PWM MODE FIGURE 14. INPUT STEP-DOWN TRANSIENT AT HYS MODE FIGURE 15. SOFT-START INTERVAL AT ZERO INITIAL VOLTAGE OF VO FIGURE 16. SOFT-START INTERVAL WITH NON-ZERO INITIAL VOLTAGE OF VO FIGURE 17. OPERATION AT LIGHT LOAD OF 100mA, CHANNEL 1 FIGURE 18. OPERATION AT HEAVY LOAD OF 4A, CHANNEL 1 Typical Operation Performance (Continued) Vin1 Vo1 Vo2 VIN1 VO1 VO2 Vin1 Vo1 Vo2 VIN1 VO1 VO2 EN1 PG1 SOFT1 Vo1 EN1 PG1 SOFT O EN1 PG1 SOFT1 Vo1 EN1 PG1 FT1 O Vo1 Vphase1 Ilo1 Vo2 VO1 PHASE1 ILO1 VO2 Vo1 Vphase1 Ilo1 Vo2 O PHASE1 ILO1 O FN9094 Rev 7.00 Page 7 of 27 May 4, 2009

Page 9

ISL6227FIGURE 19. OVERCURRENT PROTECTION AT CHANNEL 1 FIGURE 20. SHORT-CIRCUIT PROTECTION AT CHANNEL 1 FIGURE 21. MODE TRANSITION OF HYS _PWM FIGURE 22. MODE TRANSITION OF PWM HYS FIGURE 23. NORMAL SHUTDOWN, IOUT = 1.5A FIGURE 24. VCC POWER-UP IN DDR MODE Typical Operation Performance (Continued) Vo1 PG1 Ilo1 Vo2 VO1 PG1 ILO O2 Vo1 PG1 Ilo1 Vo2 VO1 ILO O2 Vo1 Vphase1 Ilo1 Vo2 VO1 VPHASE1 ILO1 VO2 Vo1 Vphase2 Ilo2 Vo2 VO1 PHASE2 ILO2 O EN1 PG1 SOFT1 Vo1 SOFT O VTT OCSET VDDQ VCC VTT OC VDDQ VCCFN9094 Rev 7.00 Page 8 of 27 May 4, 2009

Page 10

ISL6227FIGURE 25. VIN = 19V, VDDQ 3A STEP LOAD, VTT 0A LOAD FIGURE 26. VIN = 19V, VDDQ 3A STEP LOAD, VTT 3A LOAD FIGURE 27. VIN = 19V, LOAD STEP ON VTT, VDDQ HYS MODE, 0.14A FIGURE 28. VIN = 19V, LOAD STEP ON VTT, VDDQ PWM MODE, 0.14A FIGURE 29. INPUT LINE TRANSIENT IN DDR MODE FIGURE 30. VTT FOLLOWS VDDQ, ENABLE 2 IS HIGH Typical Operation Performance (Continued) VDDQ VTT IL1 PGOOD1 VDDQ PGOOD1 VTT IL1 VDDQ VTT IL1 PGOOD1 VDD 1 VTT IL1 VDDQ VTT IL2 OCSET2 V DQ VTT 2 IL2 VDDQ VTT IL2 OCSET2 V 2 IL2 VDDQ Vin VTT OCSET2 V VIN VTT SET2 VDDQ EN1 VTT IL1 T V I FN9094 Rev 7.00 Page 9 of 27 May 4, 2009

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