0
+86-755-83210559 ext. 811
TOP
Contact Us
SalesDept@heisener.com +86-755-83210559 ext. 811
Language Translation
  • • English
  • • Español
  • • Deutsch
  • • Français
  • • Italiano
  • • Nederlands
  • • Português
  • • русский язык
  • • 日本語
  • • 한국어
  • • 简体中文
  • • 繁體中文

* Please refer to the English Version as our Official Version.

Change Country

If your country is not listed, please select International as your region.

  • International
Americas
  • Argentina
  • Brasil
  • Canada
  • Chile
  • Colombia
  • Costa Rica
  • Dominican Republic
  • Ecuador
  • Guatemala
  • Honduras
  • Mexico
  • Peru
  • Puerto Rico
  • United States
  • Uruguay
  • Venezuela
Asia/Pacific
  • Australia
  • China
  • Hong Kong
  • Indonesia
  • Israel
  • India
  • Japan
  • Korea, Republic of
  • Malaysia
  • New Zealand
  • Philippines
  • Singapore
  • Thailand
  • Taiwan
  • Vietnam
Europe
  • Austria
  • Belgium
  • Bulgaria
  • Switzerland
  • Czech Republic
  • Germany
  • Denmark
  • Estonia
  • Spain
  • Finland
  • France
  • United Kingdom
  • Greece
  • Croatia
  • Hungary
  • Ireland
  • Italy
  • Netherlands
  • Norway
  • Poland
  • Portugal
  • Romania
  • Russian Federation
  • Sweden
  • Slovakia
  • Turkey

ISL6440IAZ-TK

hot ISL6440IAZ-TK

ISL6440IAZ-TK

For Reference Only

Part Number ISL6440IAZ-TK
Manufacturer Intersil
Description IC REG CTRLR BUCK 24QSOP
Datasheet ISL6440IAZ-TK Datasheet
Package 24-SSOP (0.154", 3.90mm Width)
In Stock 9850 piece(s)
Unit Price $ 2.464 *
Please request a real-time quote with our sales team. The unit price would influenced by the quantity requested and the supply sources. Thank you!
Lead Time Can Ship Immediately
Estimated Delivery Time Dec 10 - Dec 15 (Choose Expedited Shipping)
Winter Hot Sale

* Free Shipping * Up to $100 Discount

Winter Hot Sale

Request for Quotation

ISL6440IAZ-TK

Quantity
  • We are offering ISL6440IAZ-TK for competitive price in the global market, please send us a quota request for pricing. Thank you!
  • To process your RFQ, please add ISL6440IAZ-TK with quantity into BOM. Heisener.com does NOT require any registration to request a quote of ISL6440IAZ-TK.
  • To learn about the specification of ISL6440IAZ-TK, please search the datasheet by clicking the link above. If you couldn't find the correct datasheet, please refer to the manufacturer's official datasheet.
Payment Methods
Delivery Services

Do you have any question about ISL6440IAZ-TK?

+86-755-83210559 ext. 811 SalesDept@heisener.com heisener007 2354944915 Send Message

Certified Quality

Heisener's commitment to quality has shaped our processes for sourcing, testing, shipping, and every step in between. This foundation underlies each component we sell.

ISO9001:2015, ICAS, IAF, UKAS

View the Certificates

ISL6440IAZ-TK Specifications

ManufacturerIntersil
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - DC DC Switching Controllers
Datasheet ISL6440IAZ-TK Datasheet
Package24-SSOP (0.154", 3.90mm Width)
Series-
Output TypeTransistor Driver
FunctionStep-Down
Output ConfigurationPositive
TopologyBuck
Number of Outputs2
Output Phases2
Voltage - Supply (Vcc/Vdd)5.6 V ~ 24 V
Frequency - Switching300kHz
Duty Cycle (Max)93%
Synchronous RectifierYes
Clock SyncNo
Control FeaturesEnable, Phase Control, Power Good, Soft Start
Operating Temperature-40°C ~ 85°C (TA)
Package / Case24-SSOP (0.154", 3.90mm Width)
Supplier Device Package24-QSOP

ISL6440IAZ-TK Datasheet

Page 1

Page 2

FN9040 Rev 2.00 Oct 4, 2005 ISL6440 300kHz Dual, 180° Out-of-Phase, Step-Down PWM Controller DATASHEETThe ISL6440 is a high-performance, dual-output PWM controller optimized for converting wall adapter, battery or network intermediate bus DC input supplies into the system supply voltages required for a wide variety of applications. Each output is adjustable down to 0.8V. The two PWMs are synchronized 180o out of phase reducing the RMS input current and ripple voltage. The ISL6440 incorporates several protection features. An adjustable overcurrent protection circuit monitors the output current by sensing the voltage drop across the lower MOSFET. Hiccup mode overcurrent operation protects the DC/DC components from damage during output overload/short circuit conditions. Each PWM has an independent logic-level shutdown input (SD1 and SD2). A single PGOOD signal is issued when soft-start is complete on both PWM controllers and their outputs are within 10% of the set point. Thermal shutdown circuitry turns off the device if the junction temperature exceeds +150°C. Pinout ISL6440 (QSOP) TOP VIEW Features • Wide Input Supply Voltage Range - 5.6V to 24V - 4.5V to 5.6V • Two Independently Programmable Output Voltages • Switching Frequency . . . . . . . . . . . . . . . . . . . . . . . 300kHz • Out of Phase PWM Controller Operation - Reduces Required Input Capacitance and Power Supply Induced Loads • No External Current Sense Resistor - Uses Lower MOSFET’s rDS(ON) • Programmable Soft-Start • Extensive Circuit Protection Functions - PGOOD - UVLO - Overcurrent - Overtemperature - Independent Shutdown for Both PWMs • Excellent Dynamic Response - Voltage Feed-Forward with Current Mode Control • Pb-Free Plus Anneal Available (RoHS Compliant) Applications • Power Supplies with Two Outputs • xDSL Modems/Routers • DSP, ASIC, and FPGA Power Supplies • Set-Top Boxes • Dual Output Supplies for DSP, Memory, Logic, P Core and I/O • Telecom Systems 1 2 3 4 5 6 7 8 9 10 11 12 16 17 18 19 20 21 22 23 24 15 14 13 LGATE2 BOOT2 UGATE2 PHASE2 ISEN2 PGOOD VCC5 SD2 SS2 OCSET2 FB2 VIN LGATE1 UGATE1 PHASE1 ISEN1 PGND SS1 OCSET1 FB1 BIAS BOOT1 SD1 SGND Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # ISL6440IA ISL6440IA -40 to 85 24 Ld QSOP M24.15 ISL6440IAZ (See Note) ISL6440IAZ -40 to 85 24 Ld QSOP (Pb-free) M24.15 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Add “-T” or “-TK” suffix for tape and reel.FN9040 Rev 2.00 Page 1 of 15 Oct 4, 2005

Page 3

ISL6440Typical Application Schematic + PGOOD +12V UGATE2 PHASE2 ISL6440IA + C1 R5 C10 19 22 4 24 6 14 LGATE2 Q2 13 ISEN2 R2 17 C8 BOOT2 VIN 5 D2 21 C5 R6 9 23 OCSET2 FB1 UGATE1 PHASE1 +C9 PGND LGATE1 ISEN1R1 C7 BOOT1 D1 R4 BIAS VCC5 7 R88 SD2 20 1 3 2 12 L2 10 SS1 SS2 11 SGND 16 C4 VOUT1 R3 Q1 FB2 VOUT2 SD1 +3.3V, 2A C3 C6 L1 +1.8V, 2A 18 15 VCC5 R9 56µF VCC5 10K PGOOD 6.4µH 6.4µH1.4K 0.1µF 0.1µF 330µF 330µF 10K 31.6K 10K 12.4K 10µF10µF 0.1µF 0.1µF BAT54HT1BAT54HT1 FDS6990S OCSET1 R7 FDS6990S C2 4.7µF 1.4K 121K 121KFN9040 Rev 2.00 Page 2 of 15 Oct 4, 2005

Page 4

F N 9 04 0 R e v 2 .0 0 P ag e 3 of 1 5 O ct 4, 2005 IS L6 4 40 AMP 2 VE DEAD-TIME VSEN2 18.5pF 1400k 180k + 0.8V ISEN2 SAMPLE CURRENT PHASE2 VCC UGATE2 BOOT2 LGATE2 PGND EMULATION MPLE TIMING + 0.8V REFERENCE OCSET2 SOFT2 REF - + - + Block Diagram ERROR AMP 1 FB1 180k PWM1 + 0.8V ISEN1 SAMPLE CURRENTSAMPLE CURRENT PHASE1 VCC_5V UGATE1 BOOT1 LGATE1 PGND + 0.8V REFERENCE OCSET1 ERROR ADAPTI PWM2 SAMPLE CURRENT DIODE V/I SA VIN VCC DUTY CYCLE RAMP GENERATOR PWM CHANNEL PHASE CONTROL OC2OC1 2 CLOCK CYCLES SAME STATE FOR REQUIRED TO LATCH OVERCURRENT FAULT 2 CLOCK CYCLES SAME STATE FOR REQUIRED TO LATCH OVERCURRENT FAULT VINPGOOD UV PGOOD 18.5pF1400k UV PGOOD ADAPTIVE DEAD-TIME DIODE EMULATION V/I SAMPLE TIMING OC1 POR FAULT LATCH BIAS SUPPLIES REFERENCE ENABLE SOFT-START SGNDSD1 SD2 SS1 OC2 REF 16k 16k - + - + - + - + - + - + VCC FB3

Page 5

ISL6440Absolute Maximum Ratings Thermal Information Supply Voltage (VCC_5V Pin) . . . . . . . . . . . . . . . . . . . . -0.3V to +7V Input Voltage (VIN Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+27V BOOT1, 2 and UGATE1, 2. . . . . . . . . . . . . . . . . . . . . . . . . . . . +35V PHASE1, 2 and ISEN1, 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . +27V BOOT1, 2 with Respect to PHASE1, 2 . . . . . . . . . . . . . . . . . . +6.5V UGATE1, 2. . . . . . . . . . . . (PHASE1, 2 - 0.3V) to (BOOT1, 2 +0.3V) Thermal Resistance (Typical) JA (°C/W) 24 Lead QSOP (Note 1). . . . . . . . . . . . . . . . . . . . . . 85 Maximum Junction Temperature (Plastic Package) . -55°C to 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application Schematic. VIN = 5.6V to 24V, or VCC5 = 5V ±10%, TA = -40°C to 85°C (Note 3), Typical values are at TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNITS VIN SUPPLY Input Voltage Range 5.6 12 24 V VCC_5V SUPPLY (Note 3) Input Voltage 4.5 5.0 5.6 V Output Voltage VIN > 5.6V, IL = 20mA 4.5 5.0 5.5 V Maximum Output Current VIN = 12V 60 - - mA SUPPLY CURRENT Shutdown Current (Note 4) SD1 = SD2 = GND - 50 375 A Operating Current (Note 5) - 2.0 4.0 mA REFERENCE SECTION Nominal Reference Voltage - 0.8 - V Reference Voltage Tolerance -1.0 - 1.0 % POWER-ON RESET Rising VCC_5V Threshold 4.25 4.45 4.5 V Falling VCC_5V Threshold 3.95 4.2 4.4 V OSCILLATOR Total Frequency Variation 260 300 340 kHz Peak-to-Peak Sawtooth Amplitude (Note 6) VIN = 12V - 1.6 - V VIN = 5V - 0.667 - V Ramp Offset (Note 7) - 1.0 - V SHUTDOWN1/SHUTDOWN2 HIGH Level (Converter Enabled) Internal Pull-up (3A) 2.0 - - V LOW Level (Converter Disabled) - - 0.8 V PWM CONVERTERS Output Voltage - 0.8 - V FB Pin Bias Current - - 150 nA Maximum Duty Cycle Cout = 1000pF, TA = 25°C 93 - - % Minimum Duty Cycle - 4 - %FN9040 Rev 2.00 Page 4 of 15 Oct 4, 2005

Page 6

ISL6440PWM CONTROLLER ERROR AMPLIFIERS DC Gain (Note 7) 80 88 - dB Gain-Bandwidth Product (Note 7) 5.9 - - MHz Slew Rate (Note 7) - 2.0 - V/s Maximum Output Voltage (Note 7) 0.9 - - V Minimum Output Voltage (Note 7) - - 3.6 V PWM CONTROLLER GATE DRIVERS (Note 8) Sink/Source Current - 400 - mA Upper Drive Pull-Up Resistance VCC5 = 4.5V - 8 - Upper Drive Pull-Down Resistance VCC5 = 4.5V - 3.2 - Lower Drive Pull-Up Resistance VCC5 = 4.5V - 8 - Lower Drive Pull-Down Resistance VCC5 = 4.5V - 1.8 - Rise Time COUT = 1000pF - 18 - ns Fall Time COUT = 1000pF - 18 - ns POWER GOOD AND CONTROL FUNCTIONS PGOOD LOW Level Voltage Pull-up = 100k - 0.1 0.5 V PGOOD Leakage Current - - ±1.0 A PGOOD Upper Threshold, PWM 1 and 2 Fraction of set point 105 - 120 % PGOOD Lower Threshold, PWM 1 and 2 Fraction of set point 80 - 95 % ISEN and CURRENT LIMIT Full Scale Input Current (Note 9) - 32 - A Overcurrent Threshold (Note 9) ROCSET = 110k - 64 - A OCSET (Current Limit) Voltage - 1.75 - V SOFT-START Soft-Start Current - 5 - A PROTECTION Thermal Shutdown Rising - 150 - °C Hysteresis - 20 - °C NOTES: 2. Specifications at -40°C and 85°C are guaranteed by design, not production tested. 3. In normal operation, where the device is supplied with voltage on the VIN pin, the VCC_5V pin provides a 5V output capable of 60mA (min). When the VCC_5V pin is used as a 5V supply input, the internal LDO regulator is disabled and the VIN input pin must be connected to the VCC_5V pin. (Refer to the Pin Descriptions section for more details.) 4. This is the total shutdown current with VIN = VCC_5V = PVCC = 5V. 5. Operating current is the supply current consumed when the device is active but not switching. It does not include gate drive current. 6. The peak-to-peak sawtooth amplitude is production tested at 12V only; at 5V this parameter is guaranteed by design. 7. Guaranteed by design; not production tested. 8. Not production tested; guaranteed by characterization only. 9. Guaranteed by design. The full scale current of 32µA is recommended for optimum current sample and hold operation. See the Feedback Loop Compensation Section below. Electrical Specifications Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application Schematic. VIN = 5.6V to 24V, or VCC5 = 5V ±10%, TA = -40°C to 85°C (Note 3), Typical values are at TA = 25°C (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITSFN9040 Rev 2.00 Page 5 of 15 Oct 4, 2005

Page 7

ISL6440Typical Performance Curves (Oscilloscope Plots Are Taken Using the ISL6440EVAL1B Evaluation Board, VIN = 12V, Unless Otherwise Noted) FIGURE 1. PWM1 LOAD REGULATION FIGURE 2. PWM2 LOAD REGULATION FIGURE 3. REFERENCE VOLTAGE VARIATION OVER TEMPERATURE FIGURE 4. SOFT-START WAVEFORMS WITH PGOOD FIGURE 5. PWM1 WAVEFORMS FIGURE 6. PWM2 WAVEFORMS 3.3 3.32 3.33 3.35 3.38 3.39 3.4 0 1 2.5 3.5 LOAD CURRENT (A) P W M 1 O U T P U T V O LT A G E ( V ) 4.50.5 1.5 2 3 4 3.37 3.36 3.34 3.31 3.3 3.32 3.33 3.35 3.38 3.39 3.4 0 1 2.5 3.5 LOAD CURRENT (A) P W M 2 O U T P U T V O LT A G E ( V ) 4.50.5 1.5 2 3 4 3.37 3.36 3.34 3.31 -40 -20 20 40 80 0.75 0.81 0.85 TEMPERATURE (°C) R E F E R E N C E V O LT A G E ( V ) 0.78 0.83 0.8 0.77 0 60 0.84 0.82 0.79 0.76 PGOOD 5V/DIV VOUT3 2V/DIV VOUT2 2V/DIV VOUT1 2V/DIV VOUT1 20mV/DIV, AC COUPLED IL1 0.5A/DIV, AC COUPLED PHASE1 10V/DIV VOUT2 20mV/DIV, AC COUPLED IL2 0.5A/DIV, AC COUPLED PHASE2 10V/DIVFN9040 Rev 2.00 Page 6 of 15 Oct 4, 2005

Page 8

ISL6440FIGURE 7. LOAD TRANSIENT RESPONSE VOUT1 (3.3V) FIGURE 8. LOAD TRANSIENT RESPONSE VOUT2 (3.3V) FIGURE 9. PWM SOFT-START WAVEFORM FIGURE 10. OVERCURRENT HICCUP MODE OPERATION FIGURE 11. PWM1 EFFICIENCY vs LOAD (3.3V), VIN = 12V FIGURE 12. PWM2 EFFICIENCY vs LOAD (3.3V), VIN = 12V Typical Performance Curves (Continued) (Oscilloscope Plots Are Taken Using the ISL6440EVAL1B Evaluation Board, VIN = 12V, Unless Otherwise Noted) VOUT1 200mV/DIV IOUT1 1A/DIV AC COUPLED VOUT2 200mV/DIV AC COUPLED IOUT2 1A/DIV VCC_5V 1V/DIV VOUT1 1V/DIV VOUT1 2V/DIV IL1 2A/DIV SS1 2V/DIV 60 70 80 90 100 0 1 LOAD CURRENT (A) P W M 1 E F F IC IE N C Y ( % ) 2 3 4 60 70 80 90 100 0 1 LOAD CURRENT (A) P W M 2 E F F IC IE N C Y ( % ) 2 3 4FN9040 Rev 2.00 Page 7 of 15 Oct 4, 2005

Page 9

ISL6440Pin Descriptions BOOT2, BOOT1 - These pins power the upper MOSFET drivers of each PWM converter. Connect this pin to the junction of the bootstrap capacitor and the cathode of the bootstrap diode. The anode of the bootstrap diode is connected to the VCC_5V pin. UGATE2, UGATE1 - These pins provide the gate drive for the upper MOSFETs. PHASE2, PHASE1 - These pins are connected to the junction of the upper MOSFETs source, output filter inductor and lower MOSFETs drain. LGATE2, LGATE1 - These pins provide the gate drive for the lower MOSFETs. PGND - This pin provides the power ground connection for the lower gate drivers for both PWM1 and PWM2. This pin should be connected to the sources of the lower MOSFETs and the (-) terminals of the external input capacitors. FB2, FB1 - These pins are connected to the feedback resistor divider and provide the voltage feedback signals for the respective controller. They set the output voltage of the converter. In addition, the PGOOD circuit uses these inputs to monitor the output voltage status. ISEN2, ISEN1 - These pins are used to monitor the voltage drop across the lower MOSFET for current loop feedback and overcurrent protection. PGOOD - This is an open drain logic output used to indicate the status of the output voltages. This pin is pulled low when either of the two PWM outputs is not within 10% of the respective nominal voltage. SGND - This is the small-signal ground, common to both controllers, and must be routed separately from the high current ground (PGND). All voltage levels are measured with respect to this pin. Connect the additional SGND pins to this pin. VIN - Use this pin to power the device with an external supply voltage with a range of 5.6V to 24V. For 5V ±10% operation, connect this pin to VCC5. VCC5 - This pin is the output of the internal +5V linear regulator. This output supplies the bias for the IC, the low side gate drivers, and the external boot circuitry for the high side gate drivers. The IC may be powered directly from a single 5V (±10%) supply at this pin. When used as a 5V supply input, this pin must be externally connected to VIN. The VCC5 pin must be always decoupled to power ground with a recommended minimum of 4.7F ceramic capacitor, placed very close to the pin. BIAS - This pin must be connected directly to VCC5. SS1, SS2 - These pins provide a soft-start function for their respective PWM controllers. When the chip is enabled, the regulated 5A pull-up current source charges the capacitor connected from this pin to ground. The error amplifier reference voltage ramps from 0 to 0.8V while the voltage on the soft-start pin ramps from 0 to 0.8V. SD1, SD2 - These pins provide an enable/disable function for their respective PWM output. The output is enabled when this pin is floating or pulled HIGH, and disabled when the pin is pulled LOW. OCSET2, OCSET1 - A resistor from this pin to ground sets the overcurrent threshold for the respective PWM. Functional Description General Description The ISL6440 integrates control circuits for two synchronous buck converters. The two synchronous bucks operate 180 degrees out of phase to substantially reduce the input ripple and thus reduce the input filter requirements. The chip has four control lines (SS1, SD1, SS2, and SD2), which provide independent control for each of the synchronous buck outputs. The PWM controllers employ a free-running frequency of 300kHz. The current mode control scheme with an input voltage feed-forward ramp input to the modulator provides excellent rejection of input voltage variations and provides simplified loop compensation. Internal 5V Linear Regulator (VCC5) All ISL6440 functions are internally powered from an on- chip, low dropout, +5V regulator. The maximum regulator input voltage is 24V. Bypass the regulator’s output (VCC5) with a 4.7µF capacitor to ground. The dropout voltage for this LDO is typically 600mV, so when VIN is greater then 5.6V, VCC5V is +5V. The ISL6440 also employs an undervoltage lockout circuit that disables both regulators when VCC5 falls below 4.4V. The internal LDO can source over 60mA to supply the IC, power the low side gate drivers, charge the external boot capacitor and supply small external loads. When driving large FETs, little or no regulator current may be available for external loads. For example, a single large FET with 30nC total gate charge requires 30nC x 300kHz = 9mA. Thus four total FETs would require 36mA. With 3mA for the internal bias would leave approximately 20mA for an external +5V supply. Also, at higher input voltages with larger FETs, the power dissipation across the internal 5V will increase. Excessive dissipation across this regulator must be avoided to prevent junction temperature rise. Larger FETs can be used with 5V ±10% input applications. The thermal overload protection circuit will be triggered if the VCC5 output is short circuited. Connect VCC5 to VIN for 5V ±10% input applications.FN9040 Rev 2.00 Page 8 of 15 Oct 4, 2005

Page 10

ISL6440Soft-Start Operation When soft-start is initiated, the voltage on the SS pin of the enabled PWM channels starts to ramp gradually, due to the 5A current sourced into the external capacitor. The output voltage follows the soft-start voltage. When the SS pin voltage reaches 0.8V, the output voltage of the enabled PWM channel reaches the regulation point, and the soft-start pin voltage continues to rise. At this point the PGOOD and fault circuitry is enabled. This completes the soft-start sequence. Any further rise of SS pin voltage does not affect the output voltage. By varying the values of the soft-start capacitors, it is possible to provide sequencing of the main outputs at start-up. The soft-start time can be obtained from the following equation: The soft-start capacitors can be chosen to provide startup tracking for the two PWM outputs. This can be achieved by choosing the soft-start capacitors such that the soft-start capacitor ration equals the respective PWM output voltage ratio. For example, if I use PWM1 = 1.2V and PWM2 = 3.3V then the soft-start capacitor ration should be, CSS1/CSS1 = 1.2/3.3 = 0.364. Figure 14 shows that soft-start waveform with CSS1 = 0.01µF and CSS2 = 0.027µF. Output Voltage Programming A resistive divider from the output to ground sets the output voltage of either PWM channel. The center point of the divider shall be connected to FBx pin. The output voltage value is determined by the following equation. where R1 is the top resistor of the feedback divider network and R2 is the resistor connected from FB1 or FB2 to ground. Out-of-Phase Operation The two PWM controllers in the ISL6440 operate 180o out- of-phase to reduce input ripple current. This reduces the input capacitor ripple current requirements, reduces power supply-induced noise, and improves EMI. This effectively helps to lower component cost, save board space and reduce EMI. Dual PWMs typically operate in-phase and turn on both upper FETs at the same time. The input capacitor must then support the instantaneous current requirements of both controllers simultaneously, resulting in increased ripple voltage and current. The higher RMS ripple current lowers the efficiency due to the power loss associated with the ESR of the input capacitor. This typically requires more low-ESR capacitors in parallel to minimize the input voltage ripple and ESR-related losses, or to meet the required ripple current rating. With dual synchronized out-of-phase operation, the high- side MOSFETs of the ISL6440 turn on 180o out-of-phase. The instantaneous input current peaks of both regulators no longer overlap, resulting in reduced RMS ripple current and input voltage ripple. This reduces the required input capacitor ripple current rating, allowing fewer or less expensive capacitors, and reducing the shielding requirements for EMI. The typical operating curves show the synchronized 180 degree out-of-phase operation. TSOFT 0.8V CSS 5A -----------   = FIGURE 13. SOFT-START OPERATION VCC5 1V/DIV SS1 1V/DIV VOUT1 1V/DIV FIGURE 14. PWM1 AND PWM2 OUTPUT TRACKING DURING STARTUP VOUT1 1V/DIV VOUT2 1V/DIV VOUTx 0.8V R1 R2+ R2 ----------------------   =FN9040 Rev 2.00 Page 9 of 15 Oct 4, 2005

ISL6440IAZ-TK Guarantees

Service Guarantee

Service Guarantees

We guarantee 100% customer satisfaction.

Our experienced sales team and tech support team back our services to satisfy all our customers.

Quality Guarantee

Quality Guarantees

We provide 90 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.

ISL6440IAZ-TK Related Products

hotISL6440IAZ-TK ISL6566IRZA-TR5184 Intersil, IC CTRLR PWM 3PHASE BUCK 40-QFN, 40-VFQFN Exposed Pad, - View
hotISL6440IAZ-TK ISL6566AIRZ Intersil, IC CTRLR PWM 3PHASE BUCK 40-QFN, 40-VFQFN Exposed Pad, - View
hotISL6440IAZ-TK ISL6227CAZS2698 Intersil, IC CONTROLLER DDR, DDR2 28QSOP, 28-SSOP (0.154", 3.90mm Width), - View
hotISL6440IAZ-TK ISL6546IRZ-T Intersil, IC REG BUCK 1.2A SYNC 10-QFN, 10-VFDFN Exposed Pad, - View
hotISL6440IAZ-TK ISL6410AIU-TK Intersil, IC REG BCK PROG 0.6A SYNC 10MSOP, 10-TFSOP, 10-MSOP (0.118", 3.00mm Width), - View
hotISL6440IAZ-TK ISL6564ACRZ Intersil, IC REG CTRLR BUCK 40QFN, 40-VFQFN Exposed Pad, - View
hotISL6440IAZ-TK ISL6551ABZ-T Intersil, IC REG CTRLR FULL-BRIDGE 28SOIC, 28-SOIC (0.295", 7.50mm Width), - View
hotISL6440IAZ-TK ISL6522BCRZ Intersil, IC REG CTRLR BUCK 16QFN, 16-VQFN Exposed Pad, - View
hotISL6440IAZ-TK X4165PI-2.7A Intersil, IC SUPERVISOR CPU 16K EE 8-DIP, 8-DIP (0.300", 7.62mm), - View
hotISL6440IAZ-TK ISL62392IRTZ Intersil, IC PWR SUPPLY CONTROLLER 28TQFN, 28-WFQFN Exposed Pad, - View
hotISL6440IAZ-TK ISL6144IVZA-T Intersil, IC OR CTRLR N+1 16TSSOP, 16-TSSOP (0.173", 4.40mm Width), - View
hotISL6440IAZ-TK ISL61861FCBZ Intersil, IC USB PWR CTRLR 1.5A 8SOIC, 8-SOIC (0.154", 3.90mm Width), - View

ISL6440IAZ-TK Tags

  • ISL6440IAZ-TK
  • ISL6440IAZ-TK PDF
  • ISL6440IAZ-TK datasheet
  • ISL6440IAZ-TK specification
  • ISL6440IAZ-TK image
  • Intersil
  • Intersil ISL6440IAZ-TK
  • buy ISL6440IAZ-TK
  • ISL6440IAZ-TK price
  • ISL6440IAZ-TK distributor
  • ISL6440IAZ-TK supplier
  • ISL6440IAZ-TK wholesales

ISL6440IAZ-TK is Available in