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ISL90460WIE527Z-TK

hotISL90460WIE527Z-TK

ISL90460WIE527Z-TK

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Part Number ISL90460WIE527Z-TK
Manufacturer Intersil
Description IC XDCP 32-TAP 10KOHMS SC70-5
Datasheet ISL90460WIE527Z-TK Datasheet
Package 5-TSSOP, SC-70-5, SOT-353
In Stock 770 piece(s)
Unit Price Request a Quote
Lead Time Can Ship Immediately
Estimated Delivery Time Jan 24 - Jan 29 (Choose Expedited Shipping)
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Part Number # ISL90460WIE527Z-TK (Data Acquisition - Digital Potentiometers) is manufactured by Intersil and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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ISL90460WIE527Z-TK Specifications

ManufacturerIntersil
CategoryIntegrated Circuits (ICs) - Data Acquisition - Digital Potentiometers
Datasheet ISL90460WIE527Z-TKDatasheet
Package5-TSSOP, SC-70-5, SOT-353
SeriesXDCP?
TaperLinear
ConfigurationRheostat
Number of Circuits1
Number of Taps32
Resistance (Ohms)10k
InterfaceUp/Down (U/D, CS)
Memory TypeVolatile
Voltage - Supply2.7 V ~ 5.5 V
Features-
Tolerance±20%
Temperature Coefficient (Typ)±35 ppm/°C
Resistance - Wiper (Ohms) (Typ)600
Operating Temperature-40°C ~ 85°C
Package / Case5-TSSOP, SC-70-5, SOT-353
Supplier Device PackageSC-70-5

ISL90460WIE527Z-TK Datasheet

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FN8225 Rev 4.00 October 22, 2015 ISL90460 Single Volatile 32-Tap XDCP™ Digitally Controlled Potentiometer (XDCP) DATASHEETNOT RECOMMENDED FOR NEW DESIGNSPOSSIBLE SUBSTITUTE PRODUCT ISL90461, ISL90462, ISL23511The Intersil ISL90460 is a digitally controlled potentiometer (XDCP). Configured as a variable resistor, the device consists of a resistor array, wiper switches, a control section, and volatile memory. The wiper position is controlled by a 2-pin Up/Down interface. The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS and U/D inputs. The device can be used in a wide variety of applications including: • LCD contrast control • Parameter and bias adjustments • Industrial and automotive control • Transducer adjustment of pressure, temperature, position, chemical, and optical sensors • Laser Diode driver biasing • Gain control and offset adjustment Features • Volatile Solid-State Potentiometer • 2-pin UP/DN Interface • DCP Terminal Voltage, 2.7V to 5.5V • Tempco 35ppm/°C Typical • 32 Wiper Tap Points • Low Power CMOS - Active current 25µA max. - Supply current 0.3µA • Available RTOTAL Values = 10k50k100k • Temp Range -40°C to +85°C • Packages - 5 Ld SC-70, SOT-23 • Pb-Free Plus Anneal Available (RoHS Compliant) Pinout ISL90460 (5 LD SOT-23, SC-70) TOP VIEW VDD GND U/D RH CSFN8225 Rev 4.00 Page 1 of 8 October 22, 2015

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ISL90460 Block Diagram Ordering Information PART NUMBER PART MARKING RTOTAL (K) TEMP RANGE (°C) PACKAGE (Tape and Reel) PKG. DWG. # ISL90460WIE527Z-TK (See Note) No longer available or supported, recommended replacement: ISL90460TIH527Z-TK DDY 10 -40 to +85 5 Ld SC-70 (Pb-free) P5.049 ISL90460WIH527Z -TK (See Note) DDZ -40 to +85 5 Ld SOT-23 (Pb-free) P5.064 ISL90460UIE527Z-TK (See Note) No longer available or supported, recommended replacement: ISL90460TIH527Z-TK DDW 50 -40 to +85 5 Ld SC-70 (Pb-free) P5.049 ISL90460UIH527Z -TK (See Note) No longer available or supported, recommended replacement: ISL90460TIH527Z-TK DDX -40 to +85 5 Ld SOT-23 (Pb-free) P5.064 ISL90460TIE527Z-TK (See Note) No longer available or supported, recommended replacement: ISL90460TIH527Z-TK DDU 100 -40 to +85 5 Ld SC-70 (Pb-free) P5.049 ISL90460TIH527Z-TK (See Note) DDV -40 to +85 5 Ld SOT-23 (Pb-free) P5.064 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. CONTROL AND MEMORY UP/DOWN (U/D) DEVICE SELECT (CS) GND (GROUND) RH GENERAL VCC Pin Descriptions SOT-23/SC-70 5-PIN SYMBOL DESCRIPTION 1 VDD Supply voltage 2 GND Ground 3 U/D Up - Down 4 CS Chip select 5 RH High terminal/Wiper terminalFN8225 Rev 4.00 Page 2 of 8 October 22, 2015

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ISL90460 Equivalent Circuit Absolute Maximum Ratings Recommended Operating Conditions Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on CS, U/D and VCC with Respect to GND . . . . -1V to +7V Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . . 300°C IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±6mA Power Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mW Temperature Range (Industrial) . . . . . . . . . . . . . . . . . . -40°C to 85°C Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; functional operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Potentiometer SpecificationsOver recommended operating conditions unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN TYP (Note 4) MAX UNIT RTOT End to end resistance W version 8 10 12 k U version 40 50 60 k T version 80 100 120 k VR RH, RL terminal voltages 0 VCC V Noise Ref: 1kHz -120 dBV RW Wiper Resistance 600  IW Wiper Current 0.6 mA Resolution 1 32 Taps Absolute linearity (Note 1) RH(n)(actual) - RH(n)(expected) ±1 MI (Note 3) Relative linearity (Note 2) RH(n+1) - [RH(n)+MI] ±0.5 MI (Note 3) RTOTAL temperature coefficient ±35 ppm/°C CH/CL/CW Potentiometer capacitances See equivalent circuit 10/10/25 pF NOTES: 1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (RH(n)(actual) - RH(n)(expected)) = ±1 Ml Maximum. n = 1 .. 29 only. 2. Relative linearity is a measure of the error in step size between taps = RH(n+1) - [RH(n) + Ml] = ±0.5 Ml, n = 1 .. 29 only. 3. 1 Ml = Minimum Increment = RTOT/31. 4. Typical values are for TA = 25°C and nominal supply voltage. CH CL RW RTOTAL CW RH RLFN8225 Rev 4.00 Page 3 of 8 October 22, 2015

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ISL90460 DC Electrical Specifications Over recommended operating conditions unless otherwise specified. SYMBOL PARAMETER TEST CONDITIONS MIN TYP (Note 4) MAX UNIT ICC VCC active current (Increment) CS = 0V, U/D = fclock = 1MHz and VCC = 3V 25 µA ISB Standby supply current CS = VCC, U/D = VSS or VCC = 3V 0.3 1 µA ILI CS input leakage current VIN = VSS to VCC ±1 µA ILI U/D input leakage current VIN = VSS to VCC ±1 µA VIH CS, U/D input HIGH voltage VCC x 0.7 V VIL CS, U/D input LOW voltage VCC x 0.3 V CIN CS, U/D input capacitance VCC = 3V, VIN = VSS, TA = 25°C, f = 1MHz 10 pF Timing Specifications Over recommended operating conditions unless otherwise specified) (Figures 1 and 2) SYMBOL PARAMETER MIN TYP (Note 4) MAX UNIT tCU U/D to CS setup 25 ns tCI CS to U/D setup 50 ns tIC CS to U/D hold 25 ns tlL U/D LOW period 300 ns tlH U/D HIGH period 300 ns fTOGGLE Up/Down toggle rate 1 MHz tSETTLE Output settling time 1 µs CS U/D RH tCU tCI tIL tIH tIC tSETTLE FIGURE 1. SERIAL INTERFACE TIMING DIAGRAM, INCREMENTFN8225 Rev 4.00 Page 4 of 8 October 22, 2015

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ISL90460 Pin Descriptions RH The ISL90460 contains a digital potentiometer connected as a rheostat or variable resistor. The wiper and one terminal of the digital potentiometer is tied to the RH pin, and the other terminal of the potentiometer is tied to the ground pin (GND). The resistance from the RH pin to ground will vary with the potentiometer setting; at the highest setting, the resistance will be the maximum (Rtot), at the lowest setting it will be a minimum. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in volatile memory when CS is returned HIGH. When CS is high, the device is placed in low power standby mode. Principles of Operation There are two sections of the ISL90460: the input control, counter and decode section; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper. The wiper is connected to the RH terminal, forming a variable resistor from RH to GND. The direction of the wiper movement is defined when the device is selected. If during CS transition from High to Low the U/D input is LOW, the wiper will move down on each rising edge of U/D toggling. Similarly, the wiper will move up on each rising edge of U/D toggling if, during CS transition from High to Low, the U/D input is High. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. If the wiper is moved several positions, multiple taps are connected to the wiper for tSETTLE (U/D to RH change). The 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. CS U/D RH tCU tCI tIL tIH tIC tSETTLE FIGURE 2. SERIAL INTERFACE TIMING DIAGRAM, DECREMENTFN8225 Rev 4.00 Page 5 of 8 October 22, 2015

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ISL90460 Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html © Copyright Intersil Americas LLC 2005-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE October 22, 2015 FN8225.4 Added Rev History and About Intersil Verbiage. Updated Ordering Information on page 2 Updated PODs to most recent revisions. Made correction to Pkg Dwg # in Ordering Information table “P5.046” to P5.064”FN8225 Rev 4.00 Page 6 of 8 October 22, 2015

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ISL90460 FN8225 Rev 4.00 Page 7 of 8 October 22, 2015 Package Outline Drawing P5.064 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE Rev 3, 4/11 NOTES: DETAIL "X"SIDE VIEW TYPICAL RECOMMENDED LAND PATTERN TOP VIEW 5x (1.2) 5x (0.60) (2x 0.95) (2.4) SEE DETAIL X 8°3 3 (1.90) 0.10 (0.004) C 5 2 4 END VIEW 0.55 0.35 3.00 2.80 (1.90) 0.50 0.30 3.00 2.60 (0.95) 0.20 (0.008) CM 1.70 1.50 0° 0.22 0.08 5 GAUGE PLANE SEATING C PLANE (0.60) 4 0.25 0.10 0.10 MIN 8° 0° (0.25) 1.30 0.90 1.45 0.90 0.15 0.00 C SEATING PLANE 5 3 4 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 3. Package length and width are exclusive of mold flash, protrusions, or gate burrs. 4. Footlength measured at reference to gauge plane. 5. Lead thickness applies to the flat section of the lead between 6. Controlling dimension: MILLIMETER. 0.08mm and 0.15mm from the lead tip. Dimensions in ( ) for reference only.

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Went well this time Now have the IC and very pleased.

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