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L5985TR

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L5985TR

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Part Number L5985TR
Manufacturer STMicroelectronics
Description IC REG BUCK ADJ 2A 8VFQFPN
Datasheet L5985TR Datasheet
Package 8-VFDFN Exposed Pad
In Stock 57,926 piece(s)
Unit Price $ 0.9329 *
Lead Time Can Ship Immediately
Estimated Delivery Time Sep 26 - Oct 1 (Choose Expedited Shipping)
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Part Number # L5985TR (PMIC - Voltage Regulators - DC DC Switching Regulators) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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L5985TR Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - DC DC Switching Regulators
Datasheet L5985TRDatasheet
Package8-VFDFN Exposed Pad
Series-
FunctionStep-Down
Output ConfigurationPositive
TopologyBuck
Output TypeAdjustable
Number of Outputs1
Voltage - Input (Min)2.9V
Voltage - Input (Max)18V
Voltage - Output (Min/Fixed)0.6V
Voltage - Output (Max)18V
Current - Output2A
Frequency - Switching250kHz ~ 1MHz
Synchronous RectifierNo
Operating Temperature-40°C ~ 150°C (TJ)
Mounting TypeSurface Mount
Package / Case8-VFDFN Exposed Pad
Supplier Device Package8-VFQFPN (3x3)

L5985TR Datasheet

Page 1

Page 2

This is information on a product in full production. May 2014 DocID13006 Rev 6 1/37 L5985 2 A step-down switching regulator Datasheet - production data Features  2 A DC output current  2.9 V to 18 V input voltage  Output voltage adjustable from 0.6 V  250 kHz switching frequency, programmable up to 1 MHz  Internal soft-start and inhibit  Low dropout operation: 100% duty cycle  Voltage feedforward  Zero load current operation  Overcurrent and thermal protection  VFQFPN8 3 mm x 3 mm package Applications  Consumer: STB, DVD, DVD recorder, car audio, LCD TV and monitors  Industrial: chargers, PLD, PLA, FPGA  Networking: XDSL, modems, DC-DC modules  Computer: optical storage, hard disk drive, printers, audio/graphic cards  LED driving Description The L5985 is a step-down switching regulator with a 2.5 A (min.) current limited embedded Power MOSFET, so it is able to deliver up to 2 A DC current to the load depending on the application condition. The input voltage can range from 2.9 V to 18 V, while the output voltage can be set starting from 0.6 V to VIN. Having a minimum input voltage of 2.9 V, the device is suitable for a 3.3 V bus. Requiring a minimum set of external components, the device includes an internal 250 kHz switching frequency oscillator that can be externally adjusted up to 1 MHz. The VFQFPN8 package with an exposed pad allows reducing the RthJA down to approximately 60 °C/W. VFQFPN8 3 mm x 3 mm Figure 1. Application circuit www.st.com

Page 3

Contents L5985 2/37 DocID13006 Rev 6 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4.1 Oscillator and synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 4.3 Error amplifier and compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.4 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.5 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.4 Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.4.1 Type III compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5.4.2 Type II compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.5 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.6 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 5.7 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

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DocID13006 Rev 6 3/37 L5985 Contents 37 7 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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Pin settings L5985 4/37 DocID13006 Rev 6 1 Pin settings 1.1 Pin connection Figure 2.Pin connection (top view) 1.2 Pin description OUT SYNCH INH COMP VCC GND FSW FB Table 1. Pin description N Type Description 1 OUT Regulator output 2 SYNCH Master/slave synchronization. When it is left floating, a signal with a phase shift of half a period respect to the power turn-on is present at the pin. When connected to an external signal at a frequency higher than the internal one, then the device is synchronized by the external signal, with zero phase shift. Connecting together the SYNCH pin of two devices, the one with higher frequency works as a master and the other one as a slave; so the two power turn-on have a phase shift of half a period. 3 INH A logical signal (active high) disables the device. With INH higher than 1.9 V the device is OFF and with INH lower than 0.6 V the device is ON. 4 COMP Error amplifier output to be used for loop frequency compensation 5 FB Feedback input. Connecting the output voltage directly to this pin the output voltage is regulated at 0.6 V. To have higher regulated voltages an external resistor divider is required from the Vout to the FB pin. 6 FSW The switching frequency can be increased connecting an external resistor from the FSW pin and ground. If this pin is left floating, the device works at its free-running frequency of 250 kHz. 7 GND Ground 8 VCC Unregulated DC input voltage

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DocID13006 Rev 6 5/37 L5985 Maximum ratings 37 2 Maximum ratings 2.1 Absolute maximum ratings 2.2 Thermal data Table 2. Absolute maximum ratings Symbol Parameter Value Unit Vcc Input voltage 20 V OUT Output DC voltage -0.3 to VCC FSW, COMP, SYNCH Analog pin -0.3 to 4 INH Inhibit pin -0.3 to VCC FB Feedback voltage -0.3 to 1.5 PTOT Power dissipation at TA < 60 °C 1.5 W TJ Junction temperature range -40 to 150 °C Tstg Storage temperature range -55 to 150 °C Table 3. Thermal data Symbol Parameter Value Unit RthJA Maximum thermal resistance junction ambient (1) VFQFPN 60 °C/W 1. Package mounted on demonstration board.

Page 7

Electrical characteristics L5985 6/37 DocID13006 Rev 6 3 Electrical characteristics TJ = 25 °C, VCC = 12 V, unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test condition Values Unit Min. Typ. Max. VCC Operating input voltage range (1) 2.9 18 VVCCON turn-on VCC threshold (1) 2.9 VCCHYS VCC UVLO hysteresis (1) 0.175 0.3 RDS(on) MOSFET on resistance 140 170 m (1) 140 220 ILIM Maximum limiting current 2.5 2.9 3.3 A Oscillator FSW Switching frequency 225 250 275 kHz (1) 220 275 VFSW FSW pin voltage 1.254 V D Duty cycle 0 100 % FADJ Adjustable switching frequency RFSW = 33 k 1000 kHz Dynamic characteristics VFB Feedback voltage 2.9 V < VCC < 18 V (1) 0.593 0.6 0.607 V DC characteristics IQ Quiescent current Duty cycle = 0, VFB = 0.8 V 2.4 mA IQST-BY Total standby quiescent current 20 30 A Inhibit INH threshold voltage Device ON level 0.6 V Device OFF level 1.9 INH current INH = 0 7.5 10 A Soft-start TSS Soft-start duration FSW pin floating 7.4 8.2 9.1 ms FSW = 1 MHz, RFSW = 33 k 2

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DocID13006 Rev 6 7/37 L5985 Electrical characteristics 37 Error amplifier VCH High level output voltage VFB < 0.6 V 3 V VCL Low level output voltage VFB > 0.6 V 0.1 IFB Bias source current VFB = 0 V to 0.8 V 1 A IO SOURCE Source COMP pin VFB = 0.5 V, VCOMP = 1 V 20 mA IO SINK Sink COMP pin VFB = 0.7 V, VCOMP = 1 V 25 mA GV Open loop voltage gain (2) 100 dB Synchronization function High input voltage 2 3.3 V Low input voltage 1 Slave sink current VSYNCH = 2.9 V 0.7 0.9 mA Master output amplitude ISOURCE = 4.5 mA 2.0 V Output pulse width SYNCH floating 110 ns Input pulse width 70 Protection IFBDISC FB disconnection source current 1 A TSHDN Thermal shutdown 150 °C Hysteresis 30 1. Specification referred to TJ from -40 to +125 °C. Specification in the -40 to +125 °C temperature range are assured by design, characterization and statistical correlation. 2. Guaranteed by design. Table 4. Electrical characteristics (continued) Symbol Parameter Test condition Values Unit Min. Typ. Max.

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Functional description L5985 8/37 DocID13006 Rev 6 4 Functional description The L5985 device is based on a “voltage mode”, constant frequency control. The output voltage VOUT is sensed by the feedback pin (FB) compared to an internal reference (0.6 V) providing an error signal that, compared to a fixed frequency sawtooth, controls the on and off time of the power switch. The main internal blocks are shown in the block diagram in Figure 3. They are:  A fully integrated oscillator that provides sawtooth to modulate the duty cycle and the synchronization signal. Its switching frequency can be adjusted by an external resistor. The voltage and frequency feedforward are implemented.  The soft-start circuitry to limit inrush current during the startup phase.  The voltage mode error amplifier  The pulse width modulator and the relative logic circuitry necessary to drive the internal power switch.  The high-side driver for embedded P-channel Power MOSFET switch.  The peak current limit sensing block, to handle overload and short-circuit conditions.  A voltage regulator and internal reference. It supplies internal circuitry and provides a fixed internal reference.  A voltage monitor circuitry (UVLO) that checks the input and internal voltages.  The thermal shutdown block, to prevent thermal runaway. Figure 3. Block diagram

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DocID13006 Rev 6 9/37 L5985 Functional description 37 4.1 Oscillator and synchronization Figure 4 shows the block diagram of the oscillator circuit. The internal oscillator provides a constant frequency clock. Its frequency depends on the resistor externally connected to the FSW pin. In case the FSW pin is left floating, the frequency is 250 kHz; it can be increased as shown in Figure 6 by an external resistor connected to ground. To improve the line transient performance, keeping the PWM gain constant versus the input voltage, the voltage feedforward is implemented by changing the slope of the sawtooth according to the input voltage change (see Figure 5.a). The slope of the sawtooth also changes if the oscillator frequency is increased by the external resistor. In this way a frequency feedforward is implemented (Figure 5.b) in order to keep the PWM gain constant versus the switching frequency (see Section 5.4 on page 18 for PWM gain expression). On the SYNCH pin the synchronization signal is generated. This signal has a phase shift of 180° with respect to the clock. This delay is useful when two devices are synchronized connecting the SYNCH pin together. When SYNCH pins are connected, the device with higher oscillator frequency works as a master, so the slave device switches at the frequency of the master but with a delay of half a period. This minimizes the RMS current flowing through the input capacitor (see the L5988D datasheet). Figure 4. Oscillator circuit block diagram The device can be synchronized to work at higher frequency feeding an external clock signal. The synchronization changes the sawtooth amplitude, changing the PWM gain (Figure 5.c). This changing has to be taken into account when the loop stability is studied. To minimize the change of the PWM gain, the free running frequency should be set (with a resistor on the FSW pin) only slightly lower than the external clock frequency. This pre- adjusting of the frequency will change the sawtooth slope in order to get negligible the truncation of sawtooth, due to the external synchronization. Clock Generator Ramp Generator FSW Sawtooth Clock Synchronization SYNCH

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