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MAX1232MJA

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MAX1232MJA

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Part Number MAX1232MJA
Manufacturer Maxim Integrated
Description IC VOLT MONITOR PRECISION 8-CDIP
Datasheet MAX1232MJA Datasheet
Package 8-CDIP (0.300", 7.62mm)
In Stock 407 piece(s)
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Lead Time Can Ship Immediately
Estimated Delivery Time Aug 14 - Aug 19 (Choose Expedited Shipping)
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Part Number # MAX1232MJA (PMIC - Supervisors) is manufactured by Maxim Integrated and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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MAX1232MJA Specifications

ManufacturerMaxim Integrated
CategoryIntegrated Circuits (ICs) - PMIC - Supervisors
Datasheet MAX1232MJADatasheet
Package8-CDIP (0.300", 7.62mm)
Series-
TypeSimple Reset/Power-On Reset
Number of Voltages Monitored1
OutputOpen Drain or Open Collector
ResetActive High/Active Low
Reset Timeout250 ms Minimum
Voltage - Threshold4.37V, 4.62V
Operating Temperature-55°C ~ 125°C (TA)
Mounting TypeThrough Hole
Package / Case8-CDIP (0.300", 7.62mm)
Supplier Device Package8-CERDIP

MAX1232MJA Datasheet

Page 1

Page 2

General Description The MAX1232 microprocessor (μP) supervisory circuit provides μP housekeeping and power-supply supervision functions while consuming only 1/10th the power of the DS1232. The MAX1232 enhances circuit reliability in μP systems by monitoring the power supply, monitoring the software execution, and providing a debounced manual reset input. The MAX1232 is a plug-in upgrade of the Dallas DS1232. A reset pulse of at least 250ms duration is supplied on power-up, power-down, and low-voltage brownout con- ditions (5% or 10% supply tolerances can be selected digitally). Also featured is a debounced manual reset input that forces the reset outputs to their active states for a minimum of 250ms. A digitally programmable watch- dog timer monitors software execution and can be pro- grammed for timeout settings of 150ms, 600ms, or 1.2s. The MAX1232 requires no external components. Applications ● Computers ● Controllers ● Intelligent Instruments ● Critical μP Power Monitoring Features ● Consumes 1/10th the Power of the DS1232 ● Precision Voltage Monitor—Adjustable +4.5V or +4.75V ● Power-OK/Reset Pulse Width—250ms Min ● No External Components ● Adjustable Watchdog Timer—150ms, 600ms, or 1.2s ● Debounced Manual Reset Input for External Override ● Available in 8-Pin PDIP/SO and 16-Pin Wide SO Packages 19-3899; Rev 2; 9/14 Ordering Information continued at end of data sheet. *Contact factory for dice specifications. Note: Devices in PDIP and SO packages are available in both leaded(Pb) and lead(Pb)-free packaging. Specify lead(Pb)-free by adding the “+” symbol at the end of the part number when order- ing. Lead-free not available for CERDIP package. PART TEMP RANGE PIN-PACKAGE MAX1232C/D 0°C to +70°C Dice* MAX1232CPA 0°C to +70°C 8 PDIP MAX1232CSA 0°C to +70°C 8 SO 5%/10% TOLERANCE SELECT RESET GENERATOR DEBOUNCE REF TOL VCC PB RST RST RST STTD GND WATCHDOG TIMEBASE SELECT WATCHDOG TIMER MAX1232 RST RSTGND 1 2 8 7 VCC STTD TOL PB RST DIP/SO TOP VIEW 3 4 6 5 MAX1232 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 N.C. N.C. VCC N.C. ST N.C. RST N.C. RST MAX1232 WIDE SO PB RST N.C. TOL TD N.C. N.C. GND MAX1232 Microprocessor Monitor Typical Operating Circuit Pin Configurations Ordering Information

Page 3

Voltage Range on Any Pin (with respect to GND) .....-1V to +7V Operating Temperature Range C Suffix ...............................................................0°C to +70°C E Suffix ........................................................... -40°C to +85°C M Suffix ......................................................... -55°C to +125°C Storage Temperature Range ............................ -65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C (TA = TMIN to TMAX, unless otherwise noted.) (VCC = +4.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) (TA = +25°C, unless otherwise noted.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Supply Voltage VCC 4.5 5.0 5.5 V ST and PBRST Input High Level (Note 1) VIH 2.0 VCC + 0.3 V ST and PBRST Input Low Level VIL -0.3 +0.8 V PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Leakage ST, TOL IIL -1.0 +1.0 µA Output Current RST IOH VOH = 2.4V -1.0 -12 mA Output Current RST, RST IOL VOL = 0.4V 2.0 10 mA Operating Current (Note 2) ICC 50 200 µA VCC 5% Trip Point (Note 3) VCCTP TOL = GND 4.50 4.62 4.74 V VCC 10% Trip Point (Note 3) VCCTP TOL = VCC 4.25 4.37 4.49 V PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input Capacitance ST, TOL CIN 5 pF Output Capacitance RST, RST COUT 7 pF MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 2 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended DC Operating Conditions DC Electrical Characteristics Capacitance (Note 4)

Page 4

(VCC = +5V ±10%, TA = TMIN to TMAX, unless otherwise noted.) Note 1: PBRST is internally pulled up to VCC with an internal impedance of typically 40kΩ. Note 2: Measured with outputs open. Note 3: All voltages referenced to GND. Note 4: Guaranteed by design. Note 5: PBRST must be held low for a minimum of 20ms to guarantee a reset. Note 6: tR = 5μs. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PBRST (Note 5) tPB Figure 3 20 ms PBRST Delay tPBD Figure 3 1 4 20 ms Reset Active Time tRST 250 610 1000 ms ST Pulse Width tST Figure 4 75 ns ST Timeout Period tTD Figure 4, TD pin = 0V 62.5 150 250 msTD pin = open 250 600 1000 TD pin = VCC 500 1200 2000 VCC Fall Time (Note 4) tF Figure 5 10 µs VCC Rise Time (Note 4) tB Figure 6 0 µs VCC Detect to RST High and RST Low tBPD Figure 7, VCC falling 100 ns VCC Detect to RST Low and RST Open (Note 6) tBPU Figure 8, VCC rising 250 610 1000 ms PIN NAME FUNCTION WIDE SO DIP/SO 1, 3, 5, 7, 10, 12, 14, 16 — N.C. No Connection 2 1 PBRST Pushbutton Reset Input. A debounced active-low input that ignores pulses less than 1ms in duration and is guaranteed to recognize inputs of 20ms or greater. 4 2 TD Time Delay Set. The watchdog timebase select input (tTD = 150ms for TD = 0V, tTD = 600ms for TD = open, tTD = 1.2s for TD = VCC). 6 3 TOL Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance. 8 4 GND Ground 9 5 RST Reset Output (Active High). Goes active: (1) If VCC falls below the selected reset voltage threshold. (2) If PBRST is forced low. (3) If ST is not strobed within the minimum timeout period. (4) During power-up. 11 6 RST Reset Output (Active Low, Open Drain). See RST. 13 7 ST Strobe Input. Input for watchdog timer. 15 8 VCC +5V Power-Supply Input MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 3 AC Electrical Characteristics Pin Description

Page 5

Detailed Description Power Monitor A voltage detector monitors VCC and holds the reset outputs (RST and RST) in their active states whenever VCC is below the selected 5% or 10% tolerance (4.62V or 4.37V, typically). To select the 5% level, connect TOL to ground. To select the 10% level, connect TOL to VCC. The reset outputs will remain in their active states until VCC has been continuously in-tolerance for a minimum of 250ms (the reset active time) to allow the power supply and μP to stabilize. The RST output both sinks and sources current, while the RST output, an open-drain MOSFET, sinks current only and must be pulled high. Pushbutton Reset Input The MAX1232’s debounced manual reset input (PBRST) manually forces the reset outputs into their active states. The reset outputs go active after PBRST has been held low for a time tPBD, the pushbutton reset delay time. The reset outputs remain in their active states for a minimum of 250ms after PBRST rises above VIH (Figure 3). A mechanical pushbutton or an active logic signal can drive the PBRST input. The debounced input ignores input pulses less than 1ms and is guaranteed to recog- nize pulses of 20ms or greater. The PBRST input has an internal pullup to VCC of about 100μA; therefore, an external pullup resistor is not necessary. Watchdog Timer The microprocessor drives the ST input with an input/ output (I/O) line. The microprocessor must toggle the ST input within a set period (as determined by TD) to verify proper software execution. If a hardware or software fail- ure keeps ST from toggling within the minimum timeout period—ST is activated only by falling edges (a high-to- low transition)—the MAX1232 reset outputs are forced to their active states for 250ms (Figure 2). This typically initi- ates the microprocessor’s power-up routine. If the inter- ruption continues, new reset pulses are generated each timeout period until ST is strobed. The timeout period is determined by the TD input connection. This timeout peri- od is typically 150ms with TD connected to GND, 600ms with TD floating, or 1200ms with TD connected to VCC. The software routine that strobes ST is critical. The code must be in a section of software that executes frequently enough so the time between toggles is less than the watchdog timeout period. One common technique con- trols the microprocessor I/O line from two sections of the program. The software might set the I/O line high while operating in the foreground mode, and set it low while in the background or interrupt mode. If both modes do not execute correctly, the watchdog timer issues reset pulses. Figure 1. Pushbutton Reset Figure 2. Watchdog Timer MICROPROCESSOR RESET PB RST RST +5V VCC ST TOLGND TD I/O MAX1232 7805 3-TERMINAL REGULATOR MICROPROCESSOR RESETRST+8V +5V 10kΩ +5V VCC 0.10µF ST TOL GNDTD I/O MAX1232 MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 4

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Figure 3. Pushbutton Reset. The debounced PBRST input ignores input pulses less than 1ms and is guaranteed to recognize pulses of 20ms or greater. Figure 4. Watchdog Strobe Input Figure 6. Power-Up Slew RateFigure 5. Power-Down Slew Rate tRST tPBD tPB VIH VIL PB RST RST RST tST tTD ST NOTE: tSD IS THE MAXIMUM ELAPSED TIME BETWEEN ST HIGH-TO-LOW TRANSITIONS (ST IS ACTIVATED BY FALLING EDGES ONLY) WHICH WILL KEEP THE WATCHDOG TIMER FROM FORCING THE RESET OUTPUTS ACTIVE FOR A TIME OF tRST. tTD IS A FUNCTION OF THE VOLTAGE AT THE TD PIN, AS TABULATED BELOW. CONDITION TD pin = 0V TD pin = open TD pin = VCC MIN tTD TYP 150ms 250ms 1200ms MAX 62.5ms 250ms 500ms 250ms 1000ms 2000ms tR VCC +4.75V +4.25V tF VCC +4.75V +4.25V MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 5

Page 7

Figure 8. VCC Detect Reset Output Delay (Power-Up)Figure 7. VCC Detect Reset Output Delay (Power-Down) tRPU VCC RST RST +4.75V (5% TRIP POINT) +4.5V (10% TRIP POINT) VOH VOL tRPD VCC RST VCC SLEW RATE = 1.66mV/sec (0.5V/300µsec) RST +4.25V (10% TRIP POINT) +4.5V (5% TRIP POINT) VOH VOL MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 6

Page 8

*Contact factory for dice specifications. Note: Devices in PDIP and SO packages are available in both leaded(Pb) and lead(Pb)-free packaging. Specify lead(Pb)-free by adding the “+” symbol at the end of the part number when order- ing. Lead-free not available for CERDIP package. PART TEMP RANGE PIN-PACKAGE MAX1232CWE 0°C to +70°C 16 Wide SO MAX1232EPA -40°C to +85°C 8 PDIP MAX1232ESA -40°C to +85°C 8 SO MAX1232EWE -40°C to +85°C 16 Wide SO MAX1232MJA -55°C to +125°C 8 CERDIP PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 CERDIP J8-2 21-0045 — 8 PDIP P8+2 21-0043 — 8 SO S8+4 21-0041 90-0096 16 Wide SO W16+1 21-0042 90-0107 0.099" (2.51 mm) 0.070" (1.78 mm) ST RST RSTGND TD TOL PB RST VCC MAX1232 Microprocessor Monitor www.maximintegrated.com Maxim Integrated │ 7 Package Information For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Ordering InformationChip Topography

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Mi*****s Om

August 9, 2020

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August 6, 2020

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July 23, 2020

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June 28, 2020

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June 27, 2020

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Ever*****chmidt

June 23, 2020

Tested one of them and works good.

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June 22, 2020

The capacitors were exactly the ones I wanted. Perfect fit.

MAX1232MJA Guarantees

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