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MAX802SCPA+

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MAX802SCPA+

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Part Number MAX802SCPA+
Manufacturer Maxim Integrated
Description IC SUPERVISOR MPU 8-DIP
Datasheet MAX802SCPA+ Datasheet
Package 8-DIP (0.300", 7.62mm)
In Stock 5,000 piece(s)
Unit Price $ 11.6186 *
Lead Time Can Ship Immediately
Estimated Delivery Time Dec 4 - Dec 9 (Choose Expedited Shipping)
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MAX802SCPA+ Specifications

ManufacturerMaxim Integrated
CategoryIntegrated Circuits (ICs) - PMIC - Supervisors
Datasheet MAX802SCPA+Datasheet
Package8-DIP (0.300", 7.62mm)
Series-
TypeBattery Backup Circuit
Number of Voltages Monitored1
OutputPush-Pull, Totem Pole
ResetActive Low
Reset Timeout140 ms Minimum
Voltage - Threshold2.925V
Operating Temperature0°C ~ 70°C (TA)
Mounting TypeThrough Hole
Package / Case8-DIP (0.300", 7.62mm)
Supplier Device Package8-PDIP

MAX802SCPA+ Datasheet

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General Description These microprocessor (µP) supervisory circuits reduce the complexity and number of components required for pow- er-supply monitoring and battery-control functions in µP systems. They significantly improve system reliability and accuracy compared to separate ICs or discrete components. These devices are designed for use in systems powered by 3.0V or 3.3V supplies. See the selector guide in the back of this data sheet for similar devices designed for 5V systems. The suffixes denote different reset threshold voltages: 3.075V (T), 2.925V (S), and 2.625V (R) (see the Reset Threshold section in the Detailed Description). All these parts are available in 8-pin DIP and SO packages. Functions offered in this series are as follows: Features ● RESET and RESET Outputs ● Manual Reset Input ● Precision Supply-Voltage Monitor ● 200ms Reset Time Delay ● Watchdog Timer (1.6sec timeout) ● Battery-Backup Power Switching—Battery Can Exceed VCC in Normal Operation ● 40µA VCC Supply Current ● 1µA Battery Supply Current ● Voltage Monitor for Power-Fail or Low-Battery Warning ● Guaranteed RESET Assertion to VCC = 1V ● 8-Pin DIP and SO Packages Applications ● Battery-Powered Computers and Controllers ● Embedded Controllers ● Intelligent Instruments ● Critical µP Power Monitoring ● Portable Equipment 19-0243; Rev 3; 4/15 Pin Configuration appears at end of data sheet.Typical Operating Circuits continued at at end of data sheet. Ordering Information continued at end of data sheet. *Contact factory for dice specifications. **These parts offer a choice of reset threshold voltage. Select the letter corresponding to the desired nominal reset threshold voltage (T = 3.075V, S = 2.925V, R = 2.625V) and insert it into the blank to complete the part number. Devices in PDIP and SO packages are available in both leaded and lead(Pb)-free packaging. Specify lead free by adding the + symbol at the end of the part number when ordering. Lead free not available for CERDIP package. PART** TEMP RANGE PIN-PACKAGE MAX690_CPA 0°C to +70°C 8 Plastic DIP MAX690_CSA 0°C to +70°C 8 SO MAX690_C/D 0°C to +70°C Dice* MAX690_EPA -40°C to +85°C 8 Plastic DIP MAX690_ESA -40°C to +85°C 8 SO MAX690_MJA -55°C to +125°C 8 CERDIP MAX690T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R 0.1µF VOUT RESET (RESET) PFO WDI R1 VBATT VCC GND GND GND VCC 0.1µF 0.1µF 3.6V LITHIUM BATTERY CMOS RAM µPVCC RESET NMI I/O LINE UNREGULATED DC REGULATED +3.3V OR +3.0V R2 BUS ( ) ARE FOR MAX804T/S/R, MAX805T/S/R PFI A ctive-Low R eset A ctive-H igh R eset W atchdog Input M anual R eset Input B ackup-B attery Sw itch Pow er-Fail Threshold A ccuracy Pow er-Fail C om parator R eset W indow MAX690    ±4%  ±75mV MAX704    ±4%  ±75mV MAX802    ±2%  ±2% MAX804    ±2%  ±2% MAX805    ±4%  ±75mV MAX806    ±2%  ±2% MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804‒MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits Typical Operating Circuits Ordering Information

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(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.) Terminal Voltage (with respect to GND) VCC ...................................................................-0.3V to +6.0V VBATT ..............................................................-0.3V to +6.0V All Other Inputs................. -0.3V to the higher of VCC or VBATT Continuous Input Current VCC ...............................................................................100mA VBATT ............................................................................18mA GND ................................................................................18mA Output Current RESET, PFO ..................................................................18mA VOUT .............................................................................100mA Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 9.09mW/°C above +70°C) ............727mW SO (derate 5.88mW/°C above +70°C) ........................471mW CERDIP (derate 8.00mW/°C above +70°C) ................640mW Operating Temperature Ranges MAX690_C_ _/MAX704_C_ _/MAX80_ _C_ _ .......0°C to +70°C MAX690_E_ _/MAX704_E_ _/MAX80_ _E_ _. ... -40°C to +85°C MAX690_M_ _/MAX704_M_ _/MAX80_ _M_ _ ... -55°C to +125°C Storage Temperature Range ............................ -65°C to +160°C Lead Temperature (soldering, 10s) .................................+300°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Voltage Range, VCC, VBATT (Note 1) MAX690_C, MAX704_C, MAX80_ _C 1.0 5.5 V MAX690_E/M, MAX704_E/M, MAX80_ _E/M 1.1 5.5 VCC Supply Current (excluding IOUT) ISUPPLY MR = VCC (MAX704_/ MAX806_) MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC < 3.6V 40 50 µA MAX690_C/E, MAX704_C/E, MAX80_ _C/E, VCC < 5.5V 50 65 MAX690_M, MAX704_M, MAX80_ _M, VCC < 3.6V 40 55 MAX690_M, MAX704_M, MAX80_ _M, VCC < 5.5V 50 70 VCC Supply Current in Battery- Backup Mode(excluding IOUT) MR = VCC (MAX704_/ MAX806_) VCC = 2.0V, VBATT = 2.3V 25 50 µA VBATT Supply Current, Any Mode (excluding IOUT) (Note 2) MAX690_C/E, MAX704_C/E, MAX80_ _C/E 0.4 1 µA MAX690_M, MAX704_M, MAX80_ _M 0.4 10 Battery Leakage Current (Note 3) MAX690_C/E, MAX704_C/E, MAX80_ _C/E 0.01 0.5 µA MAX690_M, MAX704_M, MAX80_ _M 0.01 5 VOUT Output Voltage MAX690_C/E, MAX704_C/E, MAX80_ _C/E, IOUT = 5mA (Note 4) VCC -0.3 VCC -0.015 V MAX690_C/E, MAX704_C/E, MAX80_ _C/E IOUT = 50mA VCC -0.3 VCC -0.15 MAX690_M, MAX704_M, MAX80_ _M IOUT = 5mA (Note 4) VCC -0.035 VCC -0.015 MAX690_M, MAX704_M, MAX80_ _M IOUT = 50mA VCC -0.35 VCC -0.15 IOUT = 250µA, VCC > 2.5V (Note 4) VCC -0.0015 VCC -0.0006 MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 2 Absolute Maximum Ratings Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Electrical Characteristics

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(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS VOUT in Battery-Backup Mode IOUT = 250µA, VBATT = 2.3V VBATT - 0.1 VBATT - 0.034 V IOUT = 1mA, VBATT = 2.3V VBATT -0.14 Battery Switch Threshold, VCC Falling VBATT - VCC, VSW > VCC > 1.75V (Note 5) 65 25 mV VSW VBATT > VCC (Note 6) 2.30 2.40 2.50 V Battery Switch Threshold, VCC Rising (Note 7) This value is identical to the reset threshold, VCC rising V Reset Threshold (Note 8) VRST MAX690T/704T/805T VCC falling 3.00 3.075 3.15 V VCC rising 3.00 3.085 3.17 MAX802T/804T/806T VCC falling 3.00 3.075 3.12 VCC rising 3.00 3.085 3.14 MAX690S/704S/805S VCC falling 2.85 2.925 3.00 VCC rising 2.85 2.935 3.02 MAX802S/804S/806S VCC falling 2.88 2.925 3.00 VCC rising 2.88 2.935 3.02 MAX690R/704R/805R VCC falling 2.55 2.625 2.70 VCC rising 2.55 2.635 2.72 MAX802R/804R/806S VCC falling 2.59 2.625 2.70 VCC rising 2.59 2.635 2.72 Reset Timeout Period tWP VCC < 3.6V 140 200 280 ms PFO, RESET Output Voltage VOH ISOURCE = 50µA VCC- 0.3 VCC- 0.05 V PFO, RESET Output Short to GND Current (Note 4) IOS VCC = 3.3V, VOH = 0V 180 500 µV PFO, RESET, RESET Output Voltage VOL ISINK = 1.2mA; MAX690_/704_/802_/806_, VCC = VRST min; MAX804_/805_, VCC = VRST max 0.06 0.3 V PFO, RESET Output Voltage VOL VBATT = 0V, VCC = 1.0V, ISINK = 40µA, MAX690_C, MAX704_C, MAX80_ _C 0.13 0.3 V VBATT = 0V, VCC = 1.2V, ISINK = 200µA, MAX690_E/M, MAX704_E/M, MAX80_ _E/M 0.17 0.3 RESET Output Leakage Current (Note 9) VBATT = 0V, VCC = VRST min; VRESET = 0V, VCC MAX804_C, MAX805_C -1 +1 µA MAX804_E/M, MAX805_E/M -10 +10 MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 3 Electrical Characteristics (continued)

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(VCC = 3.17V to 5.5V for the MAX690T/MAX704T/MAX80_T, VCC = 3.02V to 5.5V for the MAX690S/MAX704S/MAX80_S, VCC = 2.72V to 5.5V for the MAX690R/MAX704R/MAX80_R; VBATT = 3.6V; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.) Note 1: VCC supply current, logic input leakage, watchdog functionality (MAX690_/802_/805_/804_), MR functionality (MAX704_/806_), PFI functionality, state of RESET (MAX690_/704_/802_/806_), and RESET (MAX804_/805_) tested at VBATT = 3.6V, and VCC = 5.5V. The state of RESET or RESET and PFO is tested at VCC = VCC min. Note 2: Tested at VBATT = 3.6V, VCC = 3.5V and 0V. The battery current will rise to 10µA over a narrow transition window around VCC = 1.9V. Note 3: Leakage current into the battery is tested under the worst-case conditions at VCC = 5.5V, VBATT = 1.8V and at VCC = 1.5V, VBATT= 1.0V. Note 4: Guaranteed by design. Note 5: When VSW > VCC > VBATT, VOUT remains connected to VCC until VCC drops below VBATT. The VCC-to-VBATT compara- tor has a small 25mV typical hysteresis to prevent oscillation. For VCC < 1.75V (typ), VOUT switches to VBATT regardless of the voltage on VBATT. Note 6: When VBATT > VCC > VSW, VOUT remains connected to VCC until VCC drops below the battery switch threshold (VSW). Note 7: VOUT switches from VBATT to VCC when VCC rises above the reset threshold, independent of VBATT. Switchover back to VCC occurs at the exact voltage that causes RESET to go high (on the MAX804_/805_, RESET goes low); however switchover occurs 200ms prior to reset. Note 8: The reset threshold tolerance is wider for VCC rising than for VCC falling to accommodate the 10mV typical hysteresis, which prevents internal oscillation. Note 9: The leakage current into or out of the RESET pin is tested with RESET asserted (RESET output high impedance). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PFI Input Threshold VPFT VCC < 3.6V VPFI falling MAX802_C/E, MAX804_C/E, MAX806_C/E 1.212 1.237 1.262 V MAX690_/MAX704_/MAX805_ 1.187 1.237 1.287 PFI Input Current MAX690_C/E, MAX704_C/E, MAX80_ _C/E -25 2 25 nA MAX690_M, MAX704_M, MAX80_ _M -500 2 500 PFI Hysteresis, PFI Rising VPFH VCC < 3.6V MAX690_C/E, MAX704_C/E, MAX80_ _C/E 10 20 mV MAX690_M, MAX704_M, MAX80_ _M 10 25 PFI Input Current MAX690_C/E, MAX704_C/E, MAX80_ _C/E -25 2 25 nA MAX690_M, MAX704_M, MAX80_ _M -500 2 500 MR Input Threshold VIH MAX704_/MAX806_ only 0.7 x VCC V VIL 0.3 x VCC MR Pulse Width tMR MAX704_/MAX806_ only 100 20 ns MR to Reset Delay tMD MAX704_/MAX806_ only 60 500 ns MR Pull-Up Current MAX704_/MAX806_ only, MR = 0V, VCC = 3V 20 60 350 µA WDI Input Threshold VIH MAX690_/MAX802_/MAX804_/MAX805_ only 0.7 x VCC V VIL 0.3 x VCC WDI Input Current 0V< VCC < 5.5V MAX690_C/E, MAX802_C/E, MAX804_C/E, MAX805_C/E -1 +0.01 +1 µA MAX690_M, MAX802_M, MAX804_M, MAX805_M -10 +0.01 +10 Watchdog Timeout Period tWD VCC < 3.6V MAX690/MAX802/MAX804/ MAX805 only 1.12 1.60 2.24 s WDI Pulse Width MAX690_/MAX802_/MAX804_/MAX805_ only 100 20 ns MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 4 Electrical Characteristics (continued)

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(TA = +25°C, unless otherwise noted.) 180 20 –60 –20 60 140 VBATT-TO-VOUT ON-RESISTANCE vs. TEMPERATURE 60 MA X6 90 to c0 2 TEMPERATURE (°C) VB AT T- TO -V OU T O N- RE SI ST AN CE (Ω ) 20 100–40 0 8040 120 140 100 VCC = 0V VBATT = 3.3V VBATT = 3V VBATT = 2V VBATT = 5V 50 25 –60 –20 60 140 SUPPLY CURRENT vs. TEMPERATURE 30 45 MA X6 90 -8 06 T OC 03 TEMPERATURE (°C) SU PP LY C UR RE NT (µ A) 20 100–40 0 8040 120 40 35 VCC = 5V VCC = 3.3V VCC = 2.5V VBATT = 3V PFI = GND MR/WDI FLOATING 10,000 0.1 –60 –20 60 140 BATTERY SUPPLY CURRENT vs. TEMPERATURE 1 1000 MA X6 90 to c0 4 TEMPERATURE (°C) BA TT ER Y SU PP LY C UR RE NT (n A) 20 100–40 0 8040 120 100 10 VBATT = 3V VBATT = 5V VBATT = 2V VCC = 0V PFI = GND 216 196 –60 –20 60 140 RESET TIMEOUT PERIOD vs. TEMPERATURE 200 212 MA X6 90 to c0 5 TEMPERATURE (°C) RE SE T TI ME OU T PE RI OD (m s) 20 100–40 0 8040 120 208 204 VCC = 5V VCC = 3.3V VBATT = 3.0V 30 10 –60 –20 60 140 RESET-COMPARATOR PROPAGATION DELAY vs. TEMPERATURE 14 26 MA X6 90 to c0 6 TEMPERATURE (°C) PR OP AG AT IO N DE LA Y (µ s) 20 100–40 0 8040 120 22 18 VBATT = 3.0V 100mV OVERDRIVE 1.240 1.230 –60 –20 60 140 PFI THRESHOLD vs. TEMPERATURE 1.232 1.238 MA X6 90 to c0 7 TEMPERATURE (°C) PF I T HR ES HO LD (V ) 20 100–40 0 8040 120 1.236 1.234 VCC = 5V VCC = 3.3V VCC = 2.5V VBATT = 3.0V 5 0 –60 –20 60 140 VCC-TO-VOUT ON-RESISTANCE vs. TEMPERATURE 1 4 MA X6 90 to c0 1 TEMPERATURE (°C) V C C- TO -V OU T O N- RE SI ST AN CE (Ω ) 20 100–40 0 8040 120 3 2 VCC = 5V VCC = 3.3V VCC = 2.5V VBATT = 3.0V 1.004 0.994 –60 –20 60 140 NORMALIZED RESET THRESHOLD vs. TEMPERATURE 0.996 1.002 MA X6 90 to c0 8 TEMPERATURE (°C) NO RM AL IZ ED R ES ET T HR ES HO LD (V ) 20 100–40 0 8040 120 1.000 0.998 VBATT = 3.0V 3.0V/3.3V Microprocessor Supervisory Circuits Maxim Integrated │ 5www.maximintegrated.com MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R Typical Operating Characteristics

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Detailed Description Reset Output A microprocessor’s (µP’s) reset input starts the µP in a known state. These µP supervisory circuits assert reset to prevent code execution errors during power-up, power- down, brownout conditions, or a watchdog timeout. RESET is guaranteed to be a logic low for 0V < VCC < VRST, provided that VBATT is greater than 1V. Without a backup battery, RESET is guaranteed valid for VCC > 1V. Once VCC exceeds the reset threshold, an internal timer keeps RESET low for the reset timeout period; after this interval, RESET goes high (Figure 2). If a brownout condition occurs (VCC dips below the reset threshold), RESET goes low. Each time RESET is assert- ed, it stays low for the reset timeout period. Any time VCC goes below the reset threshold, the internal timer restarts. The watchdog timer can also initiate a reset. See the Watchdog Input section. The MAX804_/MAX805_ active-high RESET output is open drain, and the inverse of the MAX690_/MAX704_/ MAX802_/MAX806_ RESET output. Reset Threshold The MAX690T/MAX704T/MAX805T are intended for 3.3V systems with a ±5% power-supply tolerance and a 10% system tolerance. Except for watchdog faults, reset will not assert as long as the power supply remains above 3.15V (3.3V - 5%). Reset is guaranteed to assert before the power supply falls below 3.0V. The MAX690S/MAX704S/MAX805S are designed for 3.3V ±10% power supplies. Except for watchdog faults, they are guaranteed not to assert reset as long as the supply remains above 3.0V (3.3V - 10%). Reset is guaranteed to assert before the power supply falls below 2.85V (VCC - 14%). The MAX690R/MAX704R/MAX805R are optimized for monitoring 3.0V ±10% power supplies. Reset will not occur until VCC falls below 2.7V (3.0V - 10%), but is guaranteed to occur before the supply falls below 2.59V (3.0V - 14%). The MAX802R/S/T, MAX804R/S/T, and MAX806R/S/T are respectively similar to the MAX690R/S/T, MAX805R/S/T, and MAX704R/S/T, but with tightened reset and power-fail threshold tolerances. PIN NAME FUNCTIONMAX690 MAX802 MAX704 MAX806 MAX804 MAX805 1 1 1 VOUT Supply Output for CMOS RAM. When VCC is above the reset threshold, VOUT is connected to VCC through a p-channel MOSFET switch. When VCC falls below VSW and VBATT, VBATT connects to VOUT. Connect to VCC if no battery is used. 2 2 2 VCC Main Supply Input 3 3 3 GND Ground 4 4 4 PFI Power-Fail Input. When PFI is less than VPFT or when VCC falls below VSW, PFO goes low; otherwise, PFO remains high. Connect to ground if unused. 5 5 5 PFO Power-Fail Output. When PFI is less than VPFT, or VCC falls below VSW, PFO goes low;otherwise, PFO remains high. Leave open if unused. 6 — 6 WDI Watchdog Input. If WDI remains high or low for 1.6s, the internal watchdog timer runs out and reset is triggered. The internal watchdog timer clears while reset is asserted or when WDI sees a rising or falling edge. The watchdog function cannot be disabled. — 6 — MR Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long as MR is low and for 200ms after MR returns high. This active-low input has an internal 70µA pullup current. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. 7 7 — RESET Active-Low Reset Output. Pulses low for 200ms when triggered, and stays low whenever VCC is below the reset threshold or when MR is a logic low. It remains low for 200ms after either VCC rises above the reset threshold, the watchdog triggers a reset, or MR goes from low to high. — — 7 RESET Active-High, Open-Drain Reset Output is the inverse of RESET. 8 8 8 VBATT Backup-Battery Input. When VCC falls below VSW and VBATT, VOUT switches from VCC to VBATT. When VCC rises above the reset threshold, VOUT reconnects to VCC. VBATT may exceed VCC. Connect to VCC if no battery is used. MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 6 Pin Description

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Watchdog Input (MAX690_/802_/804_/805_) The watchdog circuit monitors the µP’s activity. If the µP does not toggle the watchdog input (WDI) within 1.6sec, a reset pulse is triggered. The internal 1.6sec timer is cleared by either a reset pulse or by a transition (low-to- high or high-to-low) at WDI. If WDI is tied high or low, a RESET pulse is triggered every 1.8sec (tWD plus tRS). As long as reset is asserted, the timer remains cleared and does not count. As soon as reset is deasserted, the timer starts counting. Unlike the 5V MAX690 family, the watchdog function cannot be disabled. Power-Fail Comparator The PFI input is compared to an internal reference. If PFI is less than VPFT, PFO goes low. The power-fail comparator is intended for use as an undervoltage detector to signal a failing power supply. However, the comparator does not need to be dedicated to this function because it is completely separate from the rest of the circuitry. The power-fail comparator turns off and PFO goes low when VCC falls below VSW on power-down. The power- fail comparator turns on as VCC crosses VSW on power- up. If the comparator is not used, connect PFI to ground and leave PFO unconnected. PFO can be connected to MR on the MAX704_/MAX806_ so that a low voltage on PFI will generate a reset (Figure 5b). Figure 1. Block Diagram Figure 2. Timing Diagram VBATT RESET (RESET)WDI VCC MR BATTERY SWITCHOVER COMPARATOR RESET COMPARATOR RESET GENERATOR WATCHDOG TIMER BATTERY SWITCHOVER CIRCUITRY MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R PFO VOUT PFI VPFT 1.237V 1.237V ** ** POWER-FAIL COMPARATOR * MAX690T/S/R, MAX802T/S/R, MAX804T/S/R, MAX805T/S/R ONLY ** MAX704T/S/R, MAX806T/S/R ONLY ( ) MAX804T/S/R, MAX805T/S/R ONLY VBATT = 3.6V 3.0V OR 3.3V VSW tWP RESET PFO VCC ( ) MAX804T/S/R, MAX805T/S/R ONLY, RESET EXTERNALLY PULLED UP TO VCC VOUT VSW (RESET) 3.0V OR 3.3V 3.0V OR 3.3V 0V VRST VBATT = PFI = 3.6V IOUT = 0mA MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 7

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Backup-Battery Switchover In the event of a brownout or power failure, it may be necessary to preserve the contents of RAM. With a back- up battery installed at VBATT, the devices automatically switch RAM to backup power when VCC falls. This family of µP supervisors (designed for 3.3V and 3V systems) doesn’t always connect VBATT to VOUT when VBATT is greater than VCC. VBATT connects to VOUT (through a 140Ω switch) when VCC is below VSW and VBATT is greater than VCC, or when VCC falls below 1.75V (typ) regardless of the VBATT voltage. This is done to allow the backup battery (e.g., a 3.6V lithium cell) to have a higher voltage than VCC. Switchover at VSW (2.40V) ensures that battery-backup mode is entered before VOUT gets too close to the 2.0V minimum required to reliably retain data in CMOS RAM. Switchover at higher VCC voltages would decrease backup-battery life. When VCC recovers, switchover is deferred until VCC rises above the reset threshold (VRST) to ensure a stable supply. VOUT is connected to VCC through a 3Ω PMOS power switch. Manual Reset A logic low on MR asserts reset. Reset remains asserted while MR is low, and for tWP (200ms) after MR returns high. This input has an internal 70µA pullup current, so it can be left open if it is not used. MR can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual-reset function; external debounce circuitry is not required. Applications Information These µP supervisory circuits are not short-circuit protected. Shorting VOUT to ground—excluding power-up transients such as charging a decoupling capacitor— destroys the device. Decouple both VCC and VBATT pins to ground by placing 0.1µF capacitors as close as possible to the device. Using a SuperCap as a Backup Power Source SuperCaps are capacitors with extremely high capaci- tance values (e.g., order of 0.47F) for their size. Figure 3 shows two ways to use a SuperCap as a backup power source. The SuperCap may be connected through a diode to the 3V input (Figure 3a) or, if a 5V supply is also available, the SuperCap may be charged up to the 5V supply (Figure 3b) allowing a longer backup period. Since VBATT can exceed VCC while VCC is a bove the reset threshold, there are no special precautions when using these µP supervisors with a SuperCap. Operation without a Backup Power Source These µP supervisors were designed for battery-backed applications. If a backup battery is not used, connect both VBATT and VOUT to VCC, or use a different µP supervisor such as the MAX706T/S/R or MAX708T/S/R. Replacing the Backup Battery The backup power source can be removed while VCC remains valid, if VBATT is decoupled with a 0.1µF capacitor to ground, without danger of triggering RESET/ RESET. As long as VCC stays above VSW, battery-back- up mode cannot be entered. Adding Hysteresis to the Power-Fail Comparator The power-fail comparator has a typical input hysteresis of 10mV. This is sufficient for most applications where a power-supply line is being monitored through an external voltage divider (see the Monitoring an Additional Power Supply section). If additional noise margin is desired, connect a resistor between PFO and PFI as shown in Figure 4a. Select the ratio of R1 and R2 such that PFI sees 1.237V (VPFT) when VIN falls to its trip point (VTRIP). R3 adds the hysteresis and will typically be more than 10 times the value of R1 or R2. The hysteresis window extends both above (VH) and below (VL) the original trip point (VTRIP). Connecting an ordinary signal diode in series with R3, as shown in Figure 4b, causes the lower trip point (VL) to Table 1. Input and Output Status in Battery-Backup Mode PIN NAME STATUS VOUT Connected to VBATT through an internal 140Ω switch VCC Disconnected from VOUT PFI The power-fail comparator is disabled whenVCC < VSW PFO Logic low when VCC < VSW or PFI < VPFT WDI The watchdog timer is disabled MR Disabled RESET Low logic RESET High impedance VBATT Connected to VOUT MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 8

Page 10

coincide with the trip point without hysteresis (VTRIP), so the entire hysteresis window occurs above VTRIP. This method provides additional noise margin without com- promising the accuracy of the power-fail threshold when the monitored voltage is falling. It is useful for accurately detecting when a voltage falls past a threshold. The current through R1 and R2 should be at least 1µA to ensure that the 25nA (max over extended temperature range) PFI input current does not shift the trip point. R3 should be larger than 10kΩ so it does not load down the PFO pin. Capacitor C1 adds additional noise rejection. Monitoring an Additional Power Supply These µP supervisors can monitor either positive or negative supplies using a resistor voltage divider to PFI. PFO can be used to generate an interrupt to the µP (Figure 5). Connecting PFO to MR on the MAX704 and MAX806 causes reset to assert when the monitored supply goes out of tolerance. Reset remains asserted as long as PFO holds MR low, and for 200ms after PFO goes high. Interfacing to µPs with Bidirectional Reset Pins µPs with bidirectional reset pins, such as the Motorola 68HC11 series, can contend with the MAX690_/MAX704_/ MAX802_/MAX806_ RESET output. If, for example, the RESET output is driven high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7kΩ resistor between the RESET output and the µP reset I/O, as in Figure 6. Buffer the RESET output to other system components. Negative-Going VCC Transients While issuing resets to the µP during power-up, power- down, and brownout conditions, these supervisors are relatively immune to short-duration negative-going VCC transients (glitches). It is usually undesirable to reset the µP when VCC experiences only small glitches. Figure 7 shows maximum transient duration vs. reset- comparator overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting at 3.3V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreas- es. Typically, a VCC transient that goes 100mV below the reset threshold and lasts for 40µs or less will not cause a reset pulse to be issued. A 100nF bypass capacitor mounted close to the VCC pin provides additional transient immunity. Figure 3. Using a SuperCap as a Backup Power Source MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT TO STATIC RAM VBATT VCC GND 1N4148 RESET (RESET) ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY TO µP 0.47F 3.0V OR 3.3V MAX690T/S/R MAX704T/S/R MAX802T/S/R MAX804T/S/R MAX805T/S/R MAX806T/S/R VOUT TO STATIC RAM VBATT VCC GND 1N4148 RESET (RESET) ( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY TO µP 0.47F 3.0V OR 3.3V +5V ba MAX690T/S/R, MAX704T/S/R, MAX802T/S/R, MAX804−MAX806T/S/R 3.0V/3.3V Microprocessor Supervisory Circuits www.maximintegrated.com Maxim Integrated │ 9

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Whit*****Stark

November 20, 2020

They worked great. Not much to say - as far as I can tell they adhere to the specs, and did the job I needed them to. Good transistors for higher current situations.

Ada*****ora

November 6, 2020

I am always amazed at the cost of automotive or marine costs when a rectifier is needed while these will do the exact same thing if you are a bit technically minded to wire them up.

Zande*****idson

November 5, 2020

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November 4, 2020

Most of the reviews for this product were positive so I took a chance.

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