MC34844AEPR2

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Document Number: MC34844 Rev. 10.0, 8/2014 Freescale Semiconductor Technical Data10 Channel LED Backlight Driver with Integrated Power Supply The 34844 is a SMARTMOS high efficiency, LED driver for use in backlighting LCD displays from 10" to 20"+. Operating from supplies of 7.0 to 28 V, the MC34844 is capable of driving up to 160 LEDs in 10 parallel strings. Current in the 10 strings is matched to within 2%, and can be programmed via the I2C/SM Bus interface. The 34844 also includes a Pulse Width Monitor (PWM) generator for LED dimming. The LEDs can be dimmed to one of 256 levels, programmed through the I2C/SM Bus interface. Up to 65,000:1 (256:1 PWM, 256:1 Current DAC) dimming ratio. The integrated boost converter generates the minimum output voltage required to keep all LEDs illuminated with the selected current, providing the highest efficiency possible. The 34844 has an integrated boost self-clock at a default frequency of 600 kHz, but may be programmed via I2C to 150/300/600/1200 kHz. The PWM frequency can be set from 100 Hz to 25 kHz, or can be synchronized to an external input. If not synchronized to another source, the internal PWM rate outputs on the CK pin. This enables multiple devices to be synchronized together. The 34844 has a default boost frequency of 320 kHz, but may be programmed via I2C to 160/320/650/1300 kHz. The PWM frequency can be set from 110 Hz to 27 kHz, or can be synchronized to an external input. If not synchronized to another source, the internal PWM rate outputs on the CK pin. This enables multiple devices to be synchronized together. The 34844 also supports optical/temperature closed loop operation and features LED overtemperature protection, LED short protection, and LED open circuit protection. The IC includes overvoltage protection, overcurrent protection, and undervoltage lockout. Features • Input voltage of 7.0 to 28 V • 2.5 A integrated boost FET • Up to 80 mA on the 34844 LED current per channel • 90% efficiency (DC:DC) • I2C/SM Bus interface • 10 channel current mirror with ±2.0% current matching • Boost output voltage up to 60V, with Dynamic Headroom Control (DHC) • PWM frequency programmable or synchronizable from 110 to 27,000 Hz • 32-Ld 5x5x1.0 mm TQFN Package LED DRIVER 34844 EP SUFFIX (PB-FREE) 98ASA10800D 32-PIN QFN-EP Applications • Monitors and HDTV - up to 42 inch • Personal Computer Notebooks • GPS Screens • Small screen Televisions © Freescale Semiconductor, Inc., 2009-2014. All rights reserved.

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Figure 1. MC34844 Simplified Application Diagram (SM Bus Mode) Figure 2. MC34844 Simplified Application Diagram (Manual Mode) 7.0 to 28 V FAIL PGNDA 34844 SWA SWB VOUT PGNDB I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 VCC GND SCK SDA A0/SEN ISET PIN NIN VIN VDC1 VDC2 VDC3 COMP SLOPE CK EN PWM Control Unit M/~S VDC1 VDC1 ~~ ~~ ~~ ~~ ~~ ~~ ~~ ~~ ~~ ~~ VDC1 7.0 to 28V FAIL PGNDA 34844 SWA SWB VOUT PGNDB I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 VCC GND SCK SDA A0/SEN ISET PIN NIN VIN COMP SLOPE CK EN PWMControl Unit M/~S VDC1 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ VDC1 VOUT VOUT PWM PWM VDC1 VDC2 VDC3Analog Integrated Circuit Device Data 2 Freescale Semiconductor 34844

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ORDERABLE PARTSORDERABLE PARTS This section describes the part numbers available to be purchased along with their differences. Valid orderable part numbers are provided on the web. To determine the orderable part numbers for this device, go to http://www.freescale.com and perform a part number search for the following device numbers. Table 1. Orderable Part Variations Part Number Notes Temperature (TA) Package MC34844AEP (1) -40 to 105 °C 32 QFN-EP Notes: 1. To order parts in Tape & Reel, add the R2 suffix to the part number.Analog Integrated Circuit Device Data Freescale Semiconductor 3 34844

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INTERNAL BLOCK DIAGRAMINTERNAL BLOCK DIAGRAM Figure 3. 34844 Simplified Internal Block Diagram VIN VDC1 COMP EN CK PWM SCK SDA ISET PIN NIN SWA SWB PGNDA FAIL I0 I1 I2 I3 I4 I5 I6 I7 I8 I9 TEMP/OPTO LOOP CONTROL CURRENT DAC OCP/OTP/UVLO PWM GENERATOR 10 CHANNEL OVP BOOST CLOCK/PLL CONTROLLER 80 mA CURRENT MIRROR V SENSE GND A0/SEN PGNDB LDO VDC3 VDC2 SLOPE I2C INTERFACE VOUT M/~SAnalog Integrated Circuit Device Data 4 Freescale Semiconductor 34844

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PIN CONNECTIONSPIN CONNECTIONS Figure 4. 34844 Pin Connections A functional description of each pin can be found in the Functional Pin Description section beginning on page 13. Table 2. 34844 Pin Definitions Pin Number Pin Name Pin Function Formal Name Definition 1 VIN Power Input voltage Input supply 2 PGNDB Power Power Ground Power ground 3 SWB Input Switch node B Boost switch connection B 4 SWA Input Switch node A Boost switch connection A 5 PGNDA Power Power Ground Power ground 6 A0/SEN Input Device Select Address select, device select pin or OVP HW control 7 EN Input Enable Enable pin (active high, internal pull-up) 8 - 17 I0-I9 Input LED Channel LED string connections 18 FAIL Open Drain Fault detection Fault detected pin (open drain): No Failure = low-impedance Failure = high-impedance 19 ISET Passive Current set LED current setting resistor 20 PIN Input Positive current scale Positive input analog current control 21 NIN Input Negative current scale Negative input analog current control 22 SLOPE Passive Boost Slope Boost slope compensation setting resistor 23 VDC3 Output Internal Regulator 3 Decoupling capacitor for internal phase locked loop power 24 CK Input/Output Clock signal Clock synchronization pin (input for M/~S = low - internal pull-up, output for  M/~S = high) 25 PWM Input External PWM External PWM input (internal pull-down) VIN PGNDB SWB SWA PGNDA A0/SEN EN IO CK VDC3 SLOPE NIN PIN ISET FAIL I9 V O U T V D C 2 M /~ S C O M P V D C 1 S C K S D A P W M I1 I2 I3 I4 I5 I6 I7 I8 2532 31 30 29 28 27 26 24 17 18 19 20 21 22 23 1 8 7 6 5 4 3 2 169 10 11 12 13 14 15 QFN - EP 5MM X 5MM 32 LEAD EP GND EP = Exposed Pad TRANSPARENT TOP VIEW Transparent Top ViewAnalog Integrated Circuit Device Data Freescale Semiconductor 5 34844

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PIN CONNECTIONS26 SDA Bidirectional I2C data I 2C data line 27 SCK Bidirectional I2C clock I 2C clock line 28 VDC1 Output Internal Regulator 1 Decoupling capacitor for internal logic rail 29 COMP Passive Compensation pin Boost converter type compensation pin 30 M/~S Input Master/Slave selector Selects Master mode (1) or Slave mode (0) 31 VDC2 Output Internal Regulator 2 Decoupling capacitor for internal regulator 32 VOUT Input Voltage Output Boost output voltage sense pin EP GND - Ground Ground reference for all internal circuits other than boost FET Table 2. 34844 Pin Definitions (continued) Pin Number Pin Name Pin Function Formal Name DefinitionAnalog Integrated Circuit Device Data 6 Freescale Semiconductor 34844

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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGSELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 3. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Symbol Ratings Value Unit Notes ELECTRICAL RATINGS VMAX Maximum Pin Voltages A0/SEN I0, I1, I2, I3, I4, I5, I6, I7, I8, I9 EN, VIN SWA, SWB, VOUT FAIL, PIN, NIN, ISET, M/~S, CK, PWM 7.0 45 30 65 6.0 V (5) IMAX Maximum LED Current 85 mA VESD ESD Voltage Human Body Model (HBM) Machine Model (MM) +2000 +200 V (2) THERMAL RATINGS TA Ambient Temperature Range -40 to 105 °C TJA Junction to Ambient Temperature 32 °C/W (3) TJC Junction to Case Temperature 3.5 °C/W (3) TJ Maximum junction temperature 150 °C TSTO Storage temperature range -40 to 150 °C TPPRT Peak Package Reflow Temperature During Reflow 260 °C (4) Power Dissipation TA = 25 °C TA = 70 °C TA = 85 °C TA = 105 °C 3.9 2.5 2.0 1.4 W Notes 2. ESD testing is performed in accordance with the Human Body Model (HBM) (AEC-Q100-2), and the Machine Model (MM) (AEC-Q100-003),  RZAP = 0  3. Per JEDEC51 Standard for Multilayer PCB 4. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. 5. 45 V is the Maximum allowable voltage on all LED channels in off-state. Analog Integrated Circuit Device Data Freescale Semiconductor 7 34844

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ELECTRICAL CHARACTERISTICS STATIC AND DYNAMIC ELECTRICAL CHARACTERISTICSSTATIC AND DYNAMIC ELECTRICAL CHARACTERISTICS Table 4. Static and Dynamic Electrical Characteristics Characteristics noted under conditions VIN = 12 V, VOUT = 42 V, PWM = VDC1, M/~S = VDC1, PIN & NIN = VDC1, -40C  TA  105C, PGND = 0 V, unless otherwise noted. Symbol Characteristic Min Typ Max Unit Notes SUPPLY VIN Supply Voltage 7.0 12 28 V (8) ISHUTDOWN Supply Current when Shutdown Mode Manual: PWM = Low, EN = Low, SCK & SDA=Low SM Bus: EN bit = 0, SCK & SDA=Low, EN pin= Low I2C: SETI2Cbit=1, CLRI2C=0, EN bit= 0, EN pin = Low - - 2.0 17 - - A ISLEEP Supply Current when Sleep Mode SM-Bus: EN = low, SCK & SDA = Active, SETI2C bit = 0, EN bit = 0 I2C: EN = High, SETI2C bit = 1, CLRI2C bit = 0, EN bit = 0 - 4.0 - mA IOPERATIONAL Supply Current when Operational Mode Manual: EN = High, SCK & SDA =Low, PWM = Low,  SM-Bus: EN = Low, SCK & SDA = Active, EN bit = 1,  PWM = Low I2C: EN = High, SETI2C bit = 1, CLRI2C bit = 0,  EN bit = 1, PWM = Low - 13.0 - mA UVLO Undervoltage Lockout (VIN Rising) 5.4 6.0 6.4 V UVLOHYST Undervoltage Hysteresis (VIN Falling) - 300 - mV VDC1 VDC1 Voltage CVDC1 = 2.2 F 2.3 2.5 2.75 V (6) VDC2 VDC2 Voltage CVDC2 = 2.2 F 5.5 6.0 6.5 V (6) VDC3 VDC3 Voltage CVDC3 = 2.2 F 2.3 2.5 2.75 V (6) BOOST VOUT1 VOUT2 Output Voltage Range VIN = 7.0 V VIN = 28 V 8.0 32 - - 28 60 V (7) (8) IFET Boost Switch Current Limit 2.3 2.5 2.7 A tBOOST_TIME Boost Switch Current Limit Timeout - 10 - ms RDS(ON) RDS(ON) of Internal FET (IDRAIN= 1.0 A)( - 250 500 m IBOOST_LEAK Boost Switch Off-state Leakage Current VSWA,SWB = 65 V - - 10 mA VOUTLEAK Feedback pin Off-state Leakage Current (VOUT = 65 V ) - 500 700 mA EFFBOOST Peak Boost Efficiency - 90 - % (8) IOUT/VIN Line Regulation - VIN = 7.0 to 28 V -0.2 - 0.2 %/V (8) IOUT/VLED Load Regulation - VLED = 8.0 to 65 V (all Channels) -0.2 - 0.2 %/V (8) Notes 6. This output is for internal use only and not to be used for other purposes. A 1.0 kresistor between the VDC3 and VDC1 pin is recommended for <-20 °C operation. 7. Minimum and Maximum output voltages are dependent on Min/Max duty cycle and current limit condition. 8. Guaranteed by designAnalog Integrated Circuit Device Data 8 Freescale Semiconductor 34844

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ELECTRICAL CHARACTERISTICS STATIC AND DYNAMIC ELECTRICAL CHARACTERISTICSBOOST (CONTINUED) VSLOPE Slope compensation voltage ramp - RSLOPE = 68 k - 0.49 - V/s ACSA Current Sense Amplifier Gain - 9.0 - RSENSE Current Sense Resistor - 22 - m GM OTA Transconductance - 200 - S ISS Transconductance Sink and Source Current Capability - 100 - A FAIL PIN IFAIL_LEAK Off-state Leakage Current - VFAIL = 5.5 V - - 50 A VOL On-state Voltage Drop - ISINK = 4.0 mA - - 0.4 V LED CHANNELS ISINK Sink Current ICHx Register = 255, PIN&NIN = Disabled, TA=25 °C RISET=3.48 k0.1% 78.4 80 81.6 mA VMIN Regulated minimum voltage across drivers, Pulse Width > 400 ns 625 700 775 mV IMATCH Current Matching Accuracy -2.0 - 2.0 % VSET ISET Pin Voltage RISET=3.48 k0.1% 2.007 2.048 2.069 V ILEDRES LED Current Amplitude Resolution 1.0 mA < ILED < 80 mA - 1.5 - % ICH_LEAK Off-state Leakage Current, All channels - (VCH = 45 V) - - 10 A PIN INPUT VPIN_DIS Voltage to Disable PIN mode 2.2 - - V IPIN PIN Bias Current PIN = VSET -2.0 - 2.0 A IDIM_PIN Analog Dimming Current, ICHx Register = 255, RISET=3.48 k 0.1% PIN = VSET/2 PIN = VSET 36 76 40 80 44 84 mA NIN INPUT VNIN_DIS Voltage to Disable NIN mode 2.2 - - V ININ NIN Bias Current NIN = VSET -2.0 - 2.0 A IDIM_NIN Analog Dimming Current ICHx Register = 255, RISET=3.48 k 0.1% NIN = VSET/2 NIN = 0 V 36 76 40 80 44 84 mA Table 4. Static and Dynamic Electrical Characteristics (continued) Characteristics noted under conditions VIN = 12 V, VOUT = 42 V, PWM = VDC1, M/~S = VDC1, PIN & NIN = VDC1, -40C  TA  105C, PGND = 0 V, unless otherwise noted. Symbol Characteristic Min Typ Max Unit NotesAnalog Integrated Circuit Device Data Freescale Semiconductor 9 34844