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MC68HC908QT4CP

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MC68HC908QT4CP

For Reference Only

Part Number MC68HC908QT4CP
Manufacturer NXP
Description IC MCU 8BIT 4KB FLASH 8DIP
Datasheet MC68HC908QT4CP Datasheet
Package 8-DIP (0.300", 7.62mm)
In Stock 1,054 piece(s)
Unit Price Request a Quote
Lead Time Can Ship Immediately
Estimated Delivery Time Sep 26 - Oct 1 (Choose Expedited Shipping)
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Part Number # MC68HC908QT4CP (Embedded - Microcontrollers) is manufactured by NXP and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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MC68HC908QT4CP Specifications

ManufacturerNXP
CategoryIntegrated Circuits (ICs) - Embedded - Microcontrollers
Datasheet MC68HC908QT4CPDatasheet
Package8-DIP (0.300", 7.62mm)
SeriesHC08
Core ProcessorHC08
Core Size8-Bit
Speed8MHz
Connectivity-
PeripheralsLVD, POR, PWM
Number of I/O5
Program Memory Size4KB (4K x 8)
Program Memory TypeFLASH
EEPROM Size-
RAM Size128 x 8
Voltage - Supply (Vcc/Vdd)2.7 V ~ 5.5 V
Data ConvertersA/D 4x8b
Oscillator TypeInternal
Operating Temperature-40°C ~ 85°C (TA)
Mounting Type-
Package / Case8-DIP (0.300", 7.62mm)
Supplier Device Package8-PDIP

MC68HC908QT4CP Datasheet

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M68HC08 Microcontrollers freescale.com MC68HC908QY4 MC68HC908QT4 MC68HC908QY2 MC68HC908QT2 MC68HC908QY1 MC68HC908QT1 Data Sheet MC68HC908QY4/D Rev. 6 03/2010

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Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. This product incorporates SuperFlash® technology licensed from SST. © Freescale Semiconductor, Inc., 2005–2010. All rights reserved. MC68HC908QY4 MC68HC908QT4 MC68HC908QY2 MC68HC908QT2 MC68HC908QY1 MC68HC908QT1 Data Sheet To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information available, refer to: http://freescale.com/MC68HC908QY/QT Family Data Sheet, Rev. 6 Freescale Semiconductor 3

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Revision HistoryThe following revision history table summarizes changes contained in this document. For your convenience, the page number designators have been linked to the appropriate location. Revision History (Sheet 1 of 3) Date Revision Level Description Page Number(s) September, 2002 N/A Initial release N/A December, 2002 0.1 1.2 Features — Added 8-pin dual flat no lead (DFN) packages to features list. 19 Figure 1-2. MCU Pin Assignments — Figure updated to include DFN packages. 21 Figure 2-1. Memory Map — Clarified illegal address and unimplemented memory. 27 Figure 2-2. Control, Status, and Data Registers — Corrected bit definitions for Port A Data Register (PTA) and Data Direction Register A (DDRA). 27 Table 13-3. Interrupt Sources — Corrected vector addresses for keyboard interrupt and ADC conversion complete interrupt. 118 Chapter 13 System Integration Module (SIM) — Removed reference to break status register as it is duplicated in break module. 113 11.3.1 Internal Oscillator and 11.3.1.1 Internal Oscillator Trimming — Clarified oscillator trim option ordering information and what to expect with untrimmed device. 92 Figure 11-5. Oscillator Trim Register (OSCTRIM) — Bit 1 designation corrected. 98 Figure 15-13. Monitor Mode Circuit (Internal Clock, No High Voltage) — Diagram updated for clarity. 150 Figure 12-1. I/O Port Register Summary — Corrected bit definitions for PTA7, DDRA7, and DDRA6. 99 Figure 12-2. Port A Data Register (PTA) — Corrected bit definition for PTA7. 100 Figure 12-3. Data Direction Register A (DDRA) — Corrected bit definitions for DDRA7 and DDRA6. 101 Figure 12-6. Port B Data Register (PTB) — Corrected bit definition for PTB1 103 Chapter 9 Keyboard Interrupt Module (KBI) — Section reworked after deletion of auto wakeup for clarity. 83 Chapter 4 Auto Wakeup Module (AWU) — New section added for clarity. 49 Figure 10-1. LVI Module Block Diagram — Corrected LVI stop representation. 87 Chapter 16 Electrical Specifications — Extensive changes made to electrical specifications. 169 17.5 8-Pin Dual Flat No Lead (DFN) Package (Case #1452) — Added case outline drawing for DFN package. 177 Chapter 17 Ordering Information and Mechanical Specifications — Added ordering information for DFN package. 185 January, 2003 0.2 4.2 Features — Corrected third bulleted item. 49MC68HC908QY/QT Family Data Sheet, Rev. 6 4 Freescale Semiconductor

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August, 2003 1.0 Reformatted to meet latest M68HC08 documentation standards N/A Figure 1-1. Block Diagram — Diagram redrawn to include keyboard interrupt module and TCLK pin designator. 20 Figure 1-2. MCU Pin Assignments — Added TCLK pin designator. 21 Table 1-2. Pin Functions — Added TCLK pin description. 22 Table 1-3. Function Priority in Shared Pins — Revised table for clarity and to add TCLK. 23 Figure 2-1. Memory Map — Corrected names for the IRQ status and control register (INTSCR) bits 3–0. 26 3.7.3 ADC Input Clock Register — Clarified bit description for the ADC clock prescaler bits. 47 4.3 Functional Description — Updated periodic wakeup request values. 51 Figure 6-1. COP Block Diagram — Reworked for clarity 59 Chapter 8 External Interrupt (IRQ) — Corrected bit names for MODE, IRQF, ACK, and IMASK 77–79 Chapter 14 Timer Interface Module (TIM) — Added TCLK function. 131–139 15.3 Monitor Module (MON) — Updated with additional data. 147 Chapter 16 Electrical Specifications — Updated with additional data. 169–173 October, 2003 2.0 Figure 2-2. Control, Status, and Data Registers — Deleted unimplemented areas from $FFB0–$FFBD and $FFC2–$FFCF as they are actually available. Also corrected $FFBF designation from unimplemented to reserved. 27 Figure 6-1. COP Block Diagram — Reworked for clarity 59 6.3.2 STOP Instruction — Added subsection 60 13.4.2 Active Resets from Internal Sources — Reworked notes for clarity. 111 Table 13-2. Reset Recovery Timing — Replaced previous table with new information. 112 Chapter 14 Timer Interface Module (TIM) — Updated with additional data. 131 Figure 15-3. Break I/O Register Summary — Corrected bit designators for the BRKAR register 143 15.3 Monitor Module (MON) — Clarified seventh bullet. 147 Table 17-1. MC Order Numbers — Corrected temperature and package designators. 175 January, 2004 3.0 Figure 2-2. Control, Status, and Data Registers — Corrected reset state for the FLASH Block Protect Register at address location $FFBE and the Internal Oscillator Trim Value at $FFC0. 32 Figure 2-5. FLASH Block Protect Register (FLBPR) — Restated reset state for clarity. 38 Revision History (Sheet 2 of 3) Date Revision Level Description Page Number(s)MC68HC908QY/QT Family Data Sheet, Rev. 6 Freescale Semiconductor 5

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Revision HistoryNovember, 2004 4.0 Reformatted to meet current documentation standards Throughout 6.3.1 BUSCLKX4 — Clarified description of BUSCLKX4 58 Chapter 7 Central Processor Unit (CPU) — In 7.7 Instruction Set Summary: Reworked definitions for STOP instruction Added WAIT instruction 70 71 13.8.1 SIM Reset Status Register — Clarified SRSR flag setting 117 14.9.1 TIM Status and Control Register — Added information to TSTOP note 127 16.8 5-V Oscillator Characteristics — Added values for deviation from trimmed inernal oscillator 155 16.12 3-V Oscillator Characteristics — Added values for deviation from trimmed inernal oscillator 158 July, 2005 5.0 Figure 5-2. Configuration Register 1 (CONFIG1) — Clarified bit definitions for COPRS. 54 Chapter 8 External Interrupt (IRQ) — Reworked for clarification. 73 11.3.4 RC Oscillator — Improved RC oscillator wording. 93 12.1 Introduction — Added note pertaining to non-bonded port pins. 97 17.3 Package Dimensions — Updated package information. 165 March, 2010 6.0 Clarify internal oscillator trim register information. 26, 27, 31, 34, 35, 38, 91, 96 Revision History (Sheet 3 of 3) Date Revision Level Description Page Number(s)MC68HC908QY/QT Family Data Sheet, Rev. 6 6 Freescale Semiconductor

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List of Chapters Chapter 1 General Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Chapter 2 Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Chapter 3 Analog-to-Digital Converter (ADC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41 Chapter 4 Auto Wakeup Module (AWU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49 Chapter 5 Configuration Register (CONFIG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 Chapter 6 Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Chapter 7 Central Processor Unit (CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61 Chapter 8 External Interrupt (IRQ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73 Chapter 9 Keyboard Interrupt Module (KBI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79 Chapter 10 Low-Voltage Inhibit (LVI). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85 Chapter 11 Oscillator Module (OSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .89 Chapter 12 Input/Output Ports (PORTS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 Chapter 13 System Integration Module (SIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103 Chapter 14 Timer Interface Module (TIM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .119 Chapter 15 Development Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .133 Chapter 16 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .149 Chapter 17 Ordering Information and Mechanical Specifications . . . . . . . . . . . . . . . . . .165MC68HC908QY/QT Family Data Sheet, Rev. 6 Freescale Semiconductor 7

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List of ChaptersMC68HC908QY/QT Family Data Sheet, Rev. 6 8 Freescale Semiconductor

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Table of Contents Chapter 1 General Description 1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1.2 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 1.3 MCU Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 1.4 Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 1.5 Pin Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 1.6 Pin Function Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Chapter 2 Memory 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.2 Unimplemented Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.3 Reserved Memory Locations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2.4 Input/Output (I/O) Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 2.5 Random-Access Memory (RAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2.6 FLASH Memory (FLASH) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2.6.1 FLASH Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 2.6.2 FLASH Page Erase Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 2.6.3 FLASH Mass Erase Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2.6.4 FLASH Program Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2.6.5 FLASH Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 2.6.6 FLASH Block Protect Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 2.6.7 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 2.6.8 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Chapter 3 Analog-to-Digital Converter (ADC) 3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.2 Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.3.1 ADC Port I/O Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 3.3.2 Voltage Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.3.3 Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.3.4 Continuous Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.3.5 Accuracy and Precision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.4 Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.5 Low-Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.5.1 Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 3.5.2 Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45MC68HC908QY/QT Family Data Sheet, Rev. 6 Freescale Semiconductor 9

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Andr*****anesan

August 16, 2020

Worked good to turn my AC welder into a DC welder.

Keith*****herty

August 13, 2020

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August 10, 2020

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Kill*****Frank

August 8, 2020

Everything perfect. Great seller.

Adel*****anford

August 4, 2020

What can I say, great value for the money. I only needed 2 but now I have some spares for future projects. They got the job done, nothing more I can say.

Ember*****lendez

July 20, 2020

Received the parts, and all parts are in tight packaging without any problems, professional seller.

Mek*****Brock

July 18, 2020

Components all tested within limits of specifications. Components came packaged in an easy to identify resealable bag and will work well for my projects.

Serg*****oswami

July 14, 2020

Went well this time Now have the IC and very pleased.

Case*****arwal

July 12, 2020

DELIVERY AND COMMUNICATION EXTRA SELLER TOP 5 STARS on my list

Patri*****hawla

July 6, 2020

Heisener.com is a good company. Pleasant transaction, communicative , thank you

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If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.

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