0
+86-755-83210559 ext. 811
TOP
Contact Us
SalesDept@heisener.com +86-755-83210559 ext. 811
Language Translation
  • • English
  • • Español
  • • Deutsch
  • • Français
  • • Italiano
  • • Nederlands
  • • Português
  • • русский язык
  • • 日本語
  • • 한국어
  • • 简体中文
  • • 繁體中文

* Please refer to the English Version as our Official Version.

Change Country

If your country is not listed, please select International as your region.

  • International
Americas
  • Argentina
  • Brasil
  • Canada
  • Chile
  • Colombia
  • Costa Rica
  • Dominican Republic
  • Ecuador
  • Guatemala
  • Honduras
  • Mexico
  • Peru
  • Puerto Rico
  • United States
  • Uruguay
  • Venezuela
Asia/Pacific
  • Australia
  • China
  • Hong Kong
  • Indonesia
  • Israel
  • India
  • Japan
  • Korea, Republic of
  • Malaysia
  • New Zealand
  • Philippines
  • Singapore
  • Thailand
  • Taiwan
  • Vietnam
Europe
  • Austria
  • Belgium
  • Bulgaria
  • Switzerland
  • Czech Republic
  • Germany
  • Denmark
  • Estonia
  • Spain
  • Finland
  • France
  • United Kingdom
  • Greece
  • Croatia
  • Hungary
  • Ireland
  • Italy
  • Netherlands
  • Norway
  • Poland
  • Portugal
  • Romania
  • Russian Federation
  • Sweden
  • Slovakia
  • Turkey

MPC885CZP66

hot MPC885CZP66

MPC885CZP66

For Reference Only

Part Number MPC885CZP66
Manufacturer NXP
Description IC MPU MPC8XX 66MHZ 357BGA
Datasheet MPC885CZP66 Datasheet
Package 357-BBGA
In Stock 4230 piece(s)
Unit Price $ 43.808 *
Please request a real-time quote with our sales team. The unit price would influenced by the quantity requested and the supply sources. Thank you!
Lead Time Can Ship Immediately
Estimated Delivery Time Dec 13 - Dec 18 (Choose Expedited Shipping)
Winter Hot Sale

* Free Shipping * Up to $100 Discount

Winter Hot Sale

Request for Quotation

MPC885CZP66

Quantity
  • We are offering MPC885CZP66 for competitive price in the global market, please send us a quota request for pricing. Thank you!
  • To process your RFQ, please add MPC885CZP66 with quantity into BOM. Heisener.com does NOT require any registration to request a quote of MPC885CZP66.
  • To learn about the specification of MPC885CZP66, please search the datasheet by clicking the link above. If you couldn't find the correct datasheet, please refer to the manufacturer's official datasheet.
Payment Methods
Delivery Services

Do you have any question about MPC885CZP66?

+86-755-83210559 ext. 811 SalesDept@heisener.com heisener007 2354944915 Send Message

Certified Quality

Heisener's commitment to quality has shaped our processes for sourcing, testing, shipping, and every step in between. This foundation underlies each component we sell.

ISO9001:2015, ICAS, IAF, UKAS

View the Certificates

MPC885CZP66 Specifications

ManufacturerNXP
CategoryIntegrated Circuits (ICs) - Embedded - Microprocessors
Datasheet MPC885CZP66 Datasheet
Package357-BBGA
SeriesMPC8xx
Core ProcessorMPC8xx
Number of Cores/Bus Width1 Core, 32-Bit
Speed66MHz
Co-Processors/DSPCommunications; CPM, Security; SEC
RAM ControllersDRAM
Graphics AccelerationNo
Ethernet10 Mbps (3), 10/100 Mbps (2)
USBUSB 2.0 (1)
Voltage - I/O3.3V
Operating Temperature-40°C ~ 100°C (TA)
Security FeaturesCryptography
Package / Case357-BBGA
Supplier Device Package357-PBGA (25x25)

MPC885CZP66 Datasheet

Page 1

Page 2

© 2010 Freescale Semiconductor, Inc. All rights reserved. Freescale Semiconductor Technical Data This hardware specification contains detailed information on power considerations, DC/AC electrical characteristics, and AC timing specifications for the MPC885/MPC880. The MPC885 is the superset device of the MPC885/MPC880 family. The CPU on the MPC885/MPC880 is a 32-bit core built on Power Architecture™ technology that incorporates memory management units (MMUs) and instruction and data caches. For functional characteristics of the MPC885/MPC880, refer to the MPC885 PowerQUICC Family Reference Manual. To locate published errata or updates for this document, refer to the MPC875/MPC870 product summary page on our website listed on the back cover of this document or, contact your local Freescale sales office. Contents 1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3. Maximum Tolerated Ratings . . . . . . . . . . . . . . . . . . . 9 4. Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . 10 5. Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6. DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 11 7. Thermal Calculation and Measurement . . . . . . . . . . 12 8. Power Supply and Power Sequencing . . . . . . . . . . . 15 9. Layout Practices . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 10. Bus Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 16 11. IEEE 1149.1 Electrical Specifications . . . . . . . . . . . 44 12. CPM Electrical Characteristics . . . . . . . . . . . . . . . . . 46 13. UTOPIA AC Electrical Specifications . . . . . . . . . . . 69 14. USB Electrical Characteristics . . . . . . . . . . . . . . . . . 71 15. FEC Electrical Characteristics . . . . . . . . . . . . . . . . . 71 16. Mechanical Data and Ordering Information . . . . . . . 75 17. Document Revision History . . . . . . . . . . . . . . . . . . . 85 MPC885/MPC880 PowerQUICC Hardware Specifications Document Number: MPC885EC Rev. 7, 07/2010

Page 3

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 2 Freescale Semiconductor Overview 1 Overview The MPC885/MPC880 is a versatile single-chip integrated microprocessor and peripheral combination that can be used in a variety of controller applications and communications and networking systems. The MPC885/MPC880 provides enhanced ATM functionality, an additional fast Ethernet controller, a USB, and an encryption block. Table 1 shows the functionality supported by MPC885/MPC880. 2 Features The MPC885/MPC880 is comprised of three modules that each use the 32-bit internal bus: a MPC8xx core, a system integration unit (SIU), and a communications processor module (CPM). The following list summarizes the key MPC885/MPC880 features: • Embedded MPC8xx core up to 133 MHz • Maximum frequency operation of the external bus is 80 MHz (in 1:1 mode) — The 133-MHz core frequency supports 2:1 mode only. — The 66-/80-MHz core frequencies support both the 1:1 and 2:1 modes. • Single-issue, 32-bit core (compatible with the Power Architecture definition) with thirty-two 32-bit general-purpose registers (GPRs) — The core performs branch prediction with conditional prefetch and without conditional execution. — 8-Kbyte data cache and 8-Kbyte instruction cache (see Table 1) – Instruction cache is two-way, set-associative with 256 sets in 2 blocks – Data cache is two-way, set-associative with 256 sets – Cache coherency for both instruction and data caches is maintained on 128-bit (4-word) cache blocks. – Caches are physically addressed, implement a least recently used (LRU) replacement algorithm, and are lockable on a cache block basis. — MMUs with 32-entry TLB, fully associative instruction and data TLBs — MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address spaces and 16 protection groups — Advanced on-chip emulation debug mode Table 1. MPC885 Family Part Cache (Kbytes) Ethernet SCC SMC USB ATM Support Security Engine I Cache D Cache 10BaseT 10/100 MPC885 8 8 Up to 3 2 3 2 1 Serial ATM and UTOPIA interface Yes MPC880 8 8 Up to 2 2 2 2 1 Serial ATM and UTOPIA interface No

Page 4

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 3 Features • Provides enhanced ATM functionality found on the MPC862 and MPC866 families and includes the following: — Improved operation, administration and maintenance (OAM) support — OAM performance monitoring (PM) support — Multiple APC priority levels available to support a range of traffic pace requirements — Port-to-port switching capability without the need for RAM-based microcode — Simultaneous MII (100BaseT) and UTOPIA (half- or full -duplex) capability — Optional statistical cell counters per PHY — UTOPIA L2-compliant interface with added FIFO buffering to reduce the total cell transmission time and multi-PHY support. (The earlier UTOPIA L1 specification is also supported.) — Parameter RAM for both SPI and I2C can be relocated without RAM-based microcode — Supports full-duplex UTOPIA master (ATM side) and slave (PHY side) operations using a split bus — AAL2/VBR functionality is ROM-resident • Up to 32-bit data bus (dynamic bus sizing for 8, 16, and 32 bits) • Thirty-two address lines • Memory controller (eight banks) — Contains complete dynamic RAM (DRAM) controller — Each bank can be a chip select or RAS to support a DRAM bank — Up to 30 wait states programmable per memory bank — Glueless interface to DRAM, SIMMS, SRAM, EPROMs, Flash EPROMs, and other memory devices — DRAM controller programmable to support most size and speed memory interfaces — Four CAS lines, four WE lines, and one OE line — Boot chip-select available at reset (options for 8-, 16-, or 32-bit memory) — Variable block sizes (32 Kbytes–256 Mbytes) — Selectable write protection — On-chip bus arbitration logic • General-purpose timers — Four 16-bit timers or two 32-bit timers — Gate mode can enable/disable counting. — Interrupt can be masked on reference match and event capture • Two fast Ethernet controllers (FEC)—Two 10/100 Mbps Ethernet/IEEE Std. 802.3™ CDMA/CS that interface through MII and/or RMII interfaces • System integration unit (SIU) — Bus monitor — Software watchdog

Page 5

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 4 Freescale Semiconductor Features — Periodic interrupt timer (PIT) — Clock synthesizer — Decrementer and time base — Reset controller — IEEE Std 1149.1™ test access port (JTAG) • Security engine is optimized to handle all the algorithms associated with IPsec, SSL/TLS, SRTP, IEEE Std 802.11i™, and iSCSI processing. Available on the MPC885, the security engine contains a crypto-channel, a controller, and a set of crypto hardware accelerators (CHAs). The CHAs are: — Data encryption standard execution unit (DEU) – DES, 3DES – Two key (K1, K2, K1) or three key (K1, K2, K3) – ECB and CBC modes for both DES and 3DES — Advanced encryption standard unit (AESU) – Implements the Rijndael symmetric key cipher – ECB, CBC, and counter modes – 128-, 192-, and 256- bit key lengths — Message digest execution unit (MDEU) – SHA with 160- or 256-bit message digest – MD5 with 128-bit message digest – HMAC with either algorithm — Crypto-channel supporting multi-command descriptor chains — Integrated controller managing internal resources and bus mastering — Buffer size of 256 bytes for the DEU, AESU, and MDEU, with flow control for large data sizes • Interrupts — Six external interrupt request (IRQ) lines — 12 port pins with interrupt capability — 23 internal interrupt sources — Programmable priority between SCCs — Programmable highest priority request • Communications processor module (CPM) — RISC controller — Communication-specific commands (for example, GRACEFUL STOP TRANSMIT, ENTER HUNT MODE, and RESTART TRANSMIT) — Supports continuous mode transmission and reception on all serial channels — 8-Kbytes of dual-port RAM — Several serial DMA (SDMA) channels to support the CPM — Three parallel I/O registers with open-drain capability

Page 6

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 5 Features • On-chip 16 × 16 multiply accumulate controller (MAC) — One operation per clock (two-clock latency, one-clock blockage) — MAC operates concurrently with other instructions — FIR loop—Four clocks per four multiplies • Four baud rate generators — Independent (can be connected to any SCC or SMC) — Allow changes during operation — Autobaud support option • Up to three serial communication controllers (SCCs) supporting the following protocols: — Serial ATM capability on SCCs — Optional UTOPIA port on SCC4 — Ethernet/IEEE Std 802.3™ optional on the SCC(s) supporting full 10-Mbps operation — HDLC/SDLC — HDLC bus (implements an HDLC-based local area network (LAN)) — Asynchronous HDLC to support point-to-point protocol (PPP) — AppleTalk — Universal asynchronous receiver transmitter (UART) — Synchronous UART — Serial infrared (IrDA) — Binary synchronous communication (BISYNC) — Totally transparent (bit streams) — Totally transparent (frame based with optional cyclic redundancy check (CRC)) • Up to two serial management channels (SMCs) supporting the following protocols: — UART (low-speed operation) — Transparent — General circuit interface (GCI) controller — Provide management for BRI devices as GCI controller in time-division multiplexed (TDM) channels • Universal serial bus (USB)—Supports operation as a USB function endpoint, a USB host controller, or both for testing purposes (loop-back diagnostics) — USB 2.0 full-/low-speed compatible — The USB function mode has the following features: – Four independent endpoints support control, bulk, interrupt, and isochronous data transfers. – CRC16 generation and checking – CRC5 checking – NRZI encoding/decoding with bit stuffing – 12- or 1.5-Mbps data rate

Page 7

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 6 Freescale Semiconductor Features – Flexible data buffers with multiple buffers per frame – Automatic retransmission upon transmit error — The USB host controller has the following features: – Supports control, bulk, interrupt, and isochronous data transfers – CRC16 generation and checking – NRZI encoding/decoding with bit stuffing – Supports both 12- and 1.5-Mbps data rates (automatic generation of preamble token and data rate configuration). Note that low-speed operation requires an external hub. – Flexible data buffers with multiple buffers per frame – Supports local loop back mode for diagnostics (12 Mbps only) • Serial peripheral interface (SPI) — Supports master and slave modes — Supports multiple-master operation on the same bus • Inter-integrated circuit (I2C) port — Supports master and slave modes — Supports a multiple-master environment • Time-slot assigner (TSA) — Allows SCCs and SMCs to run in multiplexed and/or non-multiplexed operation — Supports T1, CEPT, PCM highway, ISDN basic rate, ISDN primary rate, user defined — 1- or 8-bit resolution — Allows independent transmit and receive routing, frame synchronization, and clocking — Allows dynamic changes — Can be internally connected to four serial channels (two SCCs and two SMCs) • Parallel interface port (PIP) — Centronics interface support — Supports fast connection between compatible ports on MPC885/MPC880 and other MPC8xx devices • PCMCIA interface — Master (socket) interface, release 2.1-compliant — Supports two independent PCMCIA sockets — 8 memory or I/O windows supported • Debug interface — Eight comparators: four operate on instruction address, two operate on data address, and two operate on data — Supports conditions: = ≠ < > — Each watchpoint can generate a break point internally. • Normal high and normal low power modes to conserve power

Page 8

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 7 Features • 1.8-V core and 3.3-V I/O operation • The MPC885/MPC880 comes in a 357-pin ball grid array (PBGA) package The MPC885 block diagram is shown in Figure 1. Figure 1. MPC885 Block Diagram Serial Interface I2CSPISMC2SMC1SCC2 SCC4/ UTOPIASCC3 USB Time-Slot Assigner Bus System Interface Unit (SIU) Embedded Parallel I/O Memory Controller 4 Timers Interrupt Controllers 8-Kbyte Dual-Port RAM System Functions 8-Kbyte Instruction Cache 32-Entry ITLB Instruction MMU 8-Kbyte Data Cache 32-Entry DTLB Data MMU Instruction Bus Load/Store Bus Unified 4 Baud Rate Generators Parallel Interface Internal Bus Interface Unit External Bus Interface Unit Timers 32-Bit RISC Controller and Program ROM MPC8xx Processor Core PCMCIA-ATA Interface Virtual IDMA and Serial DMAs Security Engine AESU DEU MDEU Controller Channel DMAs DMAs FIFOs 10/100 MIII/RMII BaseT Media Access Control Fast Ethernet Controller Slave/Master IF Port

Page 9

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 8 Freescale Semiconductor Features The MPC880 block diagram is shown in Figure 2. Figure 2. MPC880 Block Diagram Bus System Interface Unit (SIU) Embedded Parallel I/O Memory Controller 4 Timers Interrupt Controllers 8-Kbyte Dual-Port RAM System Functions 8-Kbyte Instruction Cache 32-Entry ITLB Instruction MMU 8-Kbyte Data Cache 32-Entry DTLB Data MMU Instruction Bus Load/Store Bus Unified 4 Baud Rate Generators Parallel Interface Internal Bus Interface Unit External Bus Interface Unit Timers 32-Bit RISC Controller and Program ROM Serial Interface I2CSPISMC2SMC1 MPC8xx Processor Core SCC3 PCMCIA-ATA Interface Virtual IDMA and Serial DMAs SCC4/ DMAs FIFOs 10/100 MIII/RMII BaseT Media Access Control Fast Ethernet Controller UTOPIAUSB Slave/Master IF Time-Slot Assigner DMAs Port

Page 10

MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7 Freescale Semiconductor 9 Maximum Tolerated Ratings 3 Maximum Tolerated Ratings This section provides the maximum tolerated voltage and temperature ranges for the MPC885/MPC880. Table 2 displays the maximum tolerated ratings, and Table 3 displays the operating temperatures. Figure 3 shows the undershoot and overshoot voltages at the interfaces of the MPC885/MPC880. Figure 3. Undershoot/Overshoot Voltage for VDDH and VDDL Table 2. Maximum Tolerated Ratings Rating Symbol Value Unit Supply voltage1 1 The power supply of the device must start its ramp from 0.0 V. VDDH –0.3 to 4.0 V VDDL –0.3 to 2.0 V VDDSYN –0.3 to 2.0 V Difference between VDDL and VDDSYN <100 mV Input voltage2 2 Functional operating conditions are provided with the DC electrical specifications in Table 6. Absolute maximum ratings are stress ratings only; functional operation at the maxima is not guaranteed. Stress beyond those listed may affect device reliability or cause permanent damage to the device. See Section 8, “Power Supply and Power Sequencing.” Caution: All inputs that tolerate 5 V cannot be more than 2.5 V greater than VDDH. This restriction applies to power up and normal operation (that is, if the MPC885/MPC880 is unpowered, a voltage greater than 2.5 V must not be applied to its inputs). Vin GND – 0.3 to VDDH V Storage temperature range Tstg –55 to +150 °C GND GND – 0.3 V GND – 0.7 V Not to Exceed 10% VDDH/VDDL + 20% VDDH/VDDL VDDH/VDDL + 5% of tinterface 1 1. tinterface refers to the clock period associated with the bus clock interface. VIH VIL Note:

MPC885CZP66 Guarantees

Service Guarantee

Service Guarantees

We guarantee 100% customer satisfaction.

Our experienced sales team and tech support team back our services to satisfy all our customers.

Quality Guarantee

Quality Guarantees

We provide 90 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.

MPC885CZP66 Related Products

hotMPC885CZP66 MRF7S21110HR3 NXP, FET RF 65V 2.17GHZ NI-780, NI-780, MPC8xx View
hotMPC885CZP66 MPC17511EP NXP, IC MOTOR DRIVER PAR 24QFN, 24-VFQFN Exposed Pad, MPC8xx View
hotMPC885CZP66 74LV251PW,118 NXP, IC 8-INPUT MUX 3-ST 16TSSOP, 16-TSSOP (0.173", 4.40mm Width), MPC8xx View
hotMPC885CZP66 SC16C754BIB80,551 NXP, IC UART QUAD 64BYTE 80LQFP, 80-LQFP, MPC8xx View
hotMPC885CZP66 MPC8572VTAULD NXP, IC MPU MPC85XX 1.333GHZ 1023BGA, 1023-BFBGA, FCBGA, MPC8xx View
hotMPC885CZP66 MPC8379VRAGD NXP, IC MPU MPC83XX 400MHZ 689TEBGA, 689-BBGA Exposed Pad, MPC8xx View
hotMPC885CZP66 MPC8379EVRAJF NXP, IC MPU MPC83XX 533MHZ 689TEBGA, 689-BBGA Exposed Pad, MPC8xx View
hotMPC885CZP66 MPC8321CVRADDC NXP, IC MPU MPC83XX 266MHZ 516BGA, 516-BBGA, MPC8xx View
hotMPC885CZP66 MPC8323EVRADDC NXP, IC MPU MPC83XX 266MHZ 516BGA, 516-BBGA, MPC8xx View
hotMPC885CZP66 MPC857DSLZQ50B NXP, IC MPU MPC8XX 50MHZ 357BGA, 357-BBGA, MPC8xx View
hotMPC885CZP66 MPC8349ZUAGD NXP, IC MPU MPC83XX 400MHZ 672TBGA, 672-LBGA, MPC8xx View
hotMPC885CZP66 MPC8347EZUAJF NXP, IC MPU MPC83XX 533MHZ 672TBGA, 672-LBGA, MPC8xx View

MPC885CZP66 Tags

  • MPC885CZP66
  • MPC885CZP66 PDF
  • MPC885CZP66 datasheet
  • MPC885CZP66 specification
  • MPC885CZP66 image
  • NXP
  • NXP MPC885CZP66
  • buy MPC885CZP66
  • MPC885CZP66 price
  • MPC885CZP66 distributor
  • MPC885CZP66 supplier
  • MPC885CZP66 wholesales

MPC885CZP66 is Available in