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PI3V713-AZLEX

hot PI3V713-AZLEX

PI3V713-AZLEX

For Reference Only

Part Number PI3V713-AZLEX
Manufacturer Diodes Incorporated
Description IC MUX/DEMUX 7CH 32TQFN
Datasheet PI3V713-AZLEX Datasheet
Package 32-WFQFN Exposed Pad
In Stock 5720 piece(s)
Unit Price $ 0.837 *
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PI3V713-AZLEX

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PI3V713-AZLEX Specifications

ManufacturerDiodes Incorporated
CategoryIntegrated Circuits (ICs) - Interface - Analog Switches - Special Purpose
Datasheet PI3V713-AZLEX Datasheet
Package32-WFQFN Exposed Pad
Series-
ApplicationsVideo
Multiplexer/Demultiplexer Circuit2:1
Number of Channels7
On-State Resistance (Max)5.6 Ohm
Voltage - Supply, Single (V+)3.3V
-3db Bandwidth1.7GHz
FeaturesRGB
Operating Temperature-40°C ~ 85°C (TA)
Package / Case32-WFQFN Exposed Pad
Supplier Device Package32-TQFN-EP (3x6)

PI3V713-AZLEX Datasheet

Page 1

Page 2

1 PS9101 06/29/10 R G R1 G1 B1B R2 G2 B2 H1_OUT V1_OUT H_SOURCE V_SOURCE H2_OUT V2_OUT Dual Buffer SDA_SOURCE SCL_SOURCE 5V to 3.3V Level Shifter SDA1 SCL1 SDA2 SCL2 Control LogicSEL +5V Dual Buffer Features • Designed specifically to switch VGA signals • 7-Channels for VGA signals (R,G,B, Hsync, Vsync, DDC Data, and DDC CLK) • VDD = 3.3V +/-10% • DDC path will operate as a 5V to 3.3V level shifter • H/V output buffer with +/-24mA drive • ESD tolerance on video I/O pins is up to 12kV HBM per JEDEC standard • -3dB BW of 1.7GHz (typ) • Low Xtalk, (-38dB typ) • Low and Flat ON-STATE resistance (Ron = 4.8-Ohm, Ron(Flat) = 0.5ohm, typ) • Low input/output capacitance (Con = 5.6pF, typ) • Packaging (Pb-free and Green): –32-contact TQFN (ZLE) Applications • Routes physical layer signals for high bandwidth digital video Description Pericom’s PI3V713-A is a 7-channel video mux/demux used to switch between multiple VGA sources or end points. In a notebook application where analog video signals are found in both the notebook and the dock, a switch solution is required to switch between the two video port locations. With the high bandwidth of ~1.7GHz, the signal integrity will remain strong even through the long FR4 trace between the notebook and the docking station. In addition to high signal performance, the video signals are also protected against high ESD with integrated diodes to VDD and GND that will support up to12kV HBM ESD protection. Application Routing VGA signals with low signal attenuation and high ESD. Block Diagram Pin Diagram PI3V713-A 3.3V, 7-Channel Analog Video Switch GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 32 31 30 29 28 V D D G N D S E L TE S T G N D R G GND VDD B H_SOURCE V_SOURCE Reserved SDA_SOURCE SCL_SOURCE GND S D A 1 S D A 2 S C L1 S C L2 5V V D D R1 R2 G1 G2 VDD B1 B2 H1_OUT H2_OUT V1_OUT V2_OUT 10-0192

Page 3

2 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Pin Description Pin Number Pin Name Pin Type Description 1 R I/O Red signal from VGA Transmitter 2 G I/O Green signal from VGA Transmitter 3 GND Ground Ground 4 VDD Power 3.3V +/-10% power rail 5 B I/O Blue signal from VGA Transmitter 6 H_SOURCE I Horizontal Synchronous signal from VGA Transmitter 7 V_SOURCE I Vertical Synchronous signal from VGA Transmitter 8 Reserved I For normal operation, this pin needs to be tied HIGH 9 SDA_SOURCE I/O DDC, data signal from VGA Transmitter 10 SCL_SOURCE I/O DDC, clock signal from VGA Transmitter 11 GND Ground Ground 12 SDA1 I/O DDC, data signal for VGA output port 1 13 SDA2 I/O DDC, data signal for VGA output port 2 14 SCL1 I/O DDC, clock signal for VGA output port 1 15 SCL2 I/O DDC, clock signal for VGA output port 2 16 5V VDD Power 5V +/-10% Power rail 17 V2_OUT O Vertical Synchronous buffered signal for VGA output port 2 18 V1_OUT O Vertical Synchronous buffered signal for VGA output port 1 19 H2_OUT O Horizontal Synchronous buffered signal for VGA output port 2 20 H1_OUT O Horizontal Synchronous buffered signal for VGA output port 1 21 B2 I/O Blue signal for VGA port 2 22 B1 I/O Blue signal for VGA port 1 23 VDD Power 3.3V +/-10% power rail 24 G2 I/O Green signal for VGA port 2 25 G1 I/O Green signal for VGA port 1 26 R2 I/O Red signal for VGA port 2 27 R1 I/O Red signal for VGA port 1 28 GND Ground Ground 29 TEST Input Description is TEST pin to enable TEST mode. IF this pin is LOW, then test mode is enabled. For normal usage disable TEST mode by holding this pin high, or floating. There is an internal 100Kohm pull-up on this pin 30 SEL I Control signal. If pin 30 is LOW, port 1 is chosen If pin 30 is HIGH, port 2 is chosen 31 GND Ground Ground 32 VDD Power 3.3V +/-10% power rail 10-0192

Page 4

3 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Storage Temperature....................................–65°C to +150°C Supply Voltage to Ground Potential...............–0.5V to +4.0V DC Input Voltage............................................–0.5V to +5.5V DC Output Current......................................................120mA Power Dissipation...........................................................0.5W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Truth Table SEL Result 0 Port 1 is active 1 Port 2 is active DC Electrical Characteristics for Video Switching over Operating Range (TA = –40°C to +85°C, VDD = 3.3V ±10% , 5V VDD = 5V) Parameters Description Test Conditions(1) Min. Typ.(2) Max. Units VIH Input HIGH Voltage (SEL/Priority and MS pins) Guaranteed HIGH level 2 - - V VIL Input LOW Voltage (SEL/Priority, and MS pins) Guaranteed LOW level –0.5 - 0.8 VIK Clamp Diode Voltage VDD = Max., ISELx = –18mA - –0.8 –1.2 IIH Input HIGH Current (SEL/Priority) VDD = Max., VSELx = VDD - - ±5 µAIIL Input LOW Current (SEL/Priority) VDD = Max., VSELx = GND - - ±5 IOFF_H/V/DDC Power Down Leakage Current for H/V and DDC channels only VDD = 0V, VB = 0V, VA ≤ 3.6 - - ±5 RON Switch On-Resistance for RGB path (3) VDD = Min., 0V ≤ Vinput ≤ 1.2V, Iinput = –40mA - 4.8 5.6 ΩRFLAT(ON) On-Resistance Flatness for RGB path (4) VDD = Min., Vinput @ 0V and 1.2V, Iinput = –40mA - 0.5 +1 ∆RON On-Resistance match from center ports to any other port (RGB path only)(4) VDD = Min., 0V ≤ Vinput ≤ 1.2V, Iinput = –40mA - 0.1 1 VOH (H/V) Output high for H/V signals 5V VDD = 5V, IOH = -24mA 3.0 5V VDD V VOL (H/V) Output low for H/V signals 5V VDD = 5V, IOL = 24mA 0 0.8 10-0192

Page 5

4 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Dynamic Electrical Characteristics Over the Operating Range (TA=-40º to +85ºC, VDD=3.3V±10%, GND=0V) Parameters Description Test Conditions Min. Typ.(2) Max. Units XTALK Crosstalk f = 250MHz, See Fig. 2 - -38 - dB OIRR OFF Isolation f = 250MHz, See Fig. 3 - -46 - BW Bandwidth –3dB See Fig. 1 - 1.7 - GHz ILOSS Insertion Loss for RGB path with 75-Ohm load Freq = 10MHz (VGA) -1.77 dBFreq = 100MHz (XGA) -1.88 Freq = 300MHz (UXGA) -2.09 Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Guaranteed by design. 3. The switch contributes no propagational delay other than the RC delay of the On-Resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 10pF load. Since this time constant is much smaller than the rise/fall times of typical driving signals, it adds very little propagational delay to the system. Propagational delay of the bus switch when used in a system is determined by the driving circuit on the driving side of the switch and its interactions with the load on the driven side. Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading. 3. Measured by the voltage drop between input and output pins at indicated current through the switch. On-Resistance is determined by the lower of the voltages on the two pins. 4. This parameter is determined by device characterization but is not production tested. Capacitance (TA = 25°C, f = 1MHz) Parameters(4) Description Test Conditions(1) Typ.(2) Units CIN Input Capacitance 2.0 pFCOFF RGB Capacitance, Switch OFF 2.4 CON RGB Switch Capacitance, Switch ON 5.6 Switching Characteristics Parameters Description Min. Typ.(2) Max. Units tPD Propagation Delay(2,3) - 0.25 ns tPZH, tPZL Line Enable Time - SEL to Input, Output 0.5 - 15 tPHZ, tPLZ Line Disable Time - SEL to Input, Output 0.5 - 10 tSK(p) Skew between opposite transitions of the same output (tPHL - tPLH) (2) - 0.1 0.2 Trise (H/V) Horizontal/Vertical synchronous output rise time (H1_out, V1_out, H2_out, and V2_out) with 15pF load 1.5 Tfall (H/V) Horizontal/Vertical synchronous output fall time (H1_out, V1_out, H2_out, and V2_out) with 15pF load 1.6 Notes: 1. For max. or min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VDD = 3.3V, TA = 25°C ambient and maximum loading. Power Supply Characteristics Parameters Description Test Conditions(1) Min. Typ.(2) Max. Units ICC _3.3V rail Quiescent Power Supply Current for 3.3V power rail VDD = Max., VDD = 3.6V, 5V VDD = 5.5V VSEL = GND or VDD - 250 500 µA ICC_5V VDD Quiescent Power supply current for 5V VDD 5V VDD = 5.5V, VDD = 3.6V, VSEL= GND or VDD 100 500 nA 10-0192

Page 6

5 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Test Circuit for Electrical Characteristics(1) Notes: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator 3. All input impulses are supplied by generators having the following characteristics: f = 10 MHz, ZO = 50Ω, tR ≤ 2.5ns, tF ≤ 2.5ns. 4. The outputs are measured one at a time with one transition per measurement. Test Circuit for Dynamic Electrical Characteristics Switch Positions Test Switch tPLZ, tPZL (output on I-side) 6.0V tPHZ, tPZH (output on I-side) GND Prop Delay Open Figure 1. Bandwidth -3dB Testing RT 10pF CL VDD VIN VOUT 200-ohm 200-ohm 6.0V Pulse Generator D.U.T PI3V713-A TRS HP11667A 16 2/3-ohm HP4396B 16 2/3-ohm 16 2/3-ohm 10-0192

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6 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Figure 2. Crosstalk Test Setup Figure 3. Off Isolation Test Setup PI3V713-A TR R G S HP11667A HP4396B 75Ω 75Ω 16 2/3-ohm 16 2/3-ohm 16 2/3-ohm PI3V713-A TRS HP11667A HP4396B 75Ω 16 2/3-ohm R1 R2 16 2/3-ohm 16 2/3-ohm R 10-0192

Page 8

7 PS9101 06/29/10 PI3V713-A 3.3V, 7-Channel Analog Video Switch Voltage Waveforms Propagation Delay Times Switching Waveforms Output Skew - tSK(o) Pulse Skew - tSK(p) Voltage Waveforms Enable and Disable Times Data In Data Out at Channel X Data Out at Channel Y tPLHX tPHLX 3.5V 2.5V 2.5V 2.5V I tSK(o) = I tPLHy – tPLHx I or I tPHLy – tPHLx I tSK(o) tPLHy tPHLy VOH VOL VOL VOH 1.5V Input Output tPLH tSK(p) = I tPHL – tPLH I tPHL 3.5V 2.5V 2.5V VOL VOH 1.5V tPLZ 1.25V 1.25V 2.5V VOH 0V VOL VDD/2 VDD/2 tPHZ tPZL tPZH Output Output VOL +0.3V VOH –0.3V VOL VOH SEL Applications Information Logic Inputs The logic control inputs can be driven up to +3.6V regardless of the supply voltage. For example, given a +3.3V supply, the output enables or select pins may be driven low to 0V and high to 3.6V. Driving IN Rail-to-Rail® minimizes power consumption. Input tPLH tPHL 2.5V 2.5V 2.5V2.5V Output 3.5V 1.5V VOH VOL 10-0192

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