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ST72F651AR6T1

hot ST72F651AR6T1

ST72F651AR6T1

For Reference Only

Part Number ST72F651AR6T1
Manufacturer STMicroelectronics
Description IC MCU 8BIT 32KB FLASH 64TQFP
Datasheet ST72F651AR6T1 Datasheet
Package 64-LQFP
In Stock 84492 piece(s)
Unit Price Request a Quote
Lead Time Can Ship Immediately
Estimated Delivery Time Dec 14 - Dec 19 (Choose Expedited Shipping)
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ST72F651AR6T1

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ST72F651AR6T1 Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - Embedded - Microcontrollers
Datasheet ST72F651AR6T1 Datasheet
Package64-LQFP
SeriesST7
Core ProcessorST7
Core Size8-Bit
Speed12MHz
ConnectivityI2C, SPI, USB
PeripheralsDMA, LVD, POR, PWM, WDT
Number of I/O47
Program Memory Size32KB (32K x 8)
Program Memory TypeFLASH
RAM Size5K x 8
Voltage - Supply (Vcc/Vdd)4 V ~ 5.5 V
Data ConvertersA/D 8x8b
Oscillator TypeExternal
Operating Temperature0°C ~ 70°C (TA)
Package / Case64-LQFP

ST72F651AR6T1 Datasheet

Page 1

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Data Brief For further information contact your local STMicroelectronics sales office. October 2007 Rev 1 1/4 4 STEVAL-IFS003V1 Temperature sensor board based on STLM75/STDS75 and ST72F651AR6 Features ■ ST72F651 microcontroller used for temperature monitoring, data logging and fan speed regulation ■ USB-powered board capable of working in stand-alone mode using the GUI Description The purpose of this product evaluation board is to demonstrate the features of temperature sensors STDS75 and STLM75. The board consists of the ST72F651AR6 microcontroller, the STLM75 and STDS75 temperature sensors, and a NAND flash. The board functions in two operating modes: stand-alone / external power mode and USB- powered mode. When this product evaluation board is connected to a computer through a USB cable, it will also function as a mass storage device. The default state of the board is “mass storage mode”, and can be switched to “temperature sensor mode” using the GUI (graphical user interface). STEVAL-IFS003V1 www.st.com

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Block diagram STEVAL-IFS003V1 2/4 1 Block diagram Figure 1. Schematic X T 1 1 2 M H z C 2 3 3 p F C 3 3 3 p F R 6 1 .5 k U S B _ V C C 1 U S B _ D - 2 U S B _ D + 3 U S B _ G N D 4 J2US B C O N P E 3 4 8 P E 2 (H S ) 4 7 P E 1 (H S ) 4 6 P E 0 (H S ) 4 5 P D 7 4 4 P D 6 4 3 P D 5 4 2 P D 4 4 1 P D 3 4 0 P D 2 3 9 P D 1 3 8 P D 0 3 7 P C 7 3 6 P C 6 3 5 P C 5 3 4 P C 4 3 3 PF3 55 OSCOUT 64 OSCIN 63 Vss2 62 Vssa 61 Vdda 60 Vdd2 59 PF6/ICCDATA 58 PF5/ICCCLK 57 PF4 56 PF2 54 SDA 53 SCL 52 RESET 51 VPP 50 PE4 49 U S B V ss 1 U S B D M 2 U S B D P 3 U S B V C C 4 U S B V d d 5 V d d f 6 V ssf 7 P E 5 / M M C _ C M D 8 P E 6 / M M C _ D A T 9 P E 7 / M M C _ C L K 1 0 P B 0 / D 0 1 1 P B 1 / D 1 1 2 P B 2 / D 2 1 3 P B 3 / D 3 1 4 P B 4 / D 4 1 5 P B 5 / D 5 1 6 PB6 / D6 17 PB7 / D7 18 PA0/SMC_CLE/CF_A0 19 PA1/SMC_WE/CF_A1 20 PA2/SMC_ALE/CF_A2 21 PA3/SMC_RE/CF_RE 22 PA4 / SMC_R/B 23 PA5 / CF_WE 24 PA6 25 PA7 26 PC0 27 PC1 / MS_BS 28 PC2 / MS_DAT 29 PC3 / MS_CLK 30 Vdd1 31 Vss1 32 U 2 S T 7 2 6 5 F M IC R O C 8 1 0 0 nF D 0 D 1 D 2 D 3 D 4 D 5 SMC_RB PA3 D7 D6 VCC GND VCC O n B o ard F lash V d d f R 4 4 .7 k R 5 4 .7 kSM C _ R B D 0 D 1 D 2 D 3 D 4 D 5 D 6 D 7 P A 3 R 1 3 3 0 E U S B L E D R ed N A N D _ C E 1 N A N D _ C E 1 C 6 1 0 0 nF U S B + 5 V C 1 2 4 .7 µ F V d d f N C 1 N C 4 8 N C 4 7 N C 4 6 N C 4 5 I/O 7 4 4 I/O 6 4 3 I/O 5 4 2 I/O 4 4 1 N C 4 0 N C 3 9 N C 3 8 V C C 3 7 V S S 3 6 N C 3 5 N C 3 4 N C 3 3 I/O 3 3 2 I/O 2 3 1 I/O 1 3 0 I/O 0 2 9 N C 2 8 N C 2 7 N C 2 6 N C 2 5 N C 2 N C 3 N C 4 N C 5 N C 6 # R /B 7 # R E 8 # C E 9 N C 1 0 N C 1 1 V C C 1 2 V S S 1 3 N C 1 4 N C 1 5 C L E 1 6 A L E 1 7 # W E 1 8 # W P 1 9 N C 2 0 N C 2 1 N C 2 2 N C 2 3 N C 2 4 U 1 N A N D _ F L A S H 1 C 1 1 0 µ F -1 0 V V C C R 2 3 3 0 E P D 4 SDA SCL S D A S C L X T 2 3 2 .7 6 8 k H z C 1 3 6 p F C 1 4 6 p F V C C R 1 4 1 0 k R 3 4 k 7 C 5 1 0 0 nF S 2RE S E T G N D C 4 1 0 0 nF C 7 1 0 0 nF R T C V d d f IC C RESET ICCDATA ICCCLK VPP GND Vddf R 9 1 0 k R 1 0 1 0 k X 1 1 X 0 2 V b at 3 G N D 4 S D A 5 S C L 6 IR Q 7 V C C 8 U 4 M 4 1 T 8 1 S S D A 1 S C L 2 O S 3 G N D 4 A 2 5 A 1 6 A 0 7 V C C 8 T S 1 S T D S 7 5S D A 1 S C L 2 O S 3 G N D 4 A 2 5 A 1 6 A 0 7 V C C 8 T S 2 S T L M 7 5 C 1 1 1 0 0 nF V C C S D A S C L S D A S C L S D A S C L C 9 1 0 0 nFC 1 0 1 0 0 nF B Z 1 B U Z Z E R R 1 5 1 0 k V C C P D 4 A L A R M L E D red R 1 1 1 .5 k V C C B T 1 B A T T E R Y T E M P S E N S O R -I T E M P S E N S O R -II VCC 1 GND 2 VLCD 3 RST 4 E1 5 E2 6 R/W 7 A0 8 DB1 10 DB2 11 DB3 12 DB4 13 DB5 14 DB6 15 DB7 16 DB0 9 L C D 1 T S 1 2 2 3 2 C DB7 DB5 DB4 DB6 DB0 DB1 DB2 DB3 R 2 0 1 0 k LCD_A0 GND E1 E2 VCC GND PWM1 PWM1 E 2 E 1 P W M 0 R 1 7 2 7 0 E 12 J3DC F A N V C C U S B + 5 V V C C + V G N D 1 2 3 J1JA C K E X T L E D G reen V C C 1 2 3 4 5 6 7 8 9 1 0 C O N 1 H E A D E R 5 X 2 G N D V C C V P P IC C D A T A IC C C L K R E S E T R 1 8 1 0 k LCD_A0 S D A 1 S C L 2 O S 3 G N D 4 A 2 5 A 1 6 A 0 7 V C C 8 T S 1 A S O -8 S o ck et S D A S C L O S 1 S D A 1 S C L 2 O S 3 G N D 4 A 2 5 A 1 6 A 0 7 V C C 8 T S 2 A T S S O P -8 S O C K E T S D A S C L O S 2 C L E A L E # W E # W P CLE ALE #WE #WP MISO MOSI SCK 1 2 3 4 5 6 7 8 C O N 2 H E A D E R 4 X 2 V C C G N D M IS O M O S I S C K S D A S C L D B 7 D B 5 D B 4 D B 6 D B 0 D B 1 D B 2 D B 3 R 7 0E R 8 330E R 1 3 1 0 k O S 1 O S 2 A 0 # A 1 # A 2 # A 0 A 1 A 2 A 0 A 1 A 2 A 0 A 1 A 2 A 1 A 2 R 1 2 1 0 k B U Z Z L E D y ello w I2 C L E D g reen A 0 # A 1 # A 2 # A 0 # A 1 # A 2 # A 0 # A 1 # A 2 # IRQ/#SS D 1 IN 4 1 4 8 R16100E R19100E A 0 A 0 v d d f G N D A 1 v d d f G N D A 2 v d d f G N D A 0 # V C C G N D A 1 # V C C G N D A 2 # V C C G N D S 1 V C C V C C R 2 7 1 0 k IR Q /# S S IR Q /# S S C 1 6 1 0 0 nF C 1 5 3 3 0 nF I 1 G 2 O 3 U 3 L 7 8 0 5 C 1 7 1 0 0 u F /1 0 v R 2 1 2 .2 k R 2 2 2 .2 k R 2 3 2 .2 .k R 2 4 2 .2 .k R 2 6 2 .2 .k R 2 5 2 .2 k FF AA NN 2 31 Q 2 2 S T R 1 2 1 5 1 23 Q 1 S T B 1 0 0 N F C 1 9 1 0 0 nF C 1 8 1 0 0 nF

Page 4

STEVAL-IFS003V1 Revision history 3/4 2 Revision history Table 1. Document revision history Date Revision Changes 26-Oct-2007 1 Initial release

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