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STF10N60M2

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STF10N60M2

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Part Number STF10N60M2
Manufacturer STMicroelectronics
Description MOSFET N-CH 600V TO-220FP
Datasheet STF10N60M2 Datasheet
Package TO-220-3 Full Pack
In Stock 2,118 piece(s)
Unit Price $ 1.7800 *
Lead Time Can Ship Immediately
Estimated Delivery Time Aug 7 - Aug 12 (Choose Expedited Shipping)
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Part Number # STF10N60M2 (Transistors - FETs, MOSFETs - Single) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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STF10N60M2 Specifications

ManufacturerSTMicroelectronics
CategoryDiscrete Semiconductor Products - Transistors - FETs, MOSFETs - Single
Datasheet STF10N60M2Datasheet
PackageTO-220-3 Full Pack
SeriesMDmesh? II Plus
FET TypeN-Channel
TechnologyMOSFET (Metal Oxide)
Drain to Source Voltage (Vdss)600V
Current - Continuous Drain (Id) @ 25°C7.5A (Tc)
Drive Voltage (Max Rds On, Min Rds On)10V
Vgs(th) (Max) @ Id4V @ 250µA
Gate Charge (Qg) (Max) @ Vgs13.5nC @ 10V
Input Capacitance (Ciss) (Max) @ Vds400pF @ 100V
Vgs (Max)��25V
FET Feature-
Power Dissipation (Max)25W (Tc)
Rds On (Max) @ Id, Vgs600 mOhm @ 4A, 10V
Operating Temperature-55°C ~ 150°C (TJ)
Mounting TypeThrough Hole
Supplier Device PackageTO-220FP
Package / CaseTO-220-3 Full Pack

STF10N60M2 Datasheet

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March 2017 DocID024712 Rev 4 1/13 This is information on a product in full production. www.st.com STF10N60M2 N-channel 600 V, 0.55 Ω typ., 7.5 A MDmesh™ M2 Power MOSFET in a TO-220FP package Datasheet - production data Figure 1: Internal schematic diagram Features Order code VDS@TJmax. RDS(on) max. ID STF10N60M2 650 V 0.60 Ω 7.5 A  Extremely low gate charge  Excellent output capacitance (COSS) profile  100% avalanche tested  Zener-protected Applications  Switching applications Description This device is an N-channel Power MOSFET developed using MDmesh™ M2 technology. Thanks to its strip layout and an improved vertical structure, the device exhibits low on-resistance and optimized switching characteristics, rendering it suitable for the most demanding high efficiency converters. Table 1: Device summary Order code Marking Package Packing STF10N60M2 10N60M2 TO-220FP Tube TO-220FP AM15572v1_no_tab D(2) G(1) S(3)

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Contents STF10N60M2 2/13 DocID024712 Rev 4 Contents 1 Electrical ratings ............................................................................. 3 2 Electrical characteristics ................................................................ 4 2.2 Electrical characteristics (curves) ...................................................... 6 3 Test circuits ..................................................................................... 8 4 Package information ....................................................................... 9 4.1 TO-220FP package information ...................................................... 10 5 Revision history ............................................................................ 12

Page 4

STF10N60M2 Electrical ratings DocID024712 Rev 4 3/13 1 Electrical ratings Table 2: Absolute maximum ratings Symbol Parameter Value Unit VGS Gate-source voltage ±25 V ID(1) Drain current (continuous) at Tcase = 25 °C 7.5 A Drain current (continuous) at Tcase = 100 °C 4.9 IDM(2) Drain current (pulsed) 30 A PTOT Total dissipation at Tcase = 25 °C 25 W dv/dt(3) Peak diode recovery voltage slope 15 V/ns dv/dt(4) MOSFET dv/dt ruggedness 50 VISO(5) Insulation withstand voltage (RMS) from all three leads to external heat sink 2500 V Tstg Storage temperature range -55 to 150 °C Tj Operating junction temperature range Notes: (1)Limited by package. (2)Pulse limited by safe operating area. (3) ISD ≤ 7.5 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD = 400 V (4) VDS ≤ 480 V. (5)t = 1 s; TC = 25 °C. Table 3: Thermal data Symbol Parameter Value Unit Rthj-case Thermal resistance junction-case 5 °C/W Rthj-amb Thermal resistance junction-ambient 62.5 Table 4: Avalanche characteristics Symbol Parameter Value Unit IAR(1) Avalanche current, repetitive or not repetitive 1.5 A EAS(2) Single pulse avalanche energy 110 mJ Notes: (1) Pulse width limited by Tjmax. (2) Starting Tj = 25 °C, ID = IAR, VDD = 50 V.

Page 5

Electrical characteristics STF10N60M2 4/13 DocID024712 Rev 4 2 Electrical characteristics (Tcase = 25 °C unless otherwise specified) Table 5: Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 600 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 600 V 1 µA VGS = 0 V, VDS = 600 V, Tcase = 125 °C(1) 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 3 A 0.55 0.60 Ω Notes: (1)Defined by design, not subject to production test. Table 6: Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 400 - pF Coss Output capacitance - 22 - Crss Reverse transfer capacitance - 0.84 - Coss eq. (1) Equivalent output capacitance VDS = 0 to 480 V, VGS = 0 V - 83 - pF RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 6.4 - Ω Qg Total gate charge VDD = 480 V, ID = 7.5 A, VGS = 0 to 10 V (see Figure 15: "Test circuit for gate charge behavior") - 13.5 - nC Qgs Gate-source charge - 2.1 - Qgd Gate-drain charge - 7.2 - Notes: (1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. Table 7: Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 300 V, ID = 3.75 A RG = 4.7 Ω, VGS = 10 V (see Figure 14: "Test circuit for resistive load switching times" and Figure 19: "Switching time waveform") - 8.8 - ns tr Rise time - 8 - td(off) Turn-off delay time - 32.5 - tf Fall time - 13.2 -

Page 6

STF10N60M2 Electrical characteristics DocID024712 Rev 4 5/13 Table 8: Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD(1) Source-drain current - 7.5 A ISDM(2) Source-drain current (pulsed) - 30 A VSD(3) Forward on voltage VGS = 0 V, ISD = 7.5 A - 1.6 V trr Reverse recovery time ISD = 7.5 A, di/dt = 100 A/µs, VDD = 60 V (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 270 ns Qrr Reverse recovery charge - 2 µC IRRM Reverse recovery current - 14.4 A trr Reverse recovery time ISD = 7.5 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C (see Figure 16: "Test circuit for inductive load switching and diode recovery times") - 376 ns Qrr Reverse recovery charge - 2.8 µC IRRM Reverse recovery current - 15 A Notes: (1) Limited by package. (2) Pulse width is limited by safe operating area. (3) Pulse test: pulse duration = 300 µs, duty cycle 1.5%.

Page 7

Electrical characteristics STF10N60M2 6/13 DocID024712 Rev 4 2.2 Electrical characteristics (curves) Figure 2: Safe operating area Figure 3: Thermal impedance Figure 4: Output characteristics Figure 5: Transfer characteristics Figure 6: Gate charge vs gate-source voltage Figure 7: Static drain-source on-resistance ID 6 4 2 0 0 10 VDS(V) (A) 5 15 8 4V 5V 6V VGS=7, 8, 9, 10V 20 10 12 14 AM15823v1 ID 4 0 0 4 VGS(V)8 (A) 2 6 8 12 VDS=18V 14 10 2 6 10 AM15824v1 VGS 6 4 2 0 0 Qg(nC) (V) 2 8 10 VDD=480V 300 200 100 0 400 VDS 4 500 VDS (V) ID=7.5A 6 8 10 12 12 AM15825v1

Page 8

STF10N60M2 Electrical characteristics DocID024712 Rev 4 7/13 Figure 8: Capacitance variations Figure 9: Normalized gate threshold voltage vs temperature Figure 10: Normalized on-resistance vs temperature Figure 11: Normalized V(BR)DSS vs temperature Figure 12: Source-drain diode forward characteristics Figure 13: Output capacitance stored energy VGS(th) 0.8 0.7 TJ(°C) (norm) -50 0.9 -25 50 1000 25 75 125 1.0 1.1 ID=250 µA RDS(on) 1.3 1.1 0.9 0.7 TJ(°C) (norm) 0.5 -50 -25 0 25 ID=6.5 A 50 75 100 125 1.5 1.7 1.9 2.1 2.3 2.5 VGS=10V AM15829v1 VSD 0 2 ISD(A) (V) 1 53 4 0 0.2 0.4 0.6 TJ=-50°C TJ=150°C TJ=25°C 0.8 6 7 1 1.2 1.4 AM15830v1

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Test circuits STF10N60M2 8/13 DocID024712 Rev 4 3 Test circuits Figure 14: Test circuit for resistive load switching times Figure 15: Test circuit for gate charge behavior Figure 16: Test circuit for inductive load switching and diode recovery times Figure 17: Unclamped inductive load test circuit Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform

Page 10

STF10N60M2 Package information DocID024712 Rev 4 9/13 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark.

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