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STP24DP05BTR

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STP24DP05BTR

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Part Number STP24DP05BTR
Manufacturer STMicroelectronics
Description IC LED DRIVER LINEAR 80MA 48TQFP
Datasheet STP24DP05BTR Datasheet
Package 48-TQFP Exposed Pad
In Stock 944 piece(s)
Unit Price $ 1.0706 *
Lead Time Can Ship Immediately
Estimated Delivery Time Sep 24 - Sep 29 (Choose Expedited Shipping)
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Part Number # STP24DP05BTR (PMIC - LED Drivers) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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STP24DP05BTR Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - PMIC - LED Drivers
Datasheet STP24DP05BTRDatasheet
Package48-TQFP Exposed Pad
Series-
TypeLinear
TopologyShift Register
Internal Switch(s)Yes
Number of Outputs24
Voltage - Supply (Min)3V
Voltage - Supply (Max)5.5V
Voltage - Output20V
Current - Output / Channel80mA
Frequency25MHz
Dimming-
Applications-
Operating Temperature-40°C ~ 125°C (TA)
Mounting TypeSurface Mount
Package / Case48-TQFP Exposed Pad
Supplier Device Package48-TQFP-EP (7x7)

STP24DP05BTR Datasheet

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February 2012 Doc ID 14714 Rev 5 1/27 27 STP24DP05 24-bit constant current LED sink driver with output error detection Features ■ Low-voltage power supply down to 3 V ■ 8 x 3 constant current output channels ■ Adjustable output current through external resistors ■ Short and open output error detection ■ Serial data IN/parallel data OUT ■ Shift register data flow register control ■ Accepts 3.3 V and 5 V micro driver ■ Output current: 5-80 mA ■ 25 MHz clock frequency ■ High thermal efficiency package Description The STP24DP05 is a monolithic, low-voltage, low current power 24-bit shift register designed for LED panel displays. The device contains an 8 x 3-bit serial-IN, parallel-OUT shift register that feeds a 8 x 3-bit D-type storage register. In the output stage, twenty four regulated current sources were designed to provide 5-80 mA constant current to drive the LEDs. The 8 x 3 shift register data flow sequence order can be managed through two dedicated pins. The STP24DP05 has a dedicated pin to activate the outputs with a sequential delay, that prevents inrush current during output turn-ON. The device detection circuit checks 3 different conditions that can occur on the output line: short to GND, short to VO, or open line. The data detection results are loaded in the shift registers and shifted out via the serial line output. The detection functionality is activated with a dedicated pin or alternatively, through a logic sequence that allows the user to enter or exit detection mode. Through three external resistors, the user can adjust the output current for each 8-channel group, therefore controlling the light intensity of LEDs. The STP24DP05 guarantees a 20 V output driving capability, allowing the user to connect more LEDs in series. The high clock frequency, 25 MHz, makes the device suitable for high data rate transmission. The 3.3 V of voltage supply is useful for applications that interface any microcontroller from 3.3 V. TQFP48-EP Table 1. Device summary Order code Package Packaging STP24DP05BTR TQFP48-EP (1) Tape and reel 1. Thermal pad size: 3.5 mm x 3.5 mm. www.st.com

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Contents STP24DP05 2/27 Doc ID 14714 Rev 5 Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 Features description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.1 DG: gradual output delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.2 Error detection condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.3 Phase one: “entering detection mode” . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7.4 Phase two: “error detection” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.5 Phase three: “resuming normal mode” . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.6 Shift register data flow control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7.7 EFLAG/TFLAG - output detection and overtemperature monitoring . . . . 19 8 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

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STP24DP05 Summary description Doc ID 14714 Rev 5 3/27 1 Summary description 1.1 Pin connection and description Figure 1. Pin connection Note: The exposed pad should be electrically connected to a PCB metal dissipation area electrically isolated or connected to ground. Table 2. Current accuracy Output voltage Typical current accuracy Output current VDD Temperature Between bits Between ICs ≥ 1.0 V ± 3% ± 6% ≥ 15 to 80 mA 3.3 V to 5 V 25 °C ≥ 0.2 V ± 6% ± 6% 5 to 15 mA TQFP48 exposed pad

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Summary description STP24DP05 4/27 Doc ID 14714 Rev 5 Table 3. Pin description Pin N° Symbol Name and function 1, 7, 12, 25, 30, 36 GND Ground terminal 2 SDI Serial data input 35 SDO Serial data output 4 CLK Clock for serial data 3 LE\DM Data latch in both SH registers 5 DM Detection mode pin 13, 16, 19, 22, 39, 42, 45, 48 R1 - 8 8-channel LED driver outputs 8 TF Thermal flag (open drain) 29 EF Error detection flag (open drain) 9 DG Gradual delay 15, 18, 21, 24 37, 40, 43, 46 B1 - 8 8-channel LED driver outputs 32 OE-B Output enable for B1 - 8 33 OE-G Output enable for G1 - 8 34 OE-R\DM Output enable for R1 - 8 28 REXTR Control outputs R1 - 8 27 REXTG Control outputs G1 - 8 26 REXTB Control outputs B1 - 8 14, 17, 20, 23 38, 41, 44, 48 G1 - 8 8-channel LED driver outputs 10 DF0 Data banks flow bit 0 11 DF1 Data banks flow bit 1 31 VDD Supply voltage terminal

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STP24DP05 Electrical ratings Doc ID 14714 Rev 5 5/27 2 Electrical ratings 2.1 Absolute maximum ratings Stressing the device above the ratings listed in Table 4 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2.2 Thermal data Table 4. Absolute maximum ratings Symbol Parameter Value Unit VDD Supply voltage - digital 0 to 7 V VO Output voltage - LED driver -0.5 to 20 V VTF and VER Open drain absolute voltage 0 to 7 V IO Output current - LED driver 80 mA VI Input voltage - digital -0.4 to VDD+0.4 V IGND GND terminal current 2000 mA fCLK Clock frequency 30 MHz Table 5. Thermal data Symbol Parameter Value Unit TOPR Operating temperature range -40 to 125 °C TSTG Storage temperature range -40 to 150 °C RthJA Thermal resistance junction-ambient (1) (2) 1. The exposed pad should be soldered directly to the PCB to realize the thermal benefits. 2. Packages tested on multi-layer (1S2P) JEDEC compliant test boards. 33 °C/W

Page 7

Electrical ratings STP24DP05 6/27 Doc ID 14714 Rev 5 2.3 Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Test conditions Min. Typ. Max. Unit VDD Supply voltage 3.0 5.5 V VO Output voltage 20 V IO Output current OUTn 5 80 mA IOH Output current Serial-OUT +10 mA IOL Output current Serial-OUT -10 mA VIH Input voltage 0.7 VDD VDD+0.3 V VIL Input voltage -0.3 0.3 VDD V twLAT LE pulse width VDD = 3.0 V to 5.0 V 15 ns twCLK CLK pulse width 15 ns twEN OE pulse width 150 ns tSETUP(D) Setup time for DATA 15 ns tHOLD(D) Hold time for DATA 5 ns tSETUP(L) Setup time for LATCH 10 ns fCLK Clock frequency Cascade operation (1) 1. If the device is connected in cascade, it may not be possible to achieve the maximum data transfer. Please consider the timings carefully. 25 MHz

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STP24DP05 Electrical characteristics Doc ID 14714 Rev 5 7/27 3 Electrical characteristics T = 25 °C, unless otherwise specified. Table 7. Electrical characteristics (VDD = 3.3 V to 5 V) Symbol Parameter Test conditions Min. Typ. Max. Unit VIH Input voltage high level 0.7 VDD VDD V VIL Input voltage low level GND 0.3 VDD V IOH Output leakage current VOH = 20 V 10 μA VOL Output voltage (Serial-OUT) IOL = 1 mA 0.4 V VOH Output voltage (Serial-OUT) IOH = -1 mA VDD-0.4 V V IOL1 Output current VO = 0.3 V, REXT = 2 kΩ, IO = 10 mA 10 mA IOL2 VO = 0.3 V, REXT = 1 kΩ, IO = 20 mA 20 mA IOL3 VO = 0.3 V, REXT = 250 Ω, IO = 80 mA 80 mA ΔIOL1 Output current error among the channels (All outputs ON) VO = 0.3 V, REXT = 2 kΩ, IO = 10 mA ± 2 ± 3 % ΔIOL2 VO = 0.3 V, REXT = 1 kΩ, IO = 20 mA ± 2 ± 3 % ΔIOL3 VO = 0.3 V, REXT = 250 Ω, IO = 80 mA ± 2 ± 3 % RSIN(up) Pull-up resistor 300 600 800 kΩ RSIN(down) Pull-down resistor 300 400 500 kΩ LE(up) DG(up) OE-R\ DM (up) OE-G (up) OE-B (up) DF0 DF1 Pull-up resistor 300 400 500 kΩ IDD(OFF1) Supply current (OFF) REXT = 1 kΩ OUT 0 to 15 = OFF 9 12 mA IDD(OFF2) REXT = 250 Ω OUT 0 to 15 = OFF 32 40 IDD(ON1) Supply current (ON) REXT = 1 kΩ OUT 0 to 15 = ON 13 18 IDD(ON2) REXT = 250 Ω OUT 0 to 15 = ON 35 40

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Electrical characteristics STP24DP05 8/27 Doc ID 14714 Rev 5 Thermal Thermal protection 170 °C VTF Output voltage 5 V ITF Output current VTF @ 1 V 20 mA VEF Output voltage 5 V IEF Output current VEF @ 1 V 20 mA Table 7. Electrical characteristics (VDD = 3.3 V to 5 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit Table 8. Switching characteristics (VDD = 3.3 V, 5 V) Symbol Parameter Test conditions Min. Typ. Max. Unit tPLH1 Propagation delay time, CLK-OUTn, LE = H, OE = L VIH = VDD VIL = GND CL = 10 pF IO = 20 mA VL = 3.0 V REXT = 1 kΩ RL = 60 Ω VDD = 3.3 V 62 100 ns VDD = 5 V 38 60 tPLH2 Propagation delay time, LE-OUTn, OE = L VDD = 3.3 V 67 107 ns VDD = 5 V 44 60 tPLH3 Propagation delay time, OE-OUTn, LE = H VDD = 3.3 V 65 83 ns VDD = 5 V 38 45 tPLH Propagation delay time, CLK-SDO VDD = 3.3 V 14 22 36 ns VDD = 5 V 9 14 23 tPHL1 Propagation delay time, CLK-OUTn, LE = H, OE = L VDD = 3.3 V 46 70 ns VDD = 5 V 39 50 tPHL2 Propagation delay time, LE-OUTn, OE = L VDD = 3.3 V 51 76 ns VDD = 5 V 46 55 tPHL3 Propagation delay time, OE-OUTn, LE = H VDD = 3.3 V 41 45 ns VDD = 5 V 33 39 tPHL Propagation delay time, CLK-SDO VDD = 3.3 V 15 24 38 ns VDD = 5 V 9 15 24 tON Output rise time 10~90% of voltage waveform VDD = 3.3 V 33 57 ns VDD = 5 V 17 27 tOFF Output fall time 90~10% of voltage waveform VDD = 3.3 V 24 34 ns VDD = 5 V 25 37 tr CLK rise time (1) 5000 ns tf CLK fall time (1) 5000 ns 1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.

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STP24DP05 Block diagram Doc ID 14714 Rev 5 9/27 4 Block diagram Figure 2. Block diagram

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