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TS922AIDT

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TS922AIDT

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Part Number TS922AIDT
Manufacturer STMicroelectronics
Description IC OPAMP GP 4MHZ RRO 8SO
Datasheet TS922AIDT Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 81,434 piece(s)
Unit Price $ 0.4508 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jul 14 - Jul 19 (Choose Expedited Shipping)
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Part Number # TS922AIDT (Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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TS922AIDT Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps
Datasheet TS922AIDTDatasheet
Package8-SOIC (0.154", 3.90mm Width)
Series-
Amplifier TypeGeneral Purpose
Number of Circuits2
Output TypeRail-to-Rail
Slew Rate1.3 V/µs
Gain Bandwidth Product4MHz
-3db Bandwidth-
Current - Input Bias15nA
Voltage - Input Offset900µV
Current - Supply2mA
Current - Output / Channel80mA
Voltage - Supply, Single/Dual (±)2.7 V ~ 12 V
Operating Temperature-40°C ~ 125°C
Mounting TypeSurface Mount
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SO

TS922AIDT Datasheet

Page 1

Page 2

TSSOP8 SO8 Flip-chip with backcoating Features • Rail-to-rail input and output • Low noise: 9 nV/√Hz • Low distortion • High output current: 80 mA (able to drive 32 Ω loads) • High-speed: 4 MHz, 1 V/μs • Operating from 2.7 to 12 V • Low input offset voltage: 900 μV max. (TS922A) • ESD internal protection: 2 kV • Latch-up immunity Applications • Line drivers and actuator drivers • Portable speakers • Instrumentation with low noise as key factor • Multimedia systems and portable equipments Description The TS922 and the TS922A devices are rail-to-rail dual BiCMOS operational amplifiers optimized and fully specified for 3 V and 5 V operations. These devices have high output currents which allow low-load impedances to be driven. Very low noise, low distortion, low offset, and a high output current capability make these devices an excellent choice for high quality, low voltage, or battery operated audio systems. The devices are stable for capacitive loads up to 500 pF. Product status link TS922 and TS922A Rail-to-rail, high output current, dual operational amplifier TS922, TS922A Datasheet DS1117 - Rev 13 - July 2018 For further information contact your local STMicroelectronics sales office. www.st.com

Page 3

1 Pin diagrams Figure 1. Pinout for Flip-chip package (top view) Figure 2. Pin connections for SO8 and TSSOP8 (top view) TS922, TS922A Pin diagrams DS1117 - Rev 13 page 2/18

Page 4

2 Absolute maximum ratings and operating conditions Table 1. Absolute maximum ratings (AMR) Symbol Parameter Value Unit VCC Supply voltage (1) 14 VVid Differential input voltage (2) ±1 Vin Input voltage (3) (VCC-) - 0.3 to (VCC+) + 0.3 Tstg Storage temperature -65 to 150 °C Tj Maximum junction temperature 150 — Soldering temperature (10 s), leaded version 250 — Soldering temperature (10 s), unleaded version 260 Rthja Thermal resistance junction-to-ambient (4) Flip-chip 90 °C/W SO8 125 TSSOP8 120 Rthjc Thermal resistance junction-to-case (4) SO8 40 TSSOP8 37 ESD HBM: human body model (5) 2000 VMM: machine model (6) 120 CDM: charged device model (7) 1500 — Latch-up immunity 200 mA — Output short-circuit duration See note (8) 1. All voltage values, except the differential voltage are with respect to network ground terminal. 2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1 V, the maximum input current must not exceed ±1 mA. In this case (Vid > ±1 V), an input series resistor must be added to limit the input current. 3. Do not exceed 14 V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short- circuits on all amplifiers. These values are typical. 5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of pin combinations with other pins floating. 7. Charged device model: all pins and plus package are charged together to the specified voltage and then discharged directly to ground. 8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause excessive heating. The maximum output current is approximately 80 mA, independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. Table 2. Operating conditions Symbol Parameter Value Unit VCC Supply voltage 2.7 to 12 V Vicm Common mode input voltage range (VCC-) - 0.2 to (VCC+) + 0.2 Toper Operating free air temperature range -40 to 125 °C TS922, TS922A Absolute maximum ratings and operating conditions DS1117 - Rev 13 page 3/18

Page 5

3 Electrical characteristics Table 3. Electrical characteristics measured at VCC = 3 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. Unit Vio Input offset voltage TS922 3 mV TS922A 0.9 TS922EIJT 1.5 Tmin ≤ Tamb ≤ Tmax, TS922 5 Tmin ≤ Tamb ≤ Tmax, TS922A 1.8 Tmin ≤ Tamb ≤ Tmax, TS922EIJT 2.5 ΔVio/ΔT Input offset voltage drift 2 μV/°C Iio Input offset current Vout = VCC/2 1 30 nA Tmin ≤ Tamb ≤ Tmax 30 Iib Input bias current Vout = VCC/2 15 100 Tmin ≤ Tamb ≤ Tmax 100 VOH High level output voltage RL= 10 kΩ 2.90 V Tmin ≤ Tamb ≤ Tmax 2.90 RL = 600 Ω 2.87 Tmin ≤ Tamb ≤ Tmax 2.87 RL = 32 Ω 2.63 VOL Low level output voltage RL= 10 kΩ 50 mV Tmin ≤ Tamb ≤ Tmax 50 RL = 600 Ω 100 Tmin ≤ Tamb ≤ Tmax 100 RL = 32 Ω 180 Avd Large signal voltage gain RL= 10 kΩ, Vout = 2 Vp - p 200 V/mV Tmin ≤ Tamb ≤ Tmax 70 RL = 600 Ω, Vout = 2 Vp - p 35 Tmin ≤ Tamb ≤ Tmax 15 RL = 32 Ω, Vout = 2 Vp - p 16 ICC Total supply current No load, Vout = VCC/2 2 3 mA Tmin ≤ Tamb ≤ Tmax 3.2 GBP Gain bandwidth product RL = 600 Ω 4 MHz CMR Common mode rejection ratio Vicm = 0 to 3 V 60 80 dB Tmin ≤ Tamb ≤ Tmax 56 SVR Supply voltage rejection ratio VCC = 2.7 to 3.3 V 60 85 dB Tmin ≤ Tamb ≤ Tmax 60 Io Output short-circuit current 50 80 mA TS922, TS922A Electrical characteristics DS1117 - Rev 13 page 4/18

Page 6

Symbol Parameter Test conditions Min. Typ. Max. Unit SR Slew rate 0.7 1.3 V/μs ɸm Phase margin at unit gain RL = 600 Ω, CL = 100 pF 68 Degrees Gm Gain margin RL = 600 Ω, CL = 100 pF 12 dB en Equivalent input noise voltage f = 1 kHz 9 nV/√Hz THD Total harmonic distortion Vout = 2 Vp - p , f = 1 kHz, Av = 1, RL = 600 Ω 0.005 % Cs Channel separation 120 dB Table 4. Electrical characteristics measured at VCC = 5 V, VCC- = 0 V, Vicm = VCC/2, Tamb = 25 °C, and RL connected to VCC/2 (unless otherwise specified) Symbol Parameter Conditions Min. Typ. Max. Unit Vio Input offset voltage TS922 3 mV TS922A 0.9 TS922EIJT 1.5 Tmin ≤ Tamb ≤ Tmax, TS922 5 Tmin ≤ Tamb ≤ Tmax, TS922A 1.8 Tmin ≤ Tamb ≤ Tmax, TS922EIJT 2.5 ΔVio/ΔT Input offset voltage drift 2 μV/°C Iio Input offset current Vout = VCC/2 1 30 nA Tmin ≤ Tamb ≤ Tmax 30 Iib Input bias current Vout = VCC/2 15 100 Tmin ≤ Tamb ≤ Tmax 100 VOH High level output voltage RL= 10 kΩ 4.9 V Tmin ≤ Tamb ≤ Tmax 4.9 RL = 600 Ω 4.85 Tmin ≤ Tamb ≤ Tmax 4.85 RL = 32 Ω 4.4 VOL Low level output voltage RL= 10 kΩ 50 mV Tmin ≤ Tamb ≤ Tmax 50 RL = 600 Ω 120 Tmin ≤ Tamb ≤ Tmax 120 RL = 32 Ω 300 Avd Large signal voltage gain RL= 10 kΩ, Vout = 2 Vp - p 200 V/mV Tmin ≤ Tamb ≤ Tmax 70 RL = 600 Ω, Vout = 2 Vp - p 35 Tmin ≤ Tamb ≤ Tmax 20 RL = 32 Ω, Vout = 2 Vp - p 16 Icc Total supply current No load, Vout = VCC/2 2 3 mA Tmin ≤ Tamb ≤ Tmax 3.2 TS922, TS922A Electrical characteristics DS1117 - Rev 13 page 5/18

Page 7

Symbol Parameter Conditions Min. Typ. Max. Unit GBP Gain bandwidth product RL = 600 Ω 4 MHz CMR Common mode rejection ratio Vicm = 0 to 5 V 60 80 dB Tmin ≤ Tamb ≤ Tmax 56 SVR Supply voltage rejection ratio VCC = 4.5 to 5.5 V 60 85 Tmin ≤ Tamb ≤ Tmax 60 Io Output short-circuit current 50 80 mA SR Slew rate 0.7 1.3 V/μs ɸm Phase margin at unit gain RL = 600 Ω, CL =100 pF 68 Degrees Gm Gain margin 12 dB en Equivalent input noise voltage f = 1 kHz 9 nV/√Hz THD Total harmonic distortion Vout = 2 Vp - p , f = 1 kHz, Av = 1, RL = 600 Ω 0.005 % Cs Channel separation 120 dB TS922, TS922A Electrical characteristics DS1117 - Rev 13 page 6/18

Page 8

4 Electrical characteristic curves Figure 3. Output short-circuit current vs. output voltage O u tp u t sh o rt -c ir cu it c u rr en t (m A ) Output voltage (V) VCC = 0/3 V Source Sink Figure 4. Total supply current vs. supply voltage S u p p ly c u rr en t (m A ) Supply voltage (V) Figure 5. Voltage gain and phase vs. frequency 1E+02 1E+03 1E+04 1E+05 1E+06 1E+07 1E+08 -20 0 20 40 60 -60 0 60 120 180 Frequency (Hz) G a in ( d B ) Phase CI = 100 pF RI = 10 kΩ Gain P h as e (d eg .) Figure 6. Equivalent input noise voltage vs. frequency 0.01 0.1 1 10 100 Frequency (kHz) 0 5 10 15 20 25 30 E q u iv al en t in p u t n o is e (n V /√ H z) VCC = ±1.5 V RL = 100 Ω Figure 7. THD + noise vs. frequency (RL = 2 kΩ, Vo = 10 Vpp, VCC = ± 6 V) 0.01 0.1 1 10 100 0 0.005 0.01 0.015 0.02 Frequency (kHz) T H D + n o is e ( % ) RL = 2 kΩ, Vo = 10 Vpp V CC = ±6 V, Av = 1 Figure 8. THD + noise vs. frequency (RL = 32 Ω, Vo = 4 Vpp, VCC = ± 2.5 V) 0.01 0.1 1 10 100 0 0.008 0.016 0.024 0.032 0.04 R = 32 Ω, Vo = 4 Vpp VCC = ±2.5 V, Av = 1 Frequency (kHz) T H D + n o is e ( % ) L TS922, TS922A Electrical characteristic curves DS1117 - Rev 13 page 7/18

Page 9

Figure 9. THD + noise vs. frequency (RL = 32 Ω, Vo = 2 Vpp, VCC = ± 1.5 V) 0.01 0.1 1 10 100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 Frequency (kHz) T H D + n o is e ( % ) R = 32 Ω, Vo = 2 Vpp VCC = ±1.5 V, Av = 10 L Figure 10. THD + noise vs. output voltage (RL = 600 Ω, f = 1 kHz, VCC = 0/3 V) 0 0,2 0,4 0,6 0,8 1 1,2 0,001 0,010 0,100 1,000 10,000 Vout (Vrms) T H D + n o is e ( % ) R = 600 Ω, f = 1 kHz VCC = 0/3 V, Av = 10 L Figure 11. THD + noise vs. output voltage (RL = 32 Ω, f = 1 kHz, VCC = ± 1.5 V) 0 0.2 0.4 0.6 0. 0.01 0.1 1 10 T H D + n o is e ( % ) Vout (Vrms) R = 32 Ω, f = 1 kHz VCC = ±1.5 V, Av = 1 L Figure 12. THD + noise vs. output voltage (RL = 2 kΩ, f = 1 kHz, VCC = ± 1.5 V) 0 0.2 0.4 0.6 0.8 1 1.2 0.001 0.01 0.1 1 10 T H D + n o is e ( % ) V out (Vrms) R = 2 kΩ, f = 1 kHz V CC = ±1.5 V, Av = -1 L Figure 13. Open loop gain and phase vs. frequency 1E+2 1E+3 1E+4 1E+5 1E+6 1E+7 1E+8 0 10 20 30 40 50 0 60 120 180 Frequency (Hz) G ai n ( d B ) P h as e (d eg .) CL = 500 pF TS922, TS922A Electrical characteristic curves DS1117 - Rev 13 page 8/18

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5 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.1 8-bump Flip-chip package information Figure 14. 8-bump Flip-chip package dimensions (top view) 1. Die size: 1600 µm x 1600 µm ±30 µm, Die height: 350 µm ±20 µm, die height (including bumps): 650 µm, bump diameter: 315 µm ±50 µm, bump height: 250 µm ±40 µm, pitch: 500 µm ±10 µm, backcoating. TS922, TS922A Package information DS1117 - Rev 13 page 9/18

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June 17, 2020

I tested some and all look good.

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June 13, 2020

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June 5, 2020

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June 1, 2020

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May 21, 2020

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May 16, 2020

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May 16, 2020

arrived well within time bracket, put this firm on my suppliers list, many thanks

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