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UC3844BD1013TR

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UC3844BD1013TR

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Part Number UC3844BD1013TR
Manufacturer STMicroelectronics
Description IC REG CTRLR BST FLYBK ISO 8SOIC
Datasheet UC3844BD1013TR Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 82,768 piece(s)
Unit Price $ 0.2886 *
Lead Time Can Ship Immediately
Estimated Delivery Time Dec 2 - Dec 7 (Choose Expedited Shipping)
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Part Number # UC3844BD1013TR (PMIC - AC DC Converters, Offline Switchers) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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UC3844BD1013TR Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - PMIC - AC DC Converters, Offline Switchers
Datasheet UC3844BD1013TRDatasheet
Package8-SOIC (0.154", 3.90mm Width)
Series-
Output IsolationIsolated
Internal Switch(s)No
Voltage - Breakdown-
TopologyForward
Voltage - Start Up16V
Voltage - Supply (Vcc/Vdd)10 V ~ 30 V
Duty Cycle48%
Frequency - SwitchingUp to 500kHz
Power (Watts)-
Fault ProtectionCurrent Limiting
Control FeaturesFrequency Control
Operating Temperature-40°C ~ 150°C (TJ)
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SO
Mounting TypeSurface Mount

UC3844BD1013TR Datasheet

Page 1

Page 2

UC2842B/3B/4B/5B UC3842B/3B/4B/5B March 1999 HIGH PERFORMANCE CURRENT MODE PWM CONTROLLER .TRIMMED OSCILLATOR FOR PRECISE FRE- QUENCY CONTROL.OSCILLATOR FREQUENCY GUARANTEED AT 250kHz.CURRENT MODE OPERATION TO 500kHz.AUTOMATIC FEED FORWARD COMPENSA- TION.LATCHING PWM FOR CYCLE-BY-CYCLE CURRENT LIMITING. INTERNALLY TRIMMED REFERENCE WITH UNDERVOLTAGE LOCKOUT.HIGH CURRENT TOTEM POLE OUTPUT.UNDERVOLTAGE LOCKOUT WITH HYSTER- ESIS.LOW START-UP AND OPERATING CURRENT DESCRIPTION The UC384xB family of control ICs provides the nec- essary features to implement off-line or DC to DC fixed frequency current mode control schemes with a minimal external parts count. Internally imple- mented circuits include a trimmed oscillator for pre- cise DUTY CYCLE CONTROL under voltage lock- out featuring start-up current less than 0.5mA, a pre- cision reference trimmed for accuracy at the error amp input, logic to insure latched operation, a PWM comparator which also provides current limit control, and a totem pole output stage designed to source or sink high peak current. The output stage, suitable for driving N-Channel MOSFETs, is low in the off- state. Differences between members of this family are the under-voltage lockout thresholds and maximum duty cycle ranges. The UC3842B and UC3844B have UVLO thresholds of 16V (on) and 10V (off), ideally suited off-line applications The corresponding thresh- olds for the UC3843B and UC3845B are 8.5 V and 7.9 V. The UC3842B and UC3843B can operate to duty cycles approaching 100%. A range of the zero to < 50 % is obtained by the UC3844B and UC3845B by the addition of an internal toggle flip flop which blanks the output off every other clock cycle. BLOCK DIAGRAM (toggle flip flop used only in UC3844B and UC3845B) UVLO S/R 5V REF 34V INTERNAL BIAS VREF GOOD LOGIC 2.50V T S R OSC R 1V CURRENT SENSE COMPARATOR 2R+ - PWM LATCH 7 5 4 2 1 3 8 6 ERROR AMP. Vi GROUND RT/CT VFB COMP CURRENT SENSE VREF 5V 50mA OUTPUT D95IN331 Minidip ® SO8 UC3842B 1/15

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* All voltages are with respect to pin 5, all currents are positive into the specified terminal. PIN CONNECTION (top view) COMP VFB ISENSE RT/CT GROUND OUTPUT Vi VREF1 3 2 4 6 5 7 8 D95IN332 Minidip/SO8 ORDERING NUMBERS SO8 Minidip UC2842BD1; UC3842BD1 UC2843BD1; UC3843BD1 UC2844BD1; UC3844BD1 UC2845BD1; UC3845BD1 UC2842BN; UC3842BN UC2843BN; UC3843BN UC2844BN; UC3844BN UC2845BN; UC3845BN ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit Vi Supply Voltage (low impedance source) 30 V Vi Supply Voltage (Ii < 30mA) Self Limiting IO Output Current ±1 A EO Output Energy (capacitive load) 5 µJ Analog Inputs (pins 2, 3) – 0.3 to 5.5 V Error Amplifier Output Sink Current 10 mA Ptot Power Dissipation at Tamb ≤ 25 °C (Minidip) 1.25 W Ptot Power Dissipation at Tamb ≤ 25 °C (SO8) 800 mW Tstg Storage Temperature Range – 65 to 150 °C TJ Junction Operating Temperature – 40 to 150 °C TL Lead Temperature (soldering 10s) 300 °C PIN FUNCTIONS No Function Description 1 COMP This pin is the Error Amplifier output and is made available for loop compensation. 2 VFB This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. 3 ISENSE A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. 4 RT/CT The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and cpacitor CT to ground. Operation to 500kHz is possible. 5 GROUND This pin is the combined control circuitry and power ground. 6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sunk by this pin. 7 VCC This pin is the positive supply of the control IC. 8 Vref This is the reference output. It provides charging current for capacitor CT through resistor RT. UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 2/15

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ELECTRICAL CHARACTERISTICS ( [note 1] Unless otherwise stated, these specifications apply for -25 < Tamb < 85°C for UC284XB; 0 < Tamb < 70°C for UC384XB; Vi = 15V (note 5); RT = 10K; CT = 3.3nF) Symbol Parameter Test Conditions UC284XB UC384XB Unit Min. Typ. Max. Min. Typ. Max. REFERENCE SECTION VREF Output Voltage Tj = 25°C Io = 1mA 4.95 5.00 5.05 4.90 5.00 5.10 V ∆VREF Line Regulation 12V ≤ Vi ≤ 25V 2 20 2 20 mV ∆VREF Load Regulation 1 ≤ Io ≤ 20mA 3 25 3 25 mV ∆VREF/∆T Temperature Stability (Note 2) 0.2 0.2 mV/°C Total Output Variation Line, Load, Temperature 4.9 5.1 4.82 5.18 V eN Output Noise Voltage 10Hz ≤ f ≤ 10KHz Tj = 25°C (note 2) 50 50 µV Long Term Stability Tamb = 125°C, 1000Hrs (note 2) 5 25 5 25 mV ISC Output Short Circuit -30 -100 -180 -30 -100 -180 mA OSCILLATOR SECTION fOSC Frequency Tj = 25°C TA = Tlow to Thigh TJ = 25°C (RT = 6.2k, CT = 1nF) 49 48 225 52 – 250 55 56 275 49 48 225 52 – 250 55 56 275 KHz KHz KHz ∆fOSC/∆V Frequency Change with Volt. VCC = 12V to 25V – 0.2 1 – 0.2 1 % ∆fOSC/∆T Frequency Change with Temp. TA = Tlow to Thigh – 1 – – 0.5 – % VOSC Oscillator Voltage Swing (peak to peak) – 1.6 – – 1.6 – V Idischg Discharge Current (VOSC =2V) TJ = 25°C TA = Tlow to Thigh 7.8 7.5 8.3 – 8.8 8.8 7.8 7.6 8.3 – 8.8 8.8 mA mA ERROR AMP SECTION V2 Input Voltage VPIN1 = 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V Ib Input Bias Current VFB = 5V -0.1 -1 -0.1 -2 µA AVOL 2V ≤ Vo ≤ 4V 65 90 65 90 dB BW Unity Gain Bandwidth TJ = 25°C 0.7 1 0.7 1 MHz PSRR Power Supply Rejec. Ratio 12V ≤ Vi ≤ 25V 60 70 60 70 dB Io Output Sink Current VPIN2 = 2.7V VPIN1 = 1.1V 2 12 2 12 mA Io Output Source Current VPIN2 = 2.3V VPIN1 = 5V -0.5 -1 -0.5 -1 mA VOUT High VPIN2 = 2.3V; RL = 15KΩ to Ground 5 6.2 5 6.2 V VOUT Low VPIN2 = 2.7V; RL = 15KΩ to Pin 8 0.8 1.1 0.8 1.1 V CURRENT SENSE SECTION GV Gain (note 3 & 4) 2.85 3 3.15 2.85 3 3.15 V/V V3 Maximum Input Signal VPIN1 = 5V (note 3) 0.9 1 1.1 0.9 1 1.1 V SVR Supply Voltage Rejection 12 ≤ Vi ≤ 25V (note 3) 70 70 dB Ib Input Bias Current -2 -10 -2 -10 µA Delay to Output 150 300 150 300 ns THERMAL DATA Symbol Description Minidip SO8 Unit Rth j-amb Thermal Resistance Junction-ambient. max. 100 150 °C/W UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 3/15

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Notes : 1. Max package power dissipation limits must be respected; low duty cycle pulse techniques are used during test maintain Tj as close to Tamb as possible. 2. These parameters, although guaranteed, are not 100% tested in production. 3. Parameter measured at trip point of latch with VPIN2 = 0. 4. Gain defined as : ∆ VPIN1 A = ; 0 ≤ VPIN3 ≤ 0.8 V ∆ VPIN3 5. Adjust Vi above the start threshold before setting at 15 V. ELECTRICAL CHARACTERISTICS (continued) Symbol Parameter Test Conditions UC284XB UC384XB Unit Min. Typ. Max. Min. Typ. Max. OUTPUT SECTION VOL Output Low Level ISINK = 20mA 0.1 0.4 0.1 0.4 V ISINK = 200mA 1.6 2.2 1.6 2.2 V VOH Output High Level ISOURCE = 20mA 13 13.5 13 13.5 V ISOURCE = 200mA 12 13.5 12 13.5 V VOLS UVLO Saturation VCC = 6V; ISINK = 1mA 0.1 1.1 0.1 1.1 V tr Rise Time Tj = 25°C CL = 1nF (2) 50 150 50 150 ns tf Fall Time Tj = 25°C CL = 1nF (2) 50 150 50 150 ns UNDER-VOLTAGE LOCKOUT SECTION Start Threshold X842B/4B 15 16 17 14.5 16 17.5 V X843B/5B 7.8 8.4 9.0 7.8 8.4 9.0 V Min Operating Voltage After Turn-on X842B/4B 9 10 11 8.5 10 11.5 V X843B/5B 7.0 7.6 8.2 7.0 7.6 8.2 V PWM SECTION Maximum Duty Cycle X842B/3B 94 96 100 94 96 100 % X844B/5B 47 48 50 47 48 50 % Minimum Duty Cycle 0 0 % TOTAL STANDBY CURRENT Ist Start-up Current Vi = 6.5V for UCX843B/45B 0.3 0.5 0.3 0.5 mA Vi = 14V for UCX842B/44B 0.3 0.5 0.3 0.5 mA Ii Operating Supply Current VPIN2 = VPIN3 = 0V 12 17 12 17 mA Viz Zener Voltage Ii = 25mA 30 36 30 36 V UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 4/15

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Figure 1: Open Loop Test Circuit. RT A2N2222 4.7KΩ 1KΩ ERROR AMP. ADJUST 4.7KΩ 5KΩ ISENSE ADJUST 100KΩ COMP VFB ISENSE RT/CT 1 2 3 4 CT 7 6 5 8 VREF Vi OUTPUT GROUND 0.1µF 0.1µF VREF Vi OUTPUT GROUND 1W 1KΩ D95IN343 High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The transistor and 5 KΩ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. 10K 20K 30K 50K 100K 200K 300K 500K fOSC(KHz) 1 2 5 10 20 50 D95IN333 CT=10nF CT=5nF CT=2nF C T=1nF C T=500pF C T=200pF C T=100pF Vi=15V TA=25˚C RT (KΩ) 0.8 Figure 2: Timing Resistor vs. Oscillator Fre- quency 10K 20K 30K 50K 100K 200K 300K 500K fOSC(KHz) 1 2 3 5 10 20 30 50 % CT=10nF CT=5nF CT=2nF CT=1nF CT=500pF CT=200pF CT=100pF D95IN334 Vi=15V TA=25˚C Figure 3: Output Dead-Time vs. Oscillator Fre- quency UC2842B UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 5/15

Page 7

-55 -25 0 25 50 75 100 TA(˚C) 7.0 7.5 8.0 8.5 Idischg (mA) D95IN335 Vi=15V VOSC=2V Figure 4: Oscillator Discharge Current vs. Tem- perature. 1 2 3 5 40 50 60 70 80 90 Dmax (%) 0.8 RT(KΩ) D95IN336 Vi=15V CT=3.3nF TA=25˚C Idischg=7.5mA Idischg=8.8mA Figure 5: Maximum Output Duty Cycle vs. Tim- ing Resistor. 10 100 1K 10K 100K 1M f(Hz) -20 0 20 40 60 80 (dB) 180 150 120 90 60 30 φD95IN337 Vi=15V VO=2V to 4V RL=100K TA=25˚C Gain Phase Figure 6: Error Amp Open-Loop Gain and Phase vs. Frequency. 0 2 4 6 VO(V) 0.0 0.2 0.4 0.6 0.8 1.0 Vth (V) D95IN338 Vi=15V TA=-40˚C TA=125˚C TA=25˚C Figure 7: Current Sense Input Threshold vs. Er- ror Amp Output Voltage. 0 20 40 60 80 100 Iref(mA) D95IN339 0 10 20 30 40 50 60 Vi=15V TA=-40˚C TA=125˚C T A = 2 5 ˚C Figure 8: Reference Voltage Change vs. Source Current. -55 -25 0 25 50 75 100 TA(˚C) D95IN340 50 60 70 80 90 100 ISC (mA) Vi=15V RL≤0.1Ω Figure 9: Reference Short Circuit Current vs. Temperature. UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 6/15

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0 200 400 600 IO(mA) 0 1 2 3 -2 -1 Vsat (V) D95IN341 Vi=15V 80µs Pulsed Load 120Hz Rate TA=-40˚CTA=25˚C Vi TA=-40˚C TA=25˚C GNDSink Saturation (Load to Vi) Source Saturation (Load to Ground) Figure 10: Output Saturation Voltagevs. Load Current. 0 10 20 30 Vi(V) 0 5 10 15 20 Ii (mA) U C X 8 4 3 /4 5 U C X 8 4 2 /4 4 RT=10K CT=3.3nF VFB=0V ISense=0V TA=25˚C D95IN342 Figure 11: Supply Current vs. Supply Voltage. Figure 12: Output Waveform. Figure 13: Output Cross Conduction 5V REG OSCILLATOR PWM CLOCK 8 4 5 6 RT CT GND OUTPUT 7 Vi ID CT OUTPUT LARGE RT/SMALL CT CT OUTPUT SMALL RT/LARGE CT D95IN344 Figure 14: Oscillator and Output Waveforms. Vi =15V CL = 1.0nF TA = 25°C 90% 10% 50ns/DIV Vi =30V CL = 15pF TA = 25°C VO ICC 100ns/DIV 100mA/DIV 20V/DIV UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 7/15

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Figure 15 : Error Amp Configuration. Zi Zf 1mA 2 1 VFB COMP 2.5V D95IN345 + - Figure 16 : Under Voltage Lockout. UC3842B UC3844B UC3843B UC3845B 16V 8.4V 10V 7.6V VON VOFF Vi ON/OFF COMMAND TO REST OF IC 7 <0.5mA <17mA ICC VCC VOFF VON D95IN346 Figure 17 : Current Sense Circuit . ERROR AMPL. 2R R 1V CURRENT SENSE COMPARATOR 1 CURRENT SENSE COMP CRS R 3 5 GND IS D95IN347 Peak current (is) is determined by the formula 1.0 V IS max ≈ RS A small RC filter may be required to suppress switch transients. During UVLO, the Output is low UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 8/15

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Figure 18 : Slope Compensation Techniques. RS R1 IS RSLOPE CT RT VREG 8 RT/CT ISENSE 4 3 5 GND RS R1 IS RSLOPE CT RT VREG 8 RT/CT ISENSE 4 3 5 GND D95IN348 Figure 19 : Isolated MOSFET Drive and Current Transformer Sensing. 7 6 COMP/LATCH ISOLATION BOUNDARY D95IN349 5.0Vref VCC + - + - Q S R + - 3 R RS NSC Vin Q1 NP VGS Waveforms + 0 + 0 -- 50% DC 25% DC Ipk = V(pin 1) -1.4 3RS NS NP ( ) UC3842B UC3842B UC2842B/3B/4B/5B - UC3842B/3B/4B/5B 9/15

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Excellent ! UC3844BD1013TR item arrived very quickly and was packaged well, no issues.

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