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VNS3NV04DP-E

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VNS3NV04DP-E

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Part Number VNS3NV04DP-E
Manufacturer STMicroelectronics
Description IC MOSFET OMNIFET 45V 8-SOIC
Datasheet VNS3NV04DP-E Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 223 piece(s)
Unit Price $ 0.8704 *
Lead Time Can Ship Immediately
Estimated Delivery Time Oct 23 - Oct 28 (Choose Expedited Shipping)
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Part Number # VNS3NV04DP-E (PMIC - Power Distribution Switches, Load Drivers) is manufactured by STMicroelectronics and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

For VNS3NV04DP-E specifications/configurations, quotation, lead time, payment terms of further enquiries please have no hesitation to contact us. To process your RFQ, please add VNS3NV04DP-E with quantity into BOM. Heisener.com does NOT require any registration to request a quote of VNS3NV04DP-E.

VNS3NV04DP-E Specifications

ManufacturerSTMicroelectronics
CategoryIntegrated Circuits (ICs) - PMIC - Power Distribution Switches, Load Drivers
Datasheet VNS3NV04DP-EDatasheet
Package8-SOIC (0.154", 3.90mm Width)
SeriesOMNIFET II?, VIPower?
Switch TypeGeneral Purpose
Number of Outputs2
Ratio - Input:Output1:1
Output ConfigurationLow Side
Output TypeN-Channel
InterfaceOn/Off
Voltage - Load36V (Max)
Voltage - Supply (Vcc/Vdd)Not Required
Current - Output (Max)3.5A
Rds On (Typ)120 mOhm (Max)
Input TypeNon-Inverting
Features-
Fault ProtectionCurrent Limiting (Fixed), Over Temperature, Over Voltage
Operating Temperature-40°C ~ 150°C (TJ)
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SO

VNS3NV04DP-E Datasheet

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September 2013 Doc ID 018529 Rev 2 1/21 1 VNS3NV04DP-E OMNIFET II fully autoprotected Power MOSFET Features ■ ECOPACK®: lead free and RoHS compliant ■ Automotive Grade: compliance with AEC guidelines ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET Description The VNS3NV04DP-E device is made up of two monolithic chips (OMNIFET II) housed in a standard SO-8 package. The OMNIFET II is designed using STMicroelectronics™ VIPower™ M0-3 technology and is intended for replacement of standard Power MOSFETs in up to 50 kHz DC applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring voltage at the input pin Max on-state resistance (per ch.) RON 120 mΩ Current limitation (typ) ILIMH 3.5 A Drain-source clamp voltage VCLAMP 40 V SO-8 Table 1. Device summary Package Order codes Tube Tape and reel SO-8 VNS3NV04DP-E VNS3NV04DPTR-E www.st.com

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Contents VNS3NV04DP-E 2/21 Doc ID 018529 Rev 2 Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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VNS3NV04DP-E List of tables Doc ID 018529 Rev 2 3/21 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 4. Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 6. Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 7. Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 8. Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 9. Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 10. SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 11. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

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List of figures VNS3NV04DP-E 4/21 Doc ID 018529 Rev 2 List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 4. Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 5. Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 6. Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 7. Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 8. Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 9. Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 10. Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 11. Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 12. Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 13. Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 14. Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 15. Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 16. Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 17. Turn-on current slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 18. Turn-on current slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 19. Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 20. Turn-off drain source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 21. Turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 22. Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 23. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 24. Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 25. Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 26. Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 27. Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 28. Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 29. Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 30. SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 31. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 32. Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

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VNS3NV04DP-E Block diagram and pin description Doc ID 018529 Rev 2 5/21 1 Block diagram and pin description Figure 1. Block diagram Figure 2. Configuration diagram (top view) SOURCE2 OVERVOLTAGE LINEAR DRAIN1 SOURCE1 CLAMP CURRENT LIMITER OVER TEMPERATURE GATE CONTROL DRAIN2 OVERVOLTAGE CLAMP LINEAR CURRENT LIMITER GATE CONTROL OVER TEMPERATURE INPUT2INPUT1 DRAIN 2 DRAIN 1 DRAIN 2 DRAIN 1 INPUT 2 SOURCE 1 SOURCE 2 INPUT 1 1 4 5 8

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Electrical specifications VNS3NV04DP-E 6/21 Doc ID 018529 Rev 2 2 Electrical specifications Figure 3. Current and voltage conventions 2.1 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. DRAIN 1INPUT 1 SOURCE 2 IIN1 VIN1 INPUT 2 IIN2 SOURCE 1 DRAIN 2 VIN2 ID2 ID1 VDS1 VDS1 RIN1 RIN2 Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDSn Drain-Source Voltage (VINn = 0 V) Internally clamped V VINn Input voltage Internally clamped V IINn Input current +/- 20 mA RIN MINn Minimum input series impedance 220 Ω IDn Drain current Internally limited A IRn Reverse DC output current -5.5 A VESD1 Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V VESD2 Electrostatic discharge on output pins only (R = 330 Ω, C = 150 pF) 16500 V Ptot Total dissipation at Tc = 25 °C 4 Ω Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C Tstg Storage temperature -55 to 150 °C

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VNS3NV04DP-E Electrical specifications Doc ID 018529 Rev 2 7/21 2.2 Thermal data 2.3 Electrical characteristics Values specified in this section are for -40 °C < Tj < 150 °C, unless otherwise stated. Tj = 25 °C, unless otherwise specified Table 3. Thermal data Symbol Parameter Max value Unit Rthj-lead Thermal resistance junction-lead (per channel) 30 °C/W Rthj-amb Thermal resistance junction-ambient 80 (1) 1. When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 μm thick) connected to all DRAIN pins of the relative channel °C/W Table 4. Off Symbol Parameter Test conditions Min Typ Max Unit VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 1.5 A 40 45 55 V VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 V VINTH Input threshold voltage VDS = VIN; ID = 1 mA 0.5 2.5 V IISS Supply current from input pin VDS = 0 V; VIN = 5 V 100 150 µA VINCL Input-source clamp voltage IIN = 1 mA 6 6.8 8 V IIN = -1 mA -1 -0.3 V IDSS Zero input voltage drain current (VIN = 0 V) VDS = 13 V; VIN = 0 V; Tj = 25 °C 30 µA VDS = 25 V; VIN = 0 V 75 µA Table 5. On Symbol Parameter Test conditions Min Typ Max Unit RDS(on) Static drain-source on resistance VIN = 5 V; ID = 1.5 A; Tj = 25 °C — — 120 mΩ VIN = 5 V; ID = 1.5 A — — 240 mΩ Table 6. Dynamic Symbol Parameter Test conditions Min Typ Max Unit gfs (1) Forward transconductance VDD = 13 V; ID = 1.5 A — 5.0 — S COSS Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V — 150 — pF

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Electrical specifications VNS3NV04DP-E 8/21 Doc ID 018529 Rev 2 -40 °C < Tj < 150 °C, unless otherwise specified Table 7. Switching Symbol Parameter Test conditions Min Typ Max Unit td(on) Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = RIN MIN = 220 Ω (see Figure 4) 90 300 ns tr Rise time 250 750 ns td(off) Turn-off delay time 450 1350 ns tf Fall time 250 750 ns td(on) Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = 2.2 KΩ (see Figure 4) 0.45 1.35 µs tr Rise time 2.5 7.5 µs td(off) Turn-off delay time 3.3 10.0 µs tf Fall time 2.0 6.0 µs (dI/dt)on Turn-on current slope VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = RIN MIN = 220 Ω 4.7 A/µs Qi Total input charge VDD = 12 V; ID = 1.5 A; VIN = 5 V; Igen = 2.13 mA (see Figure 7) 8.5 nC Table 8. Source drain diode Symbol Parameter Test conditions Min Typ Max Unit VSD (1) 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Forward on voltage ISD = 1.5 A; VIN = 0 V 0.8 V trr Reverse recovery time ISD = 1.5 A; dI/dt = 12 A/µs; VDD = 30 V; L = 200 µH (see Figure 5) 107 ns Qrr Reverse recovery charge 37 µC IRRM Reverse recovery current 0.7 A Table 9. Protections Symbol Parameter Test conditions Min Typ Max Unit Ilim Drain current limit VIN = 5 V; VDS = 13 V 3.5 5 7 A tdlim Step response current limit VIN = 5 V; VDS = 13 V 10 µs Tjsh Overtemperature shutdown 150 175 200 °C Tjrs Overtemperature reset 135 °C Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh 10 15 20 mA Eas Single pulse avalanche energy Starting Tj = 25 °C; VDD = 24 V; VIN = 5 V; Rgen = RIN MIN = 220 Ω; L = 24 mH (see Figure 6 and Figure 8) 100 mJ

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VNS3NV04DP-E Electrical specifications Doc ID 018529 Rev 2 9/21 Figure 4. Switching time test circuit for resistive load Figure 5. Test circuit for diode recovery times t ID 90% 10% t Vgen td(on) td(off) tftr Rgen Vgen VD L=100uH A B 8.5 Ω VDD Rgen FAST DIODEOMNIFET A D I S 220Ω B OMNIFET D S I Vgen

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