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X9313WSIT1

hot X9313WSIT1

X9313WSIT1

For Reference Only

Part Number X9313WSIT1
Manufacturer Intersil
Description IC XDCP 32-TAP 10K 3-WIRE 8-SOIC
Datasheet X9313WSIT1 Datasheet
Package 8-SOIC (0.154", 3.90mm Width)
In Stock 6198 piece(s)
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Lead Time Can Ship Immediately
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X9313WSIT1 Specifications

ManufacturerIntersil
CategoryIntegrated Circuits (ICs) - Data Acquisition - Digital Potentiometers
Datasheet X9313WSIT1 Datasheet
Package8-SOIC (0.154", 3.90mm Width)
SeriesXDCP?
TaperLinear
ConfigurationPotentiometer
Number of Circuits1
Number of Taps32
Resistance (Ohms)10k
InterfaceUp/Down (U/D, INC, CS)
Memory TypeNon-Volatile
Voltage - Supply5V
Tolerance±20%
Temperature Coefficient (Typ)±300 ppm/°C
Resistance - Wiper (Ohms) (Typ)40
Operating Temperature-40°C ~ 85°C
Package / Case8-SOIC (0.154", 3.90mm Width)
Supplier Device Package8-SOIC

X9313WSIT1 Datasheet

Page 1

Page 2

FN8177 Rev 7.00 October 7, 2015 X9313 Digitally Controlled Potentiometer (XDCP™) Linear, 32 Taps, 3 Wire Interface, Terminal Voltages ± VCC DATASHEETThe Intersil X9313 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface. The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. Between each element and at either end are tap points accessible to the wiper terminal. The position of the wiper element is controlled by the CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. The device can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including: • Control • Parameter adjustments • Signal processing Features • Solid-state potentiometer • 3-wire serial interface • 32 wiper tap points - Wiper position stored in nonvolatile memory and recalled on power-up • 31 resistive elements - Temperature compensated - End-to-end resistance range ±20% - Terminal voltages, -VCC to +VCC • Low power CMOS - VCC = 3V or 5V - Active current, 3mA max. - Standby current, 500µA max. • High reliability - Endurance, 100,000 data changes per bit - Register data retention, 100 years • RTOTAL values = 1k, 10k, 50k • Packages - 8 Ld SOIC, 8 Ld MSOP and 8 Ld PDIP • Pb-free available (RoHS compliant) Block Diagram 5-BIT NONVOLATILE MEMORY STORE AND RECALL CONTROL CIRCUITRY ONE OF OUTPUTS RESISTOR ARRAY RH/VHU/D INC CS TRANSFER GATES THIRTY-TWO VCC VSS RL/VL RW/VW CONTROL UP/DOWN VCC (SUPPLY VOLTAGE) VSS (GROUND) RH/VH RW/VW RL/VL GENERAL DETAILED 0 1 2 28 29 30 31 (U/D) INCREMENT (INC) DEVICE SELECT (CS) AND MEMORY 5-BIT UP/DOWN COUNTER TIME DECODER ACTIVE AT A FN8177 Rev 7.00 Page 1 of 12 October 7, 2015

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X9313Pin Descriptions RH/VH and RL/VL The high (RH/VH) and low (RL/VL) terminals of the X9313 are equivalent to the fixed terminals of a mechanical potentiometer. The terminology of RL/VL and RH/VH references the relative position of the terminal in relation to wiper movement direction selected by the U/D input and not the voltage potential on the terminal. RW/VW RW/VW is the wiper terminal and is equivalent to the movable terminal of a mechanical potentiometer. The position of the wiper within the array is determined by the control inputs. The wiper terminal series resistance is typically 40 at VCC = 5V. Up/Down (U/D) The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented. Increment (INC) The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D input. Ordering Information PART NUMBER PART MARKING VCC RANGE (V) RTOTAL (k) TEMPERATURE RANGE (°C) PACKAGE PKG. DWG. # X9313UMIZ* (Note) DDB 4.5 to 5.5 50 -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313USZ* (Note) X9313U Z 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313USIZ* (Note) X9313U ZI -40 to +85 8 Ld SOIC (Pb-free) M8.15 X9313WMZ* (Note) DDF 10 0 to +70 8 Ld MSOP (Pb-free) M8.118 X9313WMIZ* (Note) DDE -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313WPIZ X9313WP ZI -40 to +85 8 Ld PDIP*** (Pb-free) MDP0031 X9313WSZ* (Note) X9313W Z 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313WSIZ* (Note) X9313WS ZI -40 to +85 8 Ld SOIC (Pb-free) M8.15 X9313ZMZ* (Note) DDJ 1 0 to +70 8 Ld MSOP (Pb-free) M8.118 X9313ZMIZ* (Note) DDH -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313ZSZ* (Note) X9313 Z 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313ZSIZ* (Note) X9313ZS ZI -40 to +85 8 Ld SOIC (Pb-free) M8.15 X9313UMZ* (Note) DDC 3 to 5.5 50 0 to +70 8 Ld MSOP M8.118 X9313UMZ-3* (Note) DDD 3 to 5.5 50 0 to +70 8 Ld MSOP M8.118 X9313UMIZ-3* (Note) 13UEZ -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313USZ-3* (Note) X9313U ZD 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313WMZ-3* (Note) DDG 10 0 to +70 8 Ld MSOP (Pb-free) M8.118 X9313WMIZ-3* (Note) 13WEZ -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313WSZ-3* (Note) X9313W ZD 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313ZMZ-3* (Note) DDK 1 0 to +70 8 Ld MSOP (Pb-free) M8.118 X9313ZMIZ-3* (Note) 13ZEZ -40 to +85 8 Ld MSOP (Pb-free) M8.118 X9313ZSZ-3* (Note) X9313Z ZD 0 to +70 8 Ld SOIC (Pb-free) M8.15 X9313ZSIZ-3* (Note) X9313Z ZE -40 to +85 8 Ld SOIC (Pb-free) M8.15 NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. *Add “T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications. **Add "T2" suffix for tape and reel. Please refer to TB347 for details on reel specifications. ***Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.FN8177 Rev 7.00 Page 2 of 12 October 7, 2015

Page 4

X9313Chip Select (CS) The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X9313 will be placed in the low power standby mode until the device is selected once again. Principles of Operation There are three sections of the X9313: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions, the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the potential at that point to the wiper. The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme. The electronic switches on the device operate in a “make before break” mode when the wiper changes tap positions. If the wiper is moved several positions, multiple taps are connected to the wiper for tIW (INC to VW change). The RTOTAL value for the device can temporarily be reduced by a significant amount if the wiper is moved several positions. When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. Instructions and Programming The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS set LOW the device is selected and enabled to respond to the U/D and INC inputs. HIGH to LOW transitions on INC will increment or decrement (depending on the state of the U/D input) a seven bit counter. The output of this counter is decoded to select one of thirty-two wiper positions along the resistive array. The value of the counter is stored in nonvolatile memory whenever CS transitions HIGH while the INC input is also HIGH. The system may select the X9313, move the wiper and deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as previously described and once the new position is reached, the system must keep INC LOW while taking CS HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation, minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, etc. The state of U/D may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. Pinouts X9313 (8 LD PDIP, 8 LD SOIC) TOP VIEW X9313 (8 LD MSOP) TOP VIEW TABLE 1. PIN NAMES SYMBOL DESCRIPTION RH/VH High terminal RW/VW Wiper terminal RL/VL Low terminal VSS Ground VCC Supply voltage U/D Up/Down control input INC Increment control input CS Chip Select control input VCC CS INC U/D RH/VH VSS 1 2 3 4 8 7 6 5 X9313 RL/VL RW/VW VCC CS U/DRH/VH 1 2 3 4 8 7 6 5 X9313 RL/VL RW/VW INCVSS TABLE 2. MODE SELECTION CS INC U/D MODE L H Wiper up L L Wiper down H X Store wiper position H X X Standby current L X No store, return to standbyFN8177 Rev 7.00 Page 3 of 12 October 7, 2015

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X9313Symbol Table L H Wiper up (not recommended) L L Wiper down (not recommended) TABLE 2. MODE SELECTION CS INC U/D MODE WAVEFORM INPUTS OUTPUTS Must be steady Will be steady May change from Low to High Will change from Low to High May change from High to Low Will change from High to Low Don’t Care: Changes Allowed Changing: State Not Known N/A Center Line is High ImpedanceFN8177 Rev 7.00 Page 4 of 12 October 7, 2015

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X9313Absolute Maximum Ratings Recommended Operating Conditions Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Voltage on CS, INC, U/D, and VCC with Respect to VSS . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V Voltage on VH, VL, VW with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . -6V to +7V V = |VH - VL|: X9313Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4V X9313W, X9313U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.0kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .200V Temperature: Commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Supply Voltage (VCC): X9313 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10% X9313-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V Max Wiper current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4.4mA Power rating: RTOTAL  10k . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10mW RTOTAL 1k . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16mW Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. Potentiometer Characteristics Over recommended operating conditions, unless otherwise stated. SYMBOL PARAMETER TEST CONDITIONS LIMITS UNITMIN TYP MAX End-to-end Resistance Tolerance ±20 % VVH VH Terminal Voltage -VCC +VCC V VVL VL Terminal Voltage -VCC +VCC V RW Wiper Resistance IW = (VH - VL)/RTOTAL, VCC = 5V 40 100  IW Wiper Current ±4.4 mA Noise (Note 5) Ref: 1kHz -120 dBV Resolution 3 % Absolute Linearity (Note 1) RW(n)(actual) - RW(n)(expected) ±1 MI (Note 3) Relative Linearity (Note 2) RW(n+1) - (RW(n)+MI) ±0.2 MI (Note 3) RTOTAL Temperature Coefficient (Note 5) ±300 ppm/°C Ratiometric Temperature Coefficient (Note 5) ±20 ppm/°C CH/CL/CW (Note 5) Potentiometer Capacitances See Circuit #3 10/10/25 pF NOTES: 1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (VW(n)(actual) - VW(n)(expected)) = ±1 MI maximum. 2. Relative linearity is a measure of the error in step size between taps = RW(n+1) - (RW(n) + MI) = ±0.2 MI. 3. 1 MI = minimum increment = RTOT/31.FN8177 Rev 7.00 Page 5 of 12 October 7, 2015

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X9313DC Electrical Specifications Over recommended operating conditions, unless otherwise stated. SYMBOL PARAMETER TEST CONDITIONS/NOTES LIMITS UNITMIN TYP (Note 4) MAX ISB VCC Active Current CS = VIL, U/D = VIL or VIH and INC = 0.42/2.4V @ max tCYC 1 3 mA Standby Supply Current CS = VCC - 0.3V, U/D and INC = VSS or VCC - 0.3V 200 500 µA ILI CS, INC, U/D Input Leakage Current VIN = VSS to VCC ±10 µA VIH CS, INC, U/D Input HIGH Current 2 V VIL CS, INC, U/D Input LOW Current +0.8 V CIN (Note 5) CS, INC, U/D Input Capacitance VCC = 5V, VIN = VSS, TA = +25°C, f = 1MHz 10 pF Endurance and Data Retention PARAMETER MIN UNIT Minimum endurance 100,000 Data changes per bit per register Data retention 100 Years FIGURE 1. TEST CIRCUIT #1 FIGURE 2. TEST CIRCUIT #2 FIGURE 3. CIRCUIT #3 SPICE MACRO MODEL TEST POINT VW/RW VH/RH VL/RL VS FORCE CURRENT VW TEST POINT VH/RH /RW VL/RL CH CL RW 10pF 10pF RH RL RTOTAL CW 25pFFN8177 Rev 7.00 Page 6 of 12 October 7, 2015

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X9313Power-Up and Power-Down Requirements The recommended power-up sequence is to apply VCC/VSS first, then the potentiometer voltages. During power-up, the data sheet parameters for the DCP do not fully apply until 1ms after VCC reaches its final value. The VCC ramp specification is always in effect. In order to prevent unwanted tap position changes, or an inadvertent store, bring the CS and INC high before or concurrently with the VCC pin on power-up. AC Electrical Specifications Over recommended operating conditions, unless otherwise stated. SYMBOL PARAMETER LIMITS UNITMIN TYP (Note 4) MAX tCI CS to INC Setup 100 ns tID INC HIGH to U/D Change 100 ns tDI U/D to INC Setup 2.9 µs tIL INC LOW Period 1 µs tIH INC HIGH Period 1 µs tIC INC Inactive to CS Inactive 1 µs tCPH CS Deselect Time (STORE) 20 ms tCPH CS Deselect Time (NO STORE) 100 ns tIW INC to VW Change 5 µs tCYC INC Cycle Time 2 µs tR, tF (Note 5) INC Input Rise and Fall Time 500 µs tPU (Note 5) Power-up to Wiper Stable 10 µs tR VCC (Note 5) VCC Power-up Rate 0.2 50 V/ms tWR (Note 5) Store Cycle 10 ms NOTES: 4. Typical values are for TA = +25°C and nominal supply voltage. 5. This parameter is not 100% tested. CS INC U/D VW tCI tIL tIH tCYC tID tDI tIW MI (SEE NOTE) tIC tCPH tF tR 10% 90% 90% NOTE: MI IN THE AC TIMING DIAGRAM REFERS TO THE MINIMUM INCREMENTAL CHANGE IN THE VW OUTPUT DUE TO A CHANGE IN THE WIPER POSITION. FIGURE 4. AC TIMING DIAGRAMFN8177 Rev 7.00 Page 7 of 12 October 7, 2015

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X9313Applications Information Electronic digitally controlled potentiometers (XDCP) provide three powerful application advantages: 1. The variability and reliability of a solid-state potentiometer. 2. The flexibility of computer-based digital controls. 3. The retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data. Basic Configurations of Electronic Potentiometers Basic Circuits VR VW/RW VR I THREE-TERMINAL POTENTIOMETER; VARIABLE VOLTAGE DIVIDER TWO-TERMINAL VARIABLE RESISTOR; VARIABLE CURRENT VH VL CASCADING TECHNIQUESBUFFERED REFERENCE VOLTAGE – + +5V R1 +V -5V VW VREF VOUT OP-07 VW VW/RW +V +V +V X (a) (b) VOUT = VW/RW NONINVERTING AMPLIFIER + – VS VO R2 R1 VO = (1 + R2/R1)VS LM308A VOLTAGE REGULATOR R1 R2 Iadj VO (REG) = 1.25V (1 + R2/R1) + IADJ R2 VO (REG)VIN 317 OFFSET VOLTAGE ADJUSTMENT + – VS VO R2R1 100k 10k10k 10k -12V+12V TL072 COMPARATOR WITH HYSTERESIS VUL = [R1/(R1 + R2)] VO(max) VLL = [R1/(R1 + R2)] VO(min) + –VS VO R2R1 }} LT311A +5V -5V (FOR ADDITIONAL CIRCUITS SEE AN115)FN8177 Rev 7.00 Page 8 of 12 October 7, 2015

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X9313About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE October 7, 2015 FN8177.7 Added Revision History beginning with Rev 7. Added About Intersil Verbiage. Updated Ordering Information on page 2. DC Electrical Spec Table on page 6 - changed ICC for Parameter VCC Active Current to ISB Updated POD M8.118 to most current revision with changes as follows: Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36" Updated to new intersil format by adding land pattern and moving dimensions from table onto drawing. Updated POD M8.15 to most current revision with changes as follows: Changed Note 1 "1982" to "1994" Changed in Typical Recommended Land Pattern the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern.FN8177 Rev 7.00 Page 9 of 12 October 7, 2015

X9313WSIT1 Reviews

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Meil*****Lawson

December 20, 2019

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December 20, 2019

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November 15, 2019

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October 31, 2019

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October 20, 2019

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September 19, 2019

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May 3, 2019

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March 10, 2019

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March 3, 2019

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February 16, 2019

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