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XC17S40XLPD8C

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XC17S40XLPD8C

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Part Number XC17S40XLPD8C
Manufacturer Xilinx Inc.
Description IC PROM PROG C-TEMP 3.3V 8-DIP
Datasheet XC17S40XLPD8C Datasheet
Package 8-DIP (0.300", 7.62mm)
In Stock 2,542 piece(s)
Unit Price Request a Quote
Lead Time Can Ship Immediately
Estimated Delivery Time Jan 25 - Jan 30 (Choose Expedited Shipping)
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Part Number # XC17S40XLPD8C (Memory - Configuration Proms for FPGAs) is manufactured by Xilinx Inc. and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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XC17S40XLPD8C Specifications

ManufacturerXilinx Inc.
CategoryIntegrated Circuits (ICs) - Memory - Configuration Proms for FPGAs
Datasheet XC17S40XLPD8CDatasheet
Package8-DIP (0.300", 7.62mm)
Series-
Programmable TypeOTP
Memory Size400kb
Voltage - Supply3 V ~ 3.6 V
Operating Temperature0°C ~ 70°C
Package / Case8-DIP (0.300", 7.62mm)
Supplier Device Package8-PDIP

XC17S40XLPD8C Datasheet

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DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 1 © Copyright 1998-2008 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Features • Configuration one-time programmable (OTP) read-only memory designed to store configuration bitstreams for Spartan®, and Spartan-XL FPGAs • Simple interface to the Spartan device requires only one user I/O pin • Programmable reset polarity (active High or active Low) • Low-power CMOS floating-gate process • Available in 5V and 3.3V versions • Available in compact plastic 8-pin DIP, 8-pin VOIC, or 20-pin SOIC packages • Programming support by leading programmer manufacturers • Lead-free (RoHS-compliant) packaging available • Design support using the Xilinx® Alliance and Foundation™ series software packages • Guaranteed 20 year life data retention Introduction The Spartan family of PROMs provides an easy-to-use, cost-effective method for storing Spartan device configuration bitstreams. When the Spartan device is in Master Serial mode, it generates a configuration clock that drives the Spartan FPGA PROM. A short access time after the rising clock edge, data appears on the PROM DATA output pin that is connected to the Spartan device DIN pin. The Spartan device generates the appropriate number of clock pulses to complete the configuration. Once configured, it disables the PROM. When a Spartan device is in Slave Serial mode, the PROM and the Spartan device must both be clocked by an incoming signal. For device programming, either the Xilinx Alliance or the Foundation series development systems compiles the Spartan device design file into a standard HEX format which is then transferred to most commercial PROM programmers. X-Ref Target - Figure 0 Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 Product Specification R Spartan FPGA Configuration Bits Compatible Spartan PROM XCS05 53,984 XC17S05 XCS05XL 54,544 XC17S05XL XCS10 95,008 XC17S10 XCS10XL 95,752 XC17S10XL XCS20 178,144 XC17S20 XCS20XL 179,160 XC17S20XL XCS30 247,968 XC17S30 XCS30XL 249,168 XC17S30XL XCS40 329,312 XC17S40 XCS40XL 330,696 XC17S40XL XC2S50(1) 559,200 XC17S50XL XC2S100(1) 781,216 XC17S100XL XC2S150(1) 1,040,096 XC17S150XL Notes: 1. For new Spartan-II FPGA designs, it is recommended to use the 17S00A family. Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 2 R Pin Description Pins not listed are in Table 1 are "no connects." Pinout Diagrams Table 1: Spartan PROM Pinouts Pin Name 8-pin PDIP (PD8) and VOIC/TSOP (VO8) 20-pin SOIC (SO20) Pin Description DATA 1 1 Data output, High-Z state when either CE or OE are inactive. During programming, the DATA pin is I/O. Note that OE can be programmed to be either active High or active Low. CLK 2 3 Each rising edge on the CLK input increments the internal address counter, if both CE and OE are active. RESET/OE (OE/RESET) 3 8 When High, this input holds the address counter reset and puts the DATA output in a high-impedance state. The polarity of this input pin is programmable as either RESET/OE or OE/RESET. To avoid confusion, this document describes the pin as RESET/OE, although the opposite polarity is possible on all devices. When RESET is active, the address counter is held at zero, and the DATA output is in a high-impedance state. The polarity of this input is programmable. The default is active High RESET, but the preferred option is active Low RESET, because it can be driven by the FPGAs INIT pin. The polarity of this pin is controlled in the programmer interface. This input pin is easily inverted using the Xilinx HW-130 programmer software. Third-party programmers have different methods to invert this pin. CE 4 10 When High, this pin disables the internal address counter, puts the DATA output in a high-impedance state, and forces the device into low-ICC standby mode. GND 5 11 GND is the ground connection. VCC 7, 8 18, 20 The VCC pins are to be connected to the positive voltage supply. DS030_04_110102 SO20 Top View VCC NC VCC NC NC NC NC NC NC GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 DATA(D0) NC CLK NC NC NC NC OE/RESET NC CE DS030_05_060508 PD8/PDG8 SOG8 VO8/VOG8 Top View VCC VCC NC GND DATA(D0) CLK OE/RESET CE 8 7 6 5 1 2 3 4 Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 3 R Controlling PROMs Connecting the Spartan device with the PROM: • The DATA output of the PROM drives the DIN input of the lead Spartan device. • The Master Spartan device CCLK output drives the CLK input of the PROM. • The RESET/OE input of the PROM is driven by the INIT output of the Spartan device. This connection assures that the PROM address counter is reset before the start of any (re)configuration, even when a reconfiguration is initiated by a VCC glitch. Other methods—such as driving RESET/OE from LDC or system reset—assume that the PROM internal power- on-reset is always in step with the FPGAs internal power-on-reset, which is not a safe assumption. • The CE input of the PROM is driven by the DONE output of the Spartan device, provided that DONE is not permanently grounded. Otherwise, LDC can be used to drive CE, but must then be unconditionally High during user operation. CE can also be permanently tied Low, but this keeps the DATA output active and causes an unnecessary supply current of 10 mA maximum. FPGA Master Serial Mode Summary The I/O and logic functions of the Configurable Logic Block (CLB) and their associated interconnections are established by a configuration program. The program is loaded either automatically upon power up, or on command, depending on the state of the Spartan device MODE pin. In Master Serial mode, the Spartan device automatically loads the configuration program from an external memory. The Spartan FPGA PROM has been designed for compatibility with the Master Serial mode. Upon power-up or reconfiguration, the Spartan device enters the Master Serial mode when the MODE pin is Low. Data is read from the PROM sequentially on a single data line. Synchronization is provided by the rising edge of the temporary signal CCLK, which is generated during configuration. Master Serial mode provides a simple configuration interface (Figure 1, page 4). Only a serial data line and two control lines are required to configure the Spartan device. Data from the PROM is read sequentially, accessed via the internal address and bit counters which are incremented on every valid rising edge of CCLK. If the user-programmable, dual-function DIN pin on the Spartan device is used only for configuration, it must still be held at a defined level during normal operation. The Spartan family takes care of this automatically with an on- chip default pull-up resistor. Programming the FPGA With Counters Unchanged Upon Completion When multiple-configurations for a single Spartan device are stored in a PROM, the OE pin should be tied Low. Upon power-up, the internal address counters are reset and configuration begins with the first program stored in memory. Since the OE pin is held Low, the address counters are left unchanged after configuration is complete. Therefore, to reprogram the FPGA with another program, the DONE line is pulled Low and configuration begins at the last value of the address counters. This method fails if a user applies RESET during the Spartan device configuration process. The Spartan device aborts the configuration and then restarts a new configuration, as intended, but the PROM does not reset its address counter, since it never saw a High level on its OE input. The new configuration, therefore, reads the remaining data in the PROM and interprets it as preamble, length count etc. Since the Spartan device is the Master, it issues the necessary number of CCLK pulses, up to 16 million (224) and DONE goes High. However, the Spartan device configuration will be completely wrong, with potential contentions inside the Spartan device and on its output pins. This method must, therefore, never be used when there is any chance of external reset during configuration. Standby Mode The PROM enters a low-power standby mode whenever CE is asserted High. The output remains in a high-impedance state regardless of the state of the OE input. Programming the Spartan Family PROMs The devices can be programmed on programmers supplied by Xilinx or qualified third-party vendors. The user must ensure that the appropriate programming algorithm and the latest version of the programmer software are used. The wrong choice can permanently damage the device. Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 4 R Note: The one-time-programmable Spartan PROM supports automatic loading of configuration programs. An early DONE inhibits the PROM data output one CCLK cycle before the Spartan FPGA I/Os become active. X-Ref Target - Figure 1 Figure 1: Master Serial Mode DIN CCLK INIT DONE Spartan PROM DATA 3.3V CLK CE Spartan Master Serial (Low Resets the Address Pointer) DS030_01_101001 CCLK (Output) DIN DOUT (Output) OE/RESET MODE 4.7K VCC VCC VCC Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 5 R Caution! Always tie the two VCC pins together in the application. X-Ref Target - Figure 2 Figure 2: Simplified Block Diagram (Does not Show Programming Circuit) Table 2: Truth Table for XC17S00 Control Inputs Control Inputs Internal Address(2) Outputs RESET(1) CE DATA ICC Inactive Low If address < TC: increment If address > TC: don’t change Active High-Z Active Reduced Active Low Held reset High-Z Active Inactive High Not changing High-Z(3) Standby Active High Held reset High-Z(3) Standby Notes: 1. The XC17S00 RESET input has programmable polarity. 2. TC = Terminal Count = highest address value. TC + 1 = address 0. 3. Pull DATA pin to GND or VCC to meet ICCS standby current. EPROM Cell Matrix Address Counter CE DATA OEOutput CLK VCC GND DS030_02_011300 TC OE RESET/ OE/ RESET or Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 6 R XC17S05, XC17S10, XC17S20, XC17S30, XC17S40 Absolute Maximum Ratings(1) Operating Conditions(1) DC Characteristics Over Operating Condition Symbol Description Value Units VCC Supply voltage relative to GND –0.5 to +7.0 V VIN Input voltage relative to GND –0.5 to VCC +0.5 V VTS Voltage applied to High-Z output –0.5 to VCC +0.5 V TSTG Storage temperature (ambient) –65 to +150 °C TJ Junction temperature +125 °C Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time can affect device reliability. Symbol Description Conditions Min Max Units VCC Commercial Supply voltage relative to GND (TA = 0°C to +70°C) 4.75 5.25 V Industrial Supply voltage relative to GND (TA = –40°C to +85°C) 4.50 5.50 V Notes: 1. During normal read operation both VCC pins must be connected together. Symbol Description Min Max Units VIH High-level input voltage 2.0 VCC V VIL Low-level input voltage 0 0.8 V VOH High-level output voltage (IOH = –4 mA) Commercial 3.86 – V VOL Low-level output voltage (IOL = +4 mA) – 0.32 V VOH High-level output voltage (IOH = –4 mA) Industrial 3.76 – V VOL Low-level output voltage (IOL = +4 mA) – 0.37 V ICCA Supply current, active mode (at maximum frequency) XC17S05, XC17S10, XC17S20, XC17S30 10 mA XC17S40 – 20 mA ICCS Supply current, standby mode XC17S05, XC17S10, XC17S20, XC17S30 – 50(1) μA XC17S40 – 100(1) μA IL Input or output leakage current –10 10 μA CIN Input Capacitance (VIN = GND, f = 1.0 MHz) – 10 pF COUT Output Capacitance (VIN = GND, f = 1.0 MHz) – 10 pF Notes: 1. ICCS standby current is specified for DATA pin that is pulled to VCC or GND. Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 7 R XC17S05XL, XC17S10XL, XC17S20XL, XC17S30XL, XC17S40XL, XC17S50XL, XC17S100XL, XC17S150XL Absolute Maximum Ratings(1) Operating Conditions(1) DC Characteristics Over Operating Condition Symbol Description Value Units VCC Supply voltage relative to GND –0.5 to +4.0 V VIN Input voltage with respect to GND –0.5 to VCC +0.5 V VTS Voltage applied to High-Z output –0.5 to VCC +0.5 V TSTG Storage temperature (ambient) –65 to +150 °C Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time can affect device reliability. Symbol Description Min Max Units VCC Commercial Supply voltage relative to GND (TA = 0°C to +70°C) 3.0 3.6 V Industrial Supply voltage relative to GND (TA = –40°C to +85°C) 3.0 3.6 V Notes: 1. During normal read operation both VCC pins must be connected together. Symbol Description Min Max Units VIH High-level input voltage 2.0 VCC V VIL Low-level input voltage 0 0.8 V VOH High-level output voltage (IOH = –3 mA) 2.4 – V VOL Low-level output voltage (IOL = +3 mA) – 0.4 V ICCA Supply current, active mode (at maximum frequency) – 5 mA ICCS Supply current, standby mode – 50 (1) μA IL Input or output leakage current –10 10 μA CIN Input Capacitance (VIN = GND, f = 1.0 MHz) – 10 pF COUT Output Capacitance (VIN = GND, f = 1.0 MHz) – 10 pF Notes: 1. ICCS standby current is specified for DATA pin that is pulled to VCC or GND. Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 8 R AC Characteristics over Operating Condition(1) Symbol Description Min Max Units TOE RESET/OE to Data Delay – 45 ns TCE CE to Data Delay – 60 ns TCAC CLK to Data Delay – 80 ns TOH Data Hold From CE, RESET/OE, or CLK (2) 0 – ns TDF CE or RESET/OE to Data Float Delay (2,3) – 50 ns TCYC Clock Periods 100 – ns TLC CLK Low Time (2) 50 – ns THC CLK High Time (2) 50 – ns TSCE CE Setup Time to CLK (to guarantee proper counting) 25 – ns THCE CE Hold Time to CLK (to guarantee proper counting) 0 – ns THOE RESET/OE Hold Time (guarantees counters are reset) 25 – ns Notes: 1. AC test load = 50 pF. 2. Guaranteed by design, not tested. 3. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels. 4. All AC parameters are measured with VIL = 0.0V and VIH = 3.0V. RESET/OE CE CLK DATA TCE TOE TLC TSCE TSCE THCE THOE TCAC TOH TDF TOH THC DS0306_03_011300 TCYC Product Obsolete or Under Obsolescence

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Spartan/XL Family One-Time Programmable Configuration PROMs (XC17S00/XL) DS030 (v1.12) June 20, 2008 www.xilinx.com Product Specification 9 R Ordering Information Spartan 5V Valid Ordering Combinations (XC17S00) Spartan 3.3V Valid Ordering Combinations (XC17S00XL) XC17S05PD8C XC17S10PD8C XC17S20PD8C XC17S30PD8C XC17S40PD8C XC17S05VO8C XC17S10VO8C XC17S20VO8C XC17S30VO8C XC17S40SO20C XC17S05PD8I XC17S10VOG8C XC17S20PD8I XC17S30PD8I XC17S40PD8I XC17S05VO8I XC17S10PD8I XC17S20VO8I XC17S30VO8I XC17S40SO20I XC17S10VO8I XC17S30SOG8I XC17S05XLPD8C XC17S100XLPD8C XC17S20XLPD8C XC17S40XLPD8C XC17S05XLVO8C XC17S100XLSO20C XC17S20XLVO8C XC17S40XLPDG8C XC17S05XLPD8I XC17S100XLPD8I XC17S20XLVOG8C XC17S40XLSO20C XC17S05XLVO8I XC17S100XLSO20I XC17S20XLPD8I XC17S40XLPD8I XC17S10XLPD8C XC17S150XLPD8C XC17S20XLVO8I XC17S40XLSO20I XC17S10XLPDG8C XC17S150XLSO20C XC17S30XLPD8C XC17S50XLPD8C XC17S10XLVO8C XC17S150XLPD8I XC17S30XLPDG8C XC17S50XLSO20C XC17S10XLVOG8C XC17S150XLSO20I XC17S30XLVO8C XC17S50XLPD8I XC17S10XLPD8I XC17S30XLVOG8C XC17S50XLSO20I XC17S10XLVO8I XC17S30XLPD8I XC17S10XLVOG8I XC17S30XLVO8I XC17S30XLVOG8I XC17S20XL VO8 C Operating Range/Processing C = Commercial (TA = 0°C to +70°C) I = Industrial (TA = –40°C to +85°C) Package Type(1) PD8/PDG08 = 8-pin Plastic DIP VO8/VOG8 = 8-pin Plastic Small-Outline Thin Package SOG8 = 8-pin Plastic Small-Outline Package SO20 = 20-pin Plastic Small-Outline Package Device Number XC17S05 XC17S05XL XC17S10 XC17S10XL XC17S20 XC17S20XL XC17S30 XC17S30XL XC17S40 XC17S40XL XC17S50XL XC17S100XL XC17S150XL Notes: 1. G in the package-type codes designates Lead-free packaging. Product Obsolete or Under Obsolescence

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December 25, 2020

Always have what I need, fast and easy for making an order, fast shipping and great service! That about covers it! Many Thanks!

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December 16, 2020

I took the chance and used it and I worked fine for me.

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December 2, 2020

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November 28, 2020

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November 27, 2020

Best organized online supplier, excellent service personnel.

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