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XC6SLX150-3FGG676I

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XC6SLX150-3FGG676I

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Part Number XC6SLX150-3FGG676I
Manufacturer Xilinx Inc.
Description IC FPGA 498 I/O 676FBGA
Datasheet XC6SLX150-3FGG676I Datasheet
Package 676-BGA
In Stock 308 piece(s)
Unit Price $ 240.5000 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jan 24 - Jan 29 (Choose Expedited Shipping)
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Part Number # XC6SLX150-3FGG676I (Embedded - FPGAs (Field Programmable Gate Array)) is manufactured by Xilinx Inc. and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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XC6SLX150-3FGG676I Specifications

ManufacturerXilinx Inc.
CategoryIntegrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array)
Datasheet XC6SLX150-3FGG676IDatasheet
Package676-BGA
SeriesSpartan?-6 LX
Number of LABs/CLBs11519
Number of Logic Elements/Cells147443
Total RAM Bits4939776
Number of I/O498
Number of Gates-
Voltage - Supply1.14 V ~ 1.26 V
Mounting TypeSurface Mount
Operating Temperature-40°C ~ 100°C (TJ)
Package / Case676-BGA
Supplier Device Package676-FBGA (27x27)

XC6SLX150-3FGG676I Datasheet

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DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 1 © 2009–2015 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Zynq, Artix, Kintex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective owners. Spartan-6 FPGA Electrical Characteristics Spartan®-6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and AC electrical parameters of the Automotive XA Spartan-6 FPGAs and Defense-grade Spartan-6Q FPGAs devices are equivalent to the commercial specifications except where noted. The timing characteristics of the commercial (XC) -2 speed grade industrial device are the same as for a -2 speed grade commercial device. The -2Q and -3Q speed grades are exclusively for the expanded (Q) temperature range. The timing characteristics are equivalent to those shown for the -2 and -3 speed grades for the Automotive and Defense-grade devices. Spartan-6 FPGA DC and AC characteristics are specified for commercial (C), industrial (I), and expanded (Q) temperature ranges. Only selected speed grades and/or devices might be available in the industrial or expanded temperature ranges for Automotive and Defense-grade devices. References to device names refer to all available variations of that part number (for example, LX75 could denote XC6SLX75, XA6SLX75, or XQ6SLX75). The Spartan-6 FPGA -3N speed grade designates devices that do not support MCB functionality. All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters included are common to popular designs and typical applications. Available device and package combinations can be found at: • DS160: Spartan-6 Family Overview • DS170: Automotive XA Spartan-6 Family Overview • DS172: Defense-Grade Spartan-6Q Family Overview This Spartan-6 FPGA data sheet, part of an overall set of documentation on the Spartan-6 family of FPGAs, is available on the Xilinx website at http://www.xilinx.com/support/documentation/spartan-6.htm. Spartan-6 FPGA DC Characteristics 89 Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 Product Specification Table 1: Absolute Maximum Ratings(1) Symbol Description Units VCCINT Internal supply voltage relative to GND –0.5 to 1.32 V VCCAUX Auxiliary supply voltage relative to GND –0.5 to 3.75 V VCCO Output drivers supply voltage relative to GND –0.5 to 3.75 V VBATT Key memory battery backup supply (LX75, LX75T, LX100, LX100T, LX150, and LX150T only) –0.5 to 4.05 V VFS External voltage supply for eFUSE programming (LX75, LX75T, LX100, LX100T, LX150, and LX150T only)(2) –0.5 to 3.75 V VREF Input reference voltage –0.5 to 3.75 V

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 2 VIN and VTS (3) I/O input voltage or voltage applied to 3-state output, relative to GND(4) All user and dedicated I/Os Commercial DC –0.60 to 4.10 V 20% overshoot duration –0.75 to 4.25 V 8% overshoot duration(5) –0.75 to 4.40 V Industrial DC –0.60 to 3.95 V 20% overshoot duration –0.75 to 4.15 V 4% overshoot duration(5) –0.75 to 4.40 V Expanded (Q) DC –0.60 to 3.95 V 20% overshoot duration –0.75 to 4.15 V 4% overshoot duration(5) –0.75 to 4.40 V Restricted to maximum of 100 user I/Os Commercial 20% overshoot duration –0.75 to 4.35 V 15% overshoot duration(5) –0.75 to 4.40 V 10% overshoot duration –0.75 to 4.45 V Industrial 20% overshoot duration –0.75 to 4.25 V 10% overshoot duration –0.75 to 4.35 V 8% overshoot duration(5) –0.75 to 4.40 V Expanded (Q) 20% overshoot duration –0.75 to 4.25 V 10% overshoot duration –0.75 to 4.35 V 8% overshoot duration(5) –0.75 to 4.40 V TSTG Storage temperature (ambient) –65 to 150 °C TSOL Maximum soldering temperature(6) (TQG144, CPG196, CSG225, CSG324, CSG484, and FTG256) +260 °C Maximum soldering temperature(6) (Pb-free packages: FGG484, FGG676, and FGG900) +250 °C Maximum soldering temperature(6) (Pb packages: CS484, FT256, FG484, FG676, and FG900) +220 °C Tj Maximum junction temperature (6) +125 °C Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied. Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability. 2. When programming eFUSE, VFS ≤ VCCAUX. Requires up to 40 mA current. For read mode, VFS can be between GND and 3.45 V. 3. I/O absolute maximum limit applied to DC and AC signals. Overshoot duration is the percentage of a data period that the I/O is stressed beyond 3.45V. 4. For I/O operation, refer to UG381: Spartan-6 FPGA SelectIO Resources User Guide. 5. Maximum percent overshoot duration to meet 4.40V maximum. 6. TSOL is the maximum soldering temperature for component bodies. For soldering guidelines and thermal considerations, see UG385: Spartan-6 FPGA Packaging and Pinout Specification. Table 1: Absolute Maximum Ratings(1) (Cont’d) Symbol Description Units

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 3 Table 2: Recommended Operating Conditions(1) Symbol Description Min Typ Max Units VCCINT Internal supply voltage relative to GND -3, -3N, -2 Standard performance(2) 1.14 1.2 1.26 V -3, -2 Extended performance(2) 1.2 1.23 1.26 V -1L Standard performance(2) 0.95 1.0 1.05 V VCCAUX (3)(4) Auxiliary supply voltage relative to GND VCCAUX = 2.5V (5) 2.375 2.5 2.625 V VCCAUX = 3.3V 3.15 3.3 3.45 V VCCO (6)(7)(8) Output supply voltage relative to GND 1.1 – 3.45 V VIN Input voltage relative to GND All I/O standards (except PCI) Commercial temperature (C) –0.5 – 4.0 V Industrial temperature (I) –0.5 – 3.95 V Expanded (Q) temperature –0.5 – 3.95 V PCI I/O standard(9) –0.5 – VCCO + 0.5 V IIN (10) Maximum current through pin using PCI I/O standard when forward biasing the clamp diode.(9) Commercial (C) and Industrial temperature (I) – – 10 mA Expanded (Q) temperature – – 7 mA Maximum current through pin when forward biasing the ground clamp diode. – – 10 mA VBATT (11) Battery voltage relative to GND, Tj = 0°C to +85°C (LX75, LX75T, LX100, LX100T, LX150, and LX150T only) 1.0 – 3.6 V Tj Junction temperature operating range Commercial (C) range 0 – 85 °C Industrial temperature (I) range –40 – 100 °C Expanded (Q) temperature range –40 – 125 °C Notes: 1. All voltages are relative to ground. 2. See Interface Performances for Memory Interfaces in Table 25. The extended performance range is specified for designs not using the standard VCCINT voltage range. The standard VCCINT voltage range is used for: • Designs that do not use an MCB • LX4 devices • Devices in the TQG144 or CPG196 packages • Devices with the -3N speed grade 3. Recommended maximum voltage droop for VCCAUX is 10 mV/ms. 4. During configuration, if VCCO_2 is 1.8V, then VCCAUX must be 2.5V. 5. The -1L devices require VCCAUX = 2.5V when using the LVDS_25, LVDS_33, BLVDS_25, LVPECL_25, RSDS_25, RSDS_33, PPDS_25, and PPDS_33 I/O standards on inputs. LVPECL_33 is not supported in the -1L devices. 6. Configuration data is retained even if VCCO drops to 0V. 7. Includes VCCO of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V. 8. For PCI systems, the transmitter and receiver should have common supplies for VCCO. 9. Devices with a -1L speed grade do not support Xilinx PCI IP. 10. Do not exceed a total of 100 mA per bank. 11. VBATT is required to maintain the battery backed RAM (BBR) AES key when VCCAUX is not applied. Once VCCAUX is applied, VBATT can be unconnected. When BBR is not used, Xilinx recommends connecting to VCCAUX or GND. However, VBATT can be unconnected.

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 4 Table 3: eFUSE Programming Conditions(1) Symbol Description Min Typ Max Units VFS (2) External voltage supply 3.2 3.3 3.4 V IFS VFS supply current – – 40 mA VCCAUX Auxiliary supply voltage relative to GND 3.2 3.3 3.45 V RFUSE (3) External resistor from RFUSE pin to GND 1129 1140 1151 Ω VCCINT Internal supply voltage relative to GND 1.14 1.2 1.26 V tj Temperature range 15 – 85 °C Notes: 1. These specifications apply during programming of the eFUSE AES key. Programming is only supported through JTAG.The AES key is only supported in the following devices: LX75, LX75T, LX100, LX100T, LX150, and LX150T. 2. When programming eFUSE, VFS must be less than or equal to VCCAUX. When not programming or when eFUSE is not used, Xilinx recommends connecting VFS to GND. However, VFS can be between GND and 3.45 V. 3. An RFUSE resistor is required when programming the eFUSE AES key. When not programming or when eFUSE is not used, Xilinx recommends connecting the RFUSE pin to VCCAUX or GND. However, RFUSE can be unconnected.

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 5 Table 4: DC Characteristics Over Recommended Operating Conditions Symbol Description Min Typ Max Units VDRINT Data retention VCCINT voltage (below which configuration data might be lost) 0.8 – – V VDRAUX Data retention VCCAUX voltage (below which configuration data might be lost) 2.0 – – V IREF VREF leakage current per pin for commercial (C) and industrial (I) devices –10 – 10 µA VREF leakage current per pin for expanded (Q) devices –15 – 15 µA IL Input or output leakage current per pin (sample-tested) for commercial (C) and industrial (I) devices –10 – 10 µA Input or output leakage current per pin (sample-tested) for expanded (Q) devices –15 – 15 µA IHS Leakage current on pins during hot socketing with FPGA unpowered All pins except PROGRAM_B, DONE, and JTAG pins when HSWAPEN = 1 –20 – 20 µA PROGRAM_B, DONE, and JTAG pins, or other pins when HSWAPEN = 0 IHS(HSWAPEN = 1) + IRPU µA CIN (1) Die input capacitance at the pad – – 10 pF IRPU Pad pull-up (when selected) @ VIN = 0V, VCCO = 3.3V or VCCAUX = 3.3V 200 – 500 µA Pad pull-up (when selected) @ VIN = 0V, VCCO = 2.5V or VCCAUX = 2.5V 120 – 350 µA Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.8V 60 – 200 µA Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.5V 40 – 150 µA Pad pull-up (when selected) @ VIN = 0V, VCCO = 1.2V 12 – 100 µA IRPD Pad pull-down (when selected) @ VIN = VCCO, VCCAUX = 3.3V 200 – 550 µA Pad pull-down (when selected) @ VIN = VCCO, VCCAUX = 2.5V 140 – 400 µA IBATT (2) Battery supply current – – 150 nA RDT (3) Resistance of optional input differential termination circuit, VCCAUX = 3.3V – 100 – Ω RIN_TERM (5) Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_25) for commercial (C) and industrial (I) devices 23 25 55 Ω Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_25) for expanded (Q) devices 20 25 55 Ω Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_50) for commercial (C) and industrial (I) devices 39 50 72 Ω Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_50) for expanded (Q) devices 32 50 74 Ω Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_75) for commercial (C) and industrial (I) devices 56 75 109 Ω Thevenin equivalent resistance of programmable input termination to VCCO (UNTUNED_SPLIT_75) for expanded (Q) devices 47 75 115 Ω ROUT_TERM Thevenin equivalent resistance of programmable output termination (UNTUNED_25) 11 25 52 Ω Thevenin equivalent resistance of programmable output termination (UNTUNED_50) 21 50 96 Ω Thevenin equivalent resistance of programmable output termination (UNTUNED_75) 29 75 145 Ω Notes: 1. The CIN measurement represents the die capacitance at the pad, not including the package. 2. Maximum value specified for worst case process at 25°C. LX75, LX75T, LX100, LX100T, LX150, and LX150T only. 3. Refer to IBIS models for RDT variation and for values at VCCAUX = 2.5V. IBIS values for RDT are valid for all temperature ranges. 4. VCCO2 is not required for data retention. The minimum VCCO2 for power-on reset and configuration is 1.65V. 5. Termination resistance to a VCCO/2 level.

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 6 Quiescent Current Typical values for quiescent supply current are specified at nominal voltage, 25°C junction temperatures (Tj). Quiescent supply current is specified by speed grade for Spartan-6 devices. Xilinx recommends analyzing static power consumption using the Xilinx Power Estimator (XPE) tool (download at http://www.xilinx.com/power) for conditions other than those specified in Table 5. Table 5: Typical Quiescent Supply Current Symbol Description Device Speed Grade Units -3 -3N -2 -1L ICCINTQ Quiescent VCCINT supply current LX4 4.0 4.0 4.0 2.4 mA LX9 4.0 4.0 4.0 2.4 mA LX16 6.0 6.0 6.0 4.0 mA LX25 11.0 11.0 11.0 6.6 mA LX25T 11.0 11.0 11.0 N/A mA LX45 15.0 15.0 15.0 9.0 mA LX45T 15.0 15.0 15.0 N/A mA LX75 29.0 29.0 29.0 17.4 mA LX75T 29.0 29.0 29.0 N/A mA LX100 36.0 36.0 36.0 21.6 mA LX100T 36.0 36.0 36.0 N/A mA LX150 51.0 51.0 51.0 31.0 mA LX150T 51.0 51.0 51.0 N/A mA ICCOQ Quiescent VCCO supply current LX4 1.0 1.0 1.0 1.0 mA LX9 1.0 1.0 1.0 1.0 mA LX16 2.0 2.0 2.0 2.0 mA LX25 2.0 2.0 2.0 2.0 mA LX25T 2.0 2.0 2.0 N/A mA LX45 3.0 3.0 3.0 3.0 mA LX45T 3.0 3.0 3.0 N/A mA LX75 4.0 4.0 4.0 4.0 mA LX75T 4.0 4.0 4.0 N/A mA LX100 5.0 5.0 5.0 5.0 mA LX100T 5.0 5.0 5.0 N/A mA LX150 7.0 7.0 7.0 7.0 mA LX150T 7.0 7.0 7.0 N/A mA

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 7 ICCAUXQ Quiescent VCCAUX supply current LX4 2.5 2.5 2.5 2.5 mA LX9 2.5 2.5 2.5 2.5 mA LX16 3.0 3.0 3.0 3.0 mA LX25 4.0 4.0 4.0 4.0 mA LX25T 4.0 4.0 4.0 N/A mA LX45 5.0 5.0 5.0 5.0 mA LX45T 5.0 5.0 5.0 N/A mA LX75 7.0 7.0 7.0 7.0 mA LX75T 7.0 7.0 7.0 N/A mA LX100 9.0 9.0 9.0 9.0 mA LX100T 9.0 9.0 9.0 N/A mA LX150 12.0 12.0 12.0 12.0 mA LX150T 12.0 12.0 12.0 N/A mA Notes: 1. Typical values are specified at nominal voltage, 25°C junction temperatures (Tj). Industrial (I) grade devices have the same typical values as commercial (C) grade devices at 25°C, but higher values at 100°C. Use the XPE tool to calculate 100°C values. Nominal VCCINT is 1.20V; use the XPE tool to calculate 1.23V values for the nominal VCCINT of the extended performance range. 2. Typical values are for blank configured devices with no output current loads, no active input pull-up resistors, all I/O pins are 3-state and floating. 3. If differential signaling is used, more accurate quiescent current estimates can be obtained by using the Xilinx Power Estimator (XPE) or Xilinx Power Analyzer (XPA) tools. Table 6: Power Supply Ramp Time Symbol Description Speed Grade Ramp Time Units VCCINTR Internal supply voltage ramp time -3, -3N, -2 0.20 to 50.0 ms -1L 0.20 to 40.0 ms VCCO2 (1) Output drivers bank 2 supply voltage ramp time All 0.20 to 50.0 ms VCCAUXR Auxiliary supply voltage ramp time All 0.20 to 50.0 ms Notes: 1. The minimum VCCO2 for power-on reset and configuration is 1.65V. 2. Spartan-6 FPGAs require a certain amount of supply current during power-on to insure proper device initialization. The actual current consumed depends on the power-on ramp rate of the power supply. Use the Xilinx Power Estimator (XPE) or Xilinx Power Analyzer (XPA) tools to estimate current drain on these supplies. Spartan-6 devices do not have a required power-on sequence. Table 5: Typical Quiescent Supply Current (Cont’d) Symbol Description Device Speed Grade Units -3 -3N -2 -1L

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 8 SelectIO™ Interface DC Input and Output Levels Table 7: Recommended Operating Conditions for User I/Os Using Single-Ended Standards I/O Standard VCCO for Drivers (1) VREF for Inputs V, Min V, Nom V, Max V, Min V, Nom V, Max LVTTL 3.0 3.3 3.45 VREF is not used for these I/O standards LVCMOS33 3.0 3.3 3.45 LVCMOS25 2.3 2.5 2.7 LVCMOS18 1.65 1.8 1.95 LVCMOS18_JEDEC 1.65 1.8 1.95 LVCMOS15 1.4 1.5 1.6 LVCMOS15_JEDEC 1.4 1.5 1.6 LVCMOS12 1.1 1.2 1.3 LVCMOS12_JEDEC 1.1 1.2 1.3 PCI33_3(2) 3.0 3.3 3.45 PCI66_3(2) 3.0 3.3 3.45 I2C 2.7 3.0 3.45 SMBUS 2.7 3.0 3.45 SDIO 3.0 3.3 3.45 MOBILE_DDR 1.7 1.8 1.9 HSTL_I 1.4 1.5 1.6 0.68 0.75 0.9 HSTL_II 1.4 1.5 1.6 0.68 0.75 0.9 HSTL_III 1.4 1.5 1.6 – 0.9 – HSTL_I_18 1.7 1.8 1.9 0.8 0.9 1.1 HSTL_II_18 1.7 1.8 1.9 – 0.9 – HSTL_III_18 1.7 1.8 1.9 – 1.1 – SSTL3_I 3.0 3.3 3.45 1.3 1.5 1.7 SSTL3_II 3.0 3.3 3.45 1.3 1.5 1.7 SSTL2_I 2.3 2.5 2.7 1.13 1.25 1.38 SSTL2_II 2.3 2.5 2.7 1.13 1.25 1.38 SSTL18_I 1.7 1.8 1.9 0.833 0.9 0.969 SSTL18_II 1.7 1.8 1.9 0.833 0.9 0.969 SSTL15_II 1.425 1.5 1.575 0.69 0.75 0.81 Notes: 1. VCCO range required when using I/O standard for an output. Also required for MOBILE_DDR, PCI33_3, LVCMOS18_JEDEC, LVCMOS15_JEDEC, and LVCMOS12_JEDEC inputs, and for LVCMOS25 inputs when VCCAUX = 3.3V. 2. For PCI systems, the transmitter and receiver should have common supplies for VCCO.

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Spartan-6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v3.1.1) January 30, 2015 www.xilinx.com Product Specification 9 Table 8: Recommended Operating Conditions for User I/Os Using Differential Signal Standards I/O Standard VCCO for Drivers V, Min V, Nom V, Max LVDS_33 3.0 3.3 3.45 LVDS_25 2.25 2.5 2.75 BLVDS_25 2.25 2.5 2.75 MINI_LVDS_33 3.0 3.3 3.45 MINI_LVDS_25 2.25 2.5 2.75 LVPECL_33(1) N/A–Inputs Only LVPECL_25 N/A–Inputs Only RSDS_33 3.0 3.3 3.45 RSDS_25 2.25 2.5 2.75 TMDS_33(1) 3.14 3.3 3.45 PPDS_33 3.0 3.3 3.45 PPDS_25 2.25 2.5 2.75 DISPLAY_PORT 2.3 2.5 2.7 DIFF_MOBILE_DDR 1.7 1.8 1.9 DIFF_HSTL_I 1.4 1.5 1.6 DIFF_HSTL_II 1.4 1.5 1.6 DIFF_HSTL_III 1.4 1.5 1.6 DIFF_HSTL_I_18 1.7 1.8 1.9 DIFF_HSTL_II_18 1.7 1.8 1.9 DIFF_HSTL_III_18 1.7 1.8 1.9 DIFF_SSTL3_I 3.0 3.3 3.45 DIFF_SSTL3_II 3.0 3.3 3.45 DIFF_SSTL2_I 2.3 2.5 2.7 DIFF_SSTL2_II 2.3 2.5 2.7 DIFF_SSTL18_I 1.7 1.8 1.9 DIFF_SSTL18_II 1.7 1.8 1.9 DIFF_SSTL15_II 1.425 1.5 1.575 Notes: 1. LVPECL_33 and TMDS_33 inputs require VCCAUX = 3.3V nominal.

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