Analog Devices, Inc. (ADI) introduces the ADF4377, an 800MHz to 12.8GHz frequency synthesizer for high-performance ultra-wideband data converters and synchronization applications. This frequency synthesizer achieves excellent signal-to-noise performance by providing an ultra-clean clock source to drive the signal sampling process. Based on the ADF4377, a new generation of wideband receivers and transmitters can take advantage of higher levels of dynamic range, improving receiver sensitivity and transmitter spectral purity. The ADF4377 frequency synthesizer features a normalized in-band phase noise as low as -239dBc/Hz, a normalized 1/f noise as low as -147dBc/Hz, a wideband voltage-controlled oscillator (VCO) noise floor of -160dBc/Hz, This results in a jitter level below 18fs rms for such excellent performance.
The ADF4377 frequency synthesizer is suitable for applications that require multiple data converters or mixed-signal front-end (MxFE) digitizers to work together, such as radar, instrumentation, wideband receivers, and more. The ADF4377 greatly simplifies alignment and calibration procedures, allowing groups of data converters to sample signals with timing precisely aligned with each other, which is critical to the operation of next-generation ultra-wideband multichannel systems.
This performance is achieved through the following features:
• Automatic reference output synchronization.
• Ultra-matched output delay references across process (3ps between devices), voltage and temperature (0.03ps/C).
• Sub-picosecond, jitter-free output delay reference adjustment capability (+/- 0.1ps).
These features enable precise and predictable alignment of multichip clocks and SYSREFs. The ADF4377 frequency synthesizer works with an IC that distributes the paired reference and SYSREF signals to support JESD204B and JESD204C Subclass 1 solutions. The ADF4377 integrates all necessary power supply bypass capacitors, saving board space on compact circuit boards.
ADF4377 main features:
• Output frequency range: 800 MHz to 12.8 GHz
• Jitter = 18 fs rms (integration bandwidth: 100 Hz to 100 MHz)
• Wideband noise floor: -160 dBc/Hz @ 12 GHz
• PLL Specifications:
o -239 dBc/Hz: normalized in-band phase noise floor
o -147 dBc/Hz: normalized in-band 1/f noise
o Phase detector frequency: up to 500 MHz
• Output delay specification reference:
o Device-to-device standard deviation: 3 ps
o Temperature drift: 0.03 ps/°C
o Multi-chip output phase alignment