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74ABT2244CMTC

hot 74ABT2244CMTC

74ABT2244CMTC

For Reference Only

Part Number 74ABT2244CMTC
Manufacturer ON Semiconductor
Description IC BUF NON-INVERT 5.5V 20TSSOP
Datasheet 74ABT2244CMTC Datasheet
Package 20-TSSOP (0.173", 4.40mm Width)
In Stock 396 piece(s)
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74ABT2244CMTC

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74ABT2244CMTC Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers
Datasheet 74ABT2244CMTC Datasheet
Package20-TSSOP (0.173", 4.40mm Width)
Series74ABT
Logic TypeBuffer, Non-Inverting
Number of Elements2
Number of Bits per Element4
Output Type3-State
Current - Output High, Low32mA, 15mA
Voltage - Supply4.5 V ~ 5.5 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeSurface Mount
Package / Case20-TSSOP (0.173", 4.40mm Width)
Supplier Device Package20-TSSOP

74ABT2244CMTC Datasheet

Page 1

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tm 7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5 Ω S e rie s R e s is to rs in th e O u tp u ts March 2007 ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 74ABT2244 Octal Buffer/Line Driver with 25 Ω Series Resistors in the Outputs Features ■ Guaranteed latchup protection ■ High-impedance, glitch-free bus loading during entire power up and power down cycle ■ Nondestructive, hot-insertion capability General Description The ABT2244 is an octal buffer and line driver designed to drive the capacitive inputs of MOS memory drivers, address drivers, clock drivers, and bus-oriented trans- mitters/receivers. The 25 Ω series resistors in the outputs reduce ringing and eliminate the need for external resistors. Ordering Information Devices are also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering number. Pb-Free package per JEDEC J-STD-020B. Connection Diagram Pin Descriptions Schematic of Each Output Truth Table H = HIGH Voltage Level X = Immaterial L = LOW Voltage Level Z = High Impedance Order Number Package Number Package Description 74ABT2244CSC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide 74ABT2244CSJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ABT2244CMSA MSA20 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide 74ABT2244CMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Pin Names Description OE 1 , OE 2 Output Enable Input (Active LOW) I 0 –I 7 Inputs O 0 –O 7 Outputs OE 1 I 0–3 O 0–3 OE 2 I 4–7 O 4–7 H X Z H X Z L H H L H H L L L L L L

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7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5 Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 2 Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Rating T STG Storage Temperature –65°C to +150°C T A Ambient Temperature Under Bias –55°C to +125°C T J Junction Temperature Under Bias –55°C to +150°C V CC V CC Pin Potential to Ground Pin –0.5V to +7.0V V IN Input Voltage (1) –0.5V to +7.0V I IN Input Current (1) –30mA to +5.0mA V O Voltage Applied to Any Output Disabled or Power-off State HIGH State –0.5V to 5.5V –0.5V to V CC Current Applied to Output in LOW State (Max.) twice the rated I OL (mA) DC Latchup Source Current (Across Comm Operating Range) –300mA Over Voltage Latchup (I/O) 10V Symbol Parameter Rating T A Free Air Ambient Temperature –40°C to +85°C V CC Supply Voltage +4.5V to +5.5V ∆ V / ∆ t Minimum Input Edge Rate Data Input Enable Input 50mV/ns 20mV/ns

Page 4

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5 Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 3 DC Electrical Characteristics Notes: 1. Either voltage limit or current limit is sufficient to protect inputs. 2. For 8-bit toggling, I CCD < 0.8mA/MHz. 3. Guaranteed, but not tested. Symbol Parameter V CC Conditions Min. Typ. Max. Units V IH Input HIGH Voltage Recognized HIGH Signal 2.0 V V IL Input LOW Voltage Recognized LOW Signal 0.8 V V CD Input Clamp Diode Voltage Min. I IN = –18mA –1.2 V V OH Output HIGH Min. I OH = –3mA 2.5 V I OH = –32mA 2.0 V OL Output LOW Voltage Min. I OL = 15mA 0.8 V I IH Input HIGH Current Max. V IN = 2.7V (3) 1 µA V IN = V CC 1 I BVI Input HIGH Current Breakdown Test Max. V IN = 7.0V 7 µA I IL Input LOW Current Max. V IN = 0.5V (3) –1 µA V IN = 0.0V –1 V ID Input Leakage Test 0.0 I ID = 1.9µA, All Other Pins Grounded 475 V I OZH Output Leakage Current 0–5.5V V OUT = 2.7V; OEn = 2.0V 10 µA I OZL V OUT = 0.5V; OEn = 2.0V –10 I OS Output Short-Circuit Current Max. V OUT = 0.0V –100 –275 mA I CEX Output HIGH Leakage Current Max. V OUT = V CC 50 µA I ZZ Bus Drainage Test 0.0 V OUT = 5.5V, All Others GND 100 µA I CCH Power Supply Current Max. All Outputs HIGH 50 µA I CCL All Outputs LOW 30 mA I CCZ Power Supply Current Max. OEn = V CC , All Others at V CC or GND 50 µA I CCT Additional I CC /Input Outputs Enabled Max. V I = V CC – 2.1V 2.5 mA Outputs 3-STATE Enable Input V I = V CC – 2.1V 2.5 mA Outputs 3-STATE Data Input V I = V CC – 2.1V, All Others at VCC or GND 50 µA ICCD Dynamic ICC No Load (3) Max. Outputs OPEN, OEn = GND(2), One-Bit Toggling, 50% Duty Cycle 0.1 mA/ MHz

Page 5

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 4 AC Electrical Characteristics SOIC and SSOP packages. Capacitance Note: 4. COUT is measured at frequency f = 1MHz, per MIL-STD-883, Method 3012. Symbol Parameter TA = +25°C, VCC = +5V, CL = 50pF TA = –40°C to +85°C, VCC = 4.5V–5.5V, CL = 50pF UnitsMin. Typ. Max. Min. Max. tPLH Propagation Delay, Data to Outputs 1.0 2.2 3.9 1.0 3.9 ns tPHL 1.0 2.9 4.4 1.0 4.4 tPZH Output Enable Time 1.5 3.7 6.0 1.5 6.0 ns tPZL 2.1 4.3 7.0 2.1 7.0 tPHZ Output Disable Time 1.7 3.5 5.8 1.7 5.8 ns tPLZ 1.7 3.7 5.8 1.7 5.8 Symbol Parameter Conditions (TA = 25°C) Typ. Units CIN Input Capacitance VCC = 0V 5.0 pF COUT (4) Output Capacitance VCC = 5.0V 9.0 pF

Page 6

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 5 AC Loading *Includes jig and probe capacitance Figure 1. Standard AC Test Load Figure 2. Test Input Signal Levels Figure 3. Test Input Signal Requirements AC Waveforms Figure 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions Figure 5. 3-STATE Output HIGH and LOW Enable and Disable Times Figure 6. Propagation Delay, Pulse Width Waveforms Figure 7. Setup Time, Hold Time and Recovery Time Waveforms Amplitude Rep. Rate tw tr tf 3.0V 1MHz 500ns 2.5ns 2.5ns

Page 7

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 6 Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 8. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B

Page 8

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 7 Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 9. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D

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7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 8 Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 10. 20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide Package Number MSA20

Page 10

7 4 A B T 2 2 4 4 O c ta l B u ffe r/L in e D riv e r w ith 2 5Ω S e rie s R e s is to rs in th e O u tp u ts ©1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ABT2244 Rev. 1.4 9 Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 11. 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20

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