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74ACTQ652SCX

hot 74ACTQ652SCX

74ACTQ652SCX

For Reference Only

Part Number 74ACTQ652SCX
Manufacturer ON Semiconductor
Description IC TXRX NON-INVERT 5.5V 24SOIC
Datasheet 74ACTQ652SCX Datasheet
Package 24-SOIC (0.295", 7.50mm Width)
In Stock 9324 piece(s)
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74ACTQ652SCX

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74ACTQ652SCX Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers
Datasheet 74ACTQ652SCX Datasheet
Package24-SOIC (0.295", 7.50mm Width)
Series74ACTQ
Logic TypeTransceiver, Non-Inverting
Number of Elements1
Number of Bits per Element8
Output Type3-State
Current - Output High, Low24mA, 24mA
Voltage - Supply4.5 V ~ 5.5 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeSurface Mount
Package / Case24-SOIC (0.295", 7.50mm Width)
Supplier Device Package24-SOIC

74ACTQ652SCX Datasheet

Page 1

Page 2

© 2000 Fairchild Semiconductor Corporation DS010933 www.fairchildsemi.com June 1991 Revised September 2000 7 4 A C T Q 6 5 2 Q u ie t S e rie s T ra n s c e iv e r/R e g is te r 74ACTQ652 Quiet Series Transceiver/Register General Description The ACTQ652 consists of bus transceiver circuits with D- type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to the HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. The ACTQ652 utilizes Fairchild FACT Quiet Series tech- nology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet Series fea- tures GTO output control and undershoot corrector in addition to split ground bus for superior performance. Features ■Guaranteed simultaneous switching noise level and dynamic threshold performance ■Guaranteed pin-to-pin skew AC performance ■ Independent registers for A and B buses ■Multiplexed real-time and stored data ■Outputs source/sink 24 mA ■TTL-compatible inputs Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions FACT , Quiet Series , FACT Quiet Series and GTO are trademarks of Fairchild Semiconductor Corporation. Order Number Package Number Package Description 74ACTQ652SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACTQ652MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74ACTQ652SPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Pin Names Description A0–A7, B0–B7 A and B Inputs/3-STATE Outputs CPAB, CPBA Clock Inputs SAB, SBA Select Inputs OEAB, OEBA Output Enable Inputs

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www.fairchildsemi.com 2 7 4 A C T Q 6 5 2 Function Table H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial  = LOW-to-HIGH Clock Transition Note 1: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e., data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Inputs Inputs/Outputs (Note 1) Operating Mode OEAB OEBA CPAB CPBA SAB SBA A0 thru A7 B0 thru B7 L H H or L H or L X X Input Input Isolation L H   X X Store A and B Data X H  H or L X X Input Not Specified Store A, Hold B H H   X X Input Output Store A in Both Registers L X H or L  X X Not Specified Input Hold A, Store B L L   X X Output Input Store B in Both Registers L L X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus H H X X L X Input Output Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus

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3 www.fairchildsemi.com 7 4 A C T Q 6 5 2 Functional Description In the transceiver mode, data present at the HIGH imped- ance port may be stored in either the A or B register or both. The select (SAB, SBA) controls can multiplex stored and real-time. The examples in Figure 1 demonstrate the four fundamen- tal bus-management functions that can be performed with the Octal bus transceivers and receivers. Data on the A or B data bus, or both can be stored in the internal D-type flip-flop by LOW-to-HIGH transitions at the appropriate Clock Inputs (CPAB, CPBA) regardless of the Select or Output Enable Inputs. When SAB and SBA are in the real time transfer mode, it is also possible to store data without using the internal D-type flip-flops by simulta- neously enabling OEAB and OEBA. In this configuration each Output reinforces its Input. Thus when all other data sources to the two sets of bus lines are in a HIGH imped- ance state, each set of bus lines will remain at its last state. FIGURE 1. Note A: Real-Time Note B: Real-Time Transfer Bus B to Bus A Transfer Bus A to Bus B OEAB OEBA CPAB CPBA SAB SBA OEAB OEBA CPAB CPBA SAB SBA L L X X X L H H X X L X Note C: Storage Note D: Transfer Storage Data to A or B OEAB OEBA CPAB CPBA SAB SBA OEAB OEBA CPAB CPBA SAB SBA X H  X X X H L H or L H or L H H L X X  X X L H   X X

Page 5

www.fairchildsemi.com 4 7 4 A C T Q 6 5 2 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics Supply Voltage (VCC) − 0.5V to + 7.0V DC Input Diode Current (IIK) VI = − 0.5V − 20 mA VI = VCC + 0.5V + 20 mA DC Input Voltage (VI) − 0.5V to VCC + 0.5V DC Output Diode Current (IOK) VO = − 0.5V − 20 mA VO = VCC + 0.5V + 20 mA DC Output Voltage (VO) − 0.5V to VCC + 0.5V DC Output Source or Sink Current (IO) ± 50 mA DC VCC or Ground Current per Output Pin (ICC or IGND) ± 50 mA Storage Temperature (TSTG) − 65° C to + 150° C DC Latch-Up Source or Sink Current ± 300 mA Junction Temperature (TJ) PDIP 140° C Supply Voltage (VCC) 4.5V to 5.5V Input Voltage (VI) 0V to VCC Output Voltage (VO) 0V to VCC Operating Temperature (TA) − 40° C to + 85° C Minimum Input Edge Rate ∆ V/∆ t VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns Symbol Parameter VCC TA = + 25° C TA = − 40° C to + 85° C Units Conditions (V) Typ Guaranteed Limits VIH Minimum HIGH Level 4.5 1.5 2.0 2.0 V VOUT = 0.1V Input Voltage 5.5 1.5 2.0 2.0 or VCC − 0.1V VIL Maximum LOW Level 4.5 1.5 0.8 0.8 V VOUT = 0.1V Input Voltage 5.5 1.5 0.8 0.8 or VCC − 0.1V VOH Minimum HIGH Level 4.5 4.49 4.4 4.4 V IOUT = − 50 µ A Output Voltage 5.5 5.49 5.4 5.4 VIN = VIL or VIH 4.5 3.86 3.76 V IOH = − 24 mA 5.5 4.86 4.76 IOH = − 24 mA (Note 3) VOL Maximum LOW Level 4.5 0.001 0.1 0.1 V IOUT = 50 µ A Output Voltage 5.5 0.001 0.1 0.1 VIN = VIL or VIH 4.5 0.36 0.44 V IOL = 24 mA 5.5 0.36 0.44 IOL = 24 mA (Note 3) IIN Maximum Input 5.5 ± 0.1 ± 1.0 µ A VI = VCC, GND Leakage Current IOZT Maximum I/O 5.5 ± 0.6 ± 6.0 µ A VI = VIL, VIH Leakage Current VO = VCC, GND ICCT Maximum ICC/Input 5.5 0.6 1.5 mA VI = VCC − 2.1V IOLD Minimum Dynamic 5.5 75 mA VOLD = 1.65V Max IOHD Output Current (Note 4) 5.5 − 75 mA VOHD = 3.85V Min ICC Maximum Quiescent 5.5 8.0 80.0 µ A VIN = VCC or GND Supply Current VOLP Maximum HIGH Level 5.0 1.1 1.5 V Figures 2, 3 Output Noise (Note 5)(Note 6) VOLV Maximum LOW Level 5.0 − 0.6 − 1.2 V Figures 2, 3 Output Noise (Note 5)(Note 6) VIHD Minimum HIGH Level 5.0 1.9 2.2 V (Note 5)(Note 7) Dynamic Input Voltage VILD Maximum LOW Level 5.0 1.2 0.8 V (Note 5)(Note 7) Dynamic Input Voltage

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5 www.fairchildsemi.com 7 4 A C T Q 6 5 2 DC Electrical Characteristics (Continued) Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: PDIP package. Note 6: Max number of outputs defined as (n). Data inputs are driven 0V to 3V. One output @ GND. Note 7: Max number of data inputs (n) switching. (n − 1) inputs switching 0V to 3V (ACTQ). Input-under-test switching: 3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. AC Electrical Characteristics Note 8: Voltage Range 5.0 is 5.0V ± 0.5V. Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any separate outputs of the same device. The spec- ification applies to any output switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance VCC TA = + 25° C TA = − 40° C to + 85° C Symbol Parameter (V) CL = 50 pF CL = 50 pF Units (Note 8) Min Typ Max Min Max fMAX Maximum Clock Frequency 5.0 MHz tPLH Propagation Delay 5.0 2.0 7.0 9.5 2.0 10.0 ns tPHL Clock to Bus tPLH Propagation Delay 5.0 2.0 6.5 9.0 2.0 9.5 ns tPHL Bus to Bus tPLH Propagation Delay 5.0 2.5 6.5 10.0 2.5 10.5 ns tPHL SBA or SAB to A or B tPZH Enable Time 5.0 2.0 7.0 10.5 2.0 11.0 tPZL OEBA to A (Note 8) tPHZ Disable Time 5.0 1.0 5.0 8.0 1.0 8.5 ns tPLZ OEBA to A (Note 8) tPZH Enable Time 5.0 2.0 7.0 10.5 2.0 11.0 tPZL OEAB to B tPHZ Disable Time 5.0 1.0 5.0 8.0 1.0 8.5 ns tPLZ OEAB to B tS(H) Setup Time, HIGH or 5.0 3.0 3.0 ns tS(L) LOW, Bus to Clock tH(H) Hold Time, HIGH or 5.0 1.5 1.5 ns tH(L) LOW, Bus to Clock tW(H) Clock Pulse Width 5.0 4.0 4.0 ns tW(L) HIGH or LOW tOSHL Output to Output Skew (Note 9) tOSLH A to B, B to A or 5.0 0.5 1.0 1.0 ns Clock to Output Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = 5.0V CPD Power Dissipation Capacitance 54 pF VCC = 5.0V

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www.fairchildsemi.com 6 7 4 A C T Q 6 5 2 FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard Model 8180A Word Generator PC-163A Test Fixture Tektronics Model 7854 Oscilloscope Procedure: 1. Verify Test Fixture Loading: Standard Load 50 pF, 500Ω . 2. Deskew the HFS generator so that no two channels have greater than 150 ps skew between them. This requires that the oscilloscope be deskewed first. It is important to deskew the HFS generator channels before testing. This will ensure that the outputs switch simultaneously. 3. Terminate all inputs and outputs to ensure proper load- ing of the outputs and that the input levels are at the correct voltage. 4. Set the HFS generator to toggle all but one output at a frequency of 1 MHz. Greater frequencies will increase DUT heating and effect the results of the measure- ment. 5. Set the HFS generator input levels at 0V LOW and 3V HIGH for ACT devices and 0V LOW and 5V HIGH for AC devices. Verify levels with an oscilloscope. Note A: VOHV and VOLP are measured with respect to ground reference. Note B: Input pulses have the following characteristics: f = 1 MHz, tr = 3 ns, tf = 3 ns, skew < 150 ps. FIGURE 2. Quiet Output Noise Voltage Waveforms VOLP/VOLV and VOHP/V OHV: • Determine the quiet output pin that demonstrates the greatest noise levels. The worst case pin will usually be the furthest from the ground pin. Monitor the output volt- ages using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. • Measure VOLP and VOLVon the quiet output during the worst case transition for active and enable. Measure VOHP and VOHV on the quiet output during the worst case active and enable transition. • Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability of the measurements. VILD and VIHD: • Monitor one of the switching outputs using a 50Ω coaxial cable plugged into a standard SMB type connector on the test fixture. Do not use an active FET probe. • First increase the input LOW voltage level, VIL, until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds VIL limits, or on output HIGH levels that exceed VIH limits. The input LOW voltage level at which oscillation occurs is defined as VILD. • Next decrease the input HIGH voltage level, VIH until the output begins to oscillate or steps out a min of 2 ns. Oscillation is defined as noise on the output LOW level that exceeds V IL limits, or on output HIGH levels that exceed VIH limits. The input HIGH voltage level at which oscillation occurs is defined as V IHD. • Verify that the GND reference recorded on the oscillo- scope has not drifted to ensure the accuracy and repeat- ability of the measurements. FIGURE 3. Simultaneous Switching Test Circuit

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7 www.fairchildsemi.com 7 4 A C T Q 6 5 2 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B

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www.fairchildsemi.com 8 7 4 A C T Q 6 5 2 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC24

74ACTQ652SCX Reviews

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Liv*****Manne

November 24, 2019

Great seller, item shipped quickly and in great packaging. I will come next time .

Cami*****Thaker

November 2, 2019

Most of the reviews for this product were positive so I took a chance.

Mari*****rozco

September 8, 2019

Fantastic transaction, very fast delivery. Highly recommended. Thank you.

Sut***** Barr

August 17, 2019

Have never had a problem with my order. Packages arrive on time and in great condition.

Kel***** Wali

August 12, 2019

I've had no issues. Good product, would buy again.

Tit*****Stout

August 11, 2019

It is so great to order from a supplier that provides so many shipping options at reasonable cost. It couldn't be any easier to order from Heisener. Great job!

Anast*****Leonard

July 6, 2019

Good! quick and convenient delivery. product tracking with good advice.

Miran*****rcado

May 21, 2019

Always have what I need, fast and easy for making an order, fast shipping and great service! That about covers it! Many Thanks!

Trini*****ckson

April 20, 2019

These are high quality connectors. They work as you would expect them to. There is not much else you can say about them.

Vau***** Kemp

February 12, 2019

Very supportive of my small orders, but very glad easy to work with. Hard to see how it could be any more efficient!

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