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74LVQ125SC

hot 74LVQ125SC

74LVQ125SC

For Reference Only

Part Number 74LVQ125SC
Manufacturer Fairchild/ON Semiconductor
Description IC BUFF 3-ST QD LV N-INV 14SOIC
Datasheet 74LVQ125SC Datasheet
Package 14-SOIC (0.154", 3.90mm Width)
In Stock 265 piece(s)
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Lead Time Can Ship Immediately
Estimated Delivery Time Dec 14 - Dec 19 (Choose Expedited Shipping)
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74LVQ125SC

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74LVQ125SC Specifications

ManufacturerFairchild/ON Semiconductor
CategoryIntegrated Circuits (ICs) - Logic - Buffers, Drivers, Receivers, Transceivers
Datasheet 74LVQ125SC Datasheet
Package14-SOIC (0.154", 3.90mm Width)
Series74LVQ
Logic TypeBuffer, Non-Inverting
Number of Elements4
Number of Bits per Element1
Output TypePush-Pull
Current - Output High, Low12mA, 12mA
Voltage - Supply2 V ~ 3.6 V
Operating Temperature-40°C ~ 85°C (TA)
Mounting TypeSurface Mount
Package / Case14-SOIC (0.154", 3.90mm Width)
Supplier Device Package14-SOIC

74LVQ125SC Datasheet

Page 1

Page 2

© 2001 Fairchild Semiconductor Corporation DS011349 www.fairchildsemi.com February 1992 Revised June 2001 7 4 L V Q 1 2 5 L o w V o lta g e Q u a d B u ffe r w ith 3 -S T A T E O u tp u ts 74LVQ125 Low Voltage Quad Buffer with 3-STATE Outputs General Description The LVQ125 contains four independent non-inverting buff- ers with 3-STATE outputs. Features ■ Ideal for low power/low noise 3.3V applications ■Guaranteed simultaneous switching noise level and dynamic threshold performance ■Guaranteed pin-to-pin skew AC performance ■Guaranteed incident wave switching into 75Ω Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Pin Descriptions Connection Diagram Truth Table H = HIGH Voltage Level L = LOW Voltage Level Z = HIGH Impedance X = Immaterial Order Number Package Number Package Description 74LVQ125SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74LVQ125SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Pin Names Description An, Bn Inputs On Outputs Inputs Output An Bn On L L L L H H H X Z

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www.fairchildsemi.com 2 7 4 L V Q 1 2 5 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: Maximum test duration 2.0 ms, one output loaded at a time. Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ. Note 6: Worst case package. Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND. Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f = 1 MHz. Supply Voltage (VCC) − 0.5V to + 7.0V DC Input Diode Current (IIK) VI = − 0.5V − 20 mA VI = VCC + 0.5V + 20 mA DC Input Voltage (VI) − 0.5V to VCC + 0.5V DC Output Diode Current (IOK) VO = − 0.5V − 20 mA VO = VCC + 0.5V + 20 mA DC Output Voltage (VO) − 0.5V to VCC + 0.5V DC Output Source or Sink Current (IO) ± 50 mA DC VCC or Ground Current (ICC or IGND) ± 200 mA Storage Temperature (TSTG) − 65° C to + 150° C DC Latch-Up Source or Sink Current ± 100 mA Supply Voltage (VCC) 2.0V to 3.6V Input Voltage (VI) 0V to VCC Output Voltage (VO) 0V to VCC Operating Temperature (TA) − 40° C to + 85° C Minimum Input Edge Rate (∆ V/∆ t) VIN from 0.8V to 2.0V VCC @ 3.0V 125 mV/ns Symbol Parameter VCC TA = + 25° C TA = − 40° C to + 85° C Units Conditions (V) Typ Guaranteed Limits VIH Minimum High Level 3.0 1.5 2.0 2.0 V VOUT = 0.1V Input Voltage or VCC − 0.1V VIL Maximum Low Level 3.0 1.5 0.8 0.8 V VOUT = 0.1V Input Voltage or VCC − 0.1V VOH Minimum High Level 3.0 2.99 2.9 2.9 V IOUT = − 50 µ A Output Voltage 3.0 2.58 2.48 V VIN = VIL or VIH (Note 3) IOH = − 12 mA VOL Maximum Low Level 3.0 0.002 0.1 0.1 V IOUT = 50 µ A Output Voltage 3.0 0.36 0.44 V VIN = VIL or VIH (Note 3) IOL = 12 mA IIN Maximum Input 3.6 ± 0.1 ± 1.0 µ A VI = VCC, Leakage Current GND IOZ Maximum 3-STATE VI (OE) = VIL, VIH Leakage Current 3.6 ± 0.25 ± 2.5 µ A VI = VCC, GND VO = VCC, GND IOLD Minimum Dynamic (Note 4) 3.6 36 mA VOLD = 0.8V Min (Note 5) IOHD Output Current 3.6 − 25 mA VOHD = 2.0V Min (Note 5) ICC Maximum Quiescent 3.6 4.0 40.0 µ A VIN = VCC Supply Current or GND VOLP Quiet Output 3.3 0.6 1.0 V (Note 6)(Note 7) Maximum Dynamic VOL VOLV Quiet Output 3.3 − 0.6 − 1.0 V (Note 6)(Note 7) Minimum Dynamic VOL VIHD Maximum High Level 3.3 1.7 2.0 V (Note 6)(Note 8) Dynamic Input Voltage VILD Maximum Low Level 3.3 1.5 0.8 V (Note 6)(Note 8) Dynamic Input Voltage

Page 4

3 www.fairchildsemi.com 7 4 L V Q 1 2 5 AC Electrical Characteristics Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Capacitance Note 10: CPD is measured at 10 MHz. Symbol Parameter TA = + 25° C TA = − 40° C to + 85° C UnitsVCC CL = 50 pF CL = 50 pF (V) Min Typ Max Min Max tPLH Propagation Delay 2.7 1.0 7.8 12.7 1.0 14.0 ns Data to Output 3.3 ± 0.3 1.0 6.5 9.0 1.0 10.0 tPHL Propagation Delay 2.7 1.0 7.8 12.7 1.0 14.0 ns Data to Output 3.3 ± 0.3 1.0 6.5 9.0 1.0 10.0 tPZH Output Enable Time 2.7 1.0 7.2 14.8 1.0 16.0 ns 3.3 ± 0.3 1.0 6.0 10.5 1.0 11.0 tPZL Output Enable Time 2.7 1.0 9.0 14.0 1.0 16.0 ns 3.3 ± 0.3 1.0 7.5 10.0 1.0 11.0 tPHZ Output Disable Time 2.7 1.0 9.0 14.0 1.0 15.0 ns 3.3 ± 0.3 1.0 7.5 10.0 1.0 10.5 tPLZ Output Disable Time 2.7 1.0 9.0 14.8 1.0 16.5 ns 3.3 ± 0.3 1.0 7.5 10.5 1.0 11.5 tOSHL, Output to Output Skew (Note 9) 2.7 1.0 1.5 1.5 ns tOSLH Data to Output 3.3 ± 0.3 1.0 1.5 1.5 Symbol Parameter Typ Units Conditions CIN Input Capacitance 4.5 pF VCC = Open CPD (Note 10) Power Dissipation Capacitance 34 pF VCC = 3.3V

Page 5

www.fairchildsemi.com 4 7 4 L V Q 1 2 5 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A

74LVQ125SC Guarantees

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