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FAN53526UC100X

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FAN53526UC100X

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Part Number FAN53526UC100X
Manufacturer ON Semiconductor
Description 3A 2.4 MHZ DIGITALLY PROGRAMMABL
Datasheet FAN53526UC100X Datasheet
Package -
In Stock 605 piece(s)
Unit Price $ 0.4200 *
Lead Time Can Ship Immediately
Estimated Delivery Time Aug 11 - Aug 16 (Choose Expedited Shipping)
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Part Number # FAN53526UC100X (PMIC - Voltage Regulators - DC DC Switching Regulators) is manufactured by ON Semiconductor and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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FAN53526UC100X Specifications

ManufacturerON Semiconductor
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - DC DC Switching Regulators
Datasheet FAN53526UC100XDatasheet
Package-
SeriesTinyBuck®
FunctionStep-Down
Output ConfigurationPositive
TopologyBuck
Output TypeProgrammable
Number of Outputs1
Voltage - Input (Min)2.5V
Voltage - Input (Max)5.5V
Voltage - Output (Min/Fixed)1.225V
Voltage - Output (Max)1.23V
Current - Output3A
Frequency - Switching2.4MHz
Synchronous RectifierYes
Operating Temperature-40°C ~ 85°C (TA)
Mounting Type-
Package / Case-
Supplier Device Package-

FAN53526UC100X Datasheet

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To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the Fairchild part numbers will be changed to a dash (-). This document may contain device numbers with an underscore (_). Please check the ON Semiconductor website to verify the updated device numbers. The most current and up-to-date ordering information can be found at www.onsemi.com. Please email any questions regarding the system integration to Fairchild_questions@onsemi.com. Is Now Part of ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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July 2017 © 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 1 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r FAN53526 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator Features  Fixed-Frequency Operation: 2.4 MHz  Best-in-Class Load Transient  Continuous Output Current Capability: 3.0 A  2.5 V to 5.5 V Input Voltage Range  Digitally Programmable Output Voltage: - 0.600 V to 1.39375 V in 6.25 mV Steps  Programmable Slew Rate for Voltage Transitions  I2C-Compatible Interface Up to 3.4 Mbps  PFM Mode for High Efficiency in Light-Load  Quiescent Current in PFM Mode: 50 µA (Typical)  Input Under-Voltage Lockout (UVLO)  Thermal Shutdown and Overload Protection  15-Bump Wafer-Level Chip Scale Package (WLCSP) Applications  Application, Graphic, and DSP Processors - ARM™, Tegra™, OMAP™, NovaThor™, ARMADA™, Krait™, etc.  Hard Disk Drives, LPDDR3, LPDDR4  Tablets, Netbooks, Ultra-Mobile PCs  Smart Phones  Gaming Devices All trademarks are the property of their respective owners. Description The FAN53526 is a step-down switching voltage regulator that delivers a digitally programmable output from an input voltage supply of 2.5 V to 5.5 V. The output voltage is programmed through an I2C interface capable of operating up to 3.4 MHz. Using a proprietary architecture with synchronous rectification, the FAN53526 is capable of delivering 3.0 A continuous at over 80% efficiency, maintaining that efficiency at load currents as low as 10 mA. The regulator operates at a nominal fixed frequency of 2.4 MHz, which reduces the value of the external components. Additional output capacitance can be added to improve regulation during load transients without affecting stability. At moderate and light loads, Pulse Frequency Modulation (PFM) is used to operate in Power-Save Mode with a typical quiescent current of 50 µA at room temperature. Even with such a low quiescent current, the part exhibits excellent transient response during large load swings. At higher loads, the system automatically switches to fixed-frequency control, operating at 2.4 MHz. In Shutdown Mode, the supply current drops below 1 µA, reducing power consumption. PFM Mode can be disabled if fixed frequency is desired. The FAN53526 is available in a 15-bump, 1.310 mm x 2.015 mm, 0.4 mm ball pitch WLCSP. FAN53526 SW COUT L1 PVIN PGND CIN VOUT AGND LOADVSEL SCL SDA EN CIN_LOAD CBY Figure 1. Typical Application

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 2 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r Ordering Information Part Number Power-Up Defaults DVS Range / Step Size Temperature Range Package Packing Method Device Marking VSEL0 VSEL1 FAN53526UC84X 1.125 1.125 0.600 V to 1.39375 V / 6.25 mV -40 to 85°C WLCSP Tape & Reel F7 FAN53526UC89X 1.15625 1.15625 CL FAN53526UC100X 1.225 1.225 F9 FAN53526UC106X 1.2625 1.2625 C7 FAN53526UC128X 1.2 1.2 F3 FAN53526UC00X 0.60 0.60 GA Recommended External Components Table 1. Recommended External Components for 3.0 A Maximum Load Current Component Description Vendor Parameter Typ. Unit L1 330 nH, 2016 Case Size See Table 2 L1 Alternative(1) 470 nH 2016 Case Size COUT1, COUT2 47 µF, 6.3 V, X5R, 0603 GRM188R60J476ME15 (Murata) C 47 µF COUT1, COUT2 Alternative(1) 22 µF, 10 V, X5R, 0603 CL10A226MP8NUNB (SAMSUNG) C 22 CIN 1 Piece; 4.7 µF, 10 V, X5R, 0603 C1608X5R1A475K (TDK) C 4.7 CBY 1 Piece; 100 nF, 6.3V, X5R, 0201 GRM033R60J104KE19D (Murata) C 100 nF Note: 1. COUT Alternative and L1 Alternative can be used if not following reference design. CBY is recommended to reduce any high frequency component on VIN bus. CBY is optional and used to filter any high frequency component on VIN bus. Table 2. Recommended Inductors Component Dimensions Manufacturer Part# L (nH) DCR (mΩ Typ.) ISAT(2) L W H Toko DFE201612E-R33N 330 15 7.0 2.0 1.6 1.2 Toko DFE201612E-R47N 470 21 6.1 2.0 1.6 1.2 Cyntek PIFE20161B-R47MS-39 470 30 3.1 2.0 1.6 1.2 SEMCO CIGT201610UMR47MNE 470 30 4.0 2.0 1.6 0.9 SEMCO CIGT201210UMR47MNE 470 33 3.0 2.0 1.2 0.9 Note: 2. ISAT where the dc current drops the inductance by 30%.

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 3 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r Pin Configuration PGND AGND VSEL SDAEN SCL VOUTAGND PGNDSWVIN C1 B1 A1 A2 C3 B3 A3 C2 D1 D3D2 B2 E1 E3E2 C1 B1 A1 C3 B3 A3 A2 C2 D1D3 D2 B2 E1E3 E2 Figure 2. Top View Figure 3. Bottom View Pin Definitions Pin # Name Description D1 VSEL Voltage Select. When this pin is LOW, VOUT is set by the VSEL0 register. When this pin is HIGH, VOUT is set by the VSEL1 register. Polarity of pin in conjunction with the MODE bits in the Control register 02h, will select Forced PWM or Auto PFM/PWM mode of operation. VSEL0=Auto PFM, and VSEL1=FPWM. The VSEL pin has an internal pull-down resistor (250k, which is only activated with a logic low. D2 EN Enable. The device is in Shutdown Mode when this pin is LOW. Device keeps register content when EN pin is LOW. The EN Pin has an internal pull-down resistor (250k, which is only activated with a logic low. E2 SCL I2C Serial Clock D3 SDA I2C Serial Data E3 VOUT VOUT. Sense pin for VOUT. Connect to COUT. A3, B3, C2 PGND Power Ground. The low-side MOSFET is referenced to this pin. CIN and COUT should be returned with a minimal path to these pins. C3, E1 AGND Analog Ground. All signals are referenced to this pin. Avoid routing high dV/dt AC currents through this pin. A1, B1, C1 VIN Power Input Voltage. Connect to the input power source. Connect to CIN with minimal path. A2, B2 SW Switching Node. Connect to the inductor.

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 4 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VIN Voltage on SW, VIN Pins IC Not Switching -0.3 7.0 V IC Switching -0.3 6.5 Voltage on EN Pin -0.3 VIN(3) Voltage on All Other Pins IC Not Switching -0.3 VIN(3) VOUT Voltage on VOUT Pin -0.3 6.5 V VINOV_SLEW Maximum Slew Rate of VIN > 6.5 V, PWM Switching 100 V/ms ESD Human Body Model, ANSI/ESDA/JEDEC JS-001-2012 2000 V Charged Device Model per JESD22-C101 1000 TJ Junction Temperature -40 +150 °C TSTG Storage Temperature -65 +150 °C TL Lead Soldering Temperature, 10 Seconds +260 °C Note: 3. Lesser of 7 V or VIN+0.3 V. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. On Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Typ. Max. Unit VIN Supply Voltage Range 2.5 5.5 V IOUT Output Current 0 3.0 A TA Operating Ambient Temperature -40 +85 °C TJ Operating Junction Temperature -40 +125 °C Thermal Properties Symbol Parameter Min. Typ. Max. Unit JA Junction-to-Ambient Thermal Resistance(4) 42 °C/W Note: 4. Junction-to-ambient thermal resistance is a function of application and board layout. This data is simulated with four-layer 2s2p boards with vias in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed the junction temperature.

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 5 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r Electrical Characteristics Minimum and maximum values are at VIN=3.6 V, TA=-40°C to +85°C, unless otherwise noted. Typical values are at TA=25°C, VIN=3.6 V, and EN=HIGH. VOUT = 1.15625 V. Symbol Parameter Condition Min. Typ. Max. Unit Power Supplies IQ Quiescent Current ILOAD=0 50 µA ILOAD=0, MODE Bit=1 (Forced PWM) 15 mA I SD H/W Shutdown Supply Current EN=GND 0.1 3.0 µA S/W Shutdown Supply Current EN=VIN, BUCK_ENx=0, 2.5 V ≤ VIN ≤ 5.5 V 2 12 µA VUVLO Under-Voltage Lockout Threshold VIN Rising 2.32 2.45 V VUVHYST Under-Voltage Lockout Hysteresis 350 mV EN, VSEL, SDA, SCL VIH HIGH-Level Input Voltage 2.5 V ≤ VIN ≤ 5.5 V 1.1 V VIL LOW-Level Input Voltage 2.5 V ≤ VIN ≤ 5.5 V 0.4 V IIN Input Bias Current Input Tied to GND or VIN 0.01 1.00 µA VOUT Regulation VREG VOUT DC Accuracy 2.5 V ≤ VIN ≤ 5.5 V, VOUT from Minimum to Maximum, IOUT(DC)=0 to 3.0 A, Auto PFM/PWM -2.5 2.5 % 2.5 V ≤ VIN ≤ 5.5 V, VOUT from Minimum to Maximum, IOUT(DC)=0 to 3.0 A, Forced PWM -1.5 1.5 VIN=3.8 V, VOUT=0.6 V, IOUT(DC)=500 mA, Auto PFM/PWM -2.3 -0.5 -14 -3 mV LOAD OUT I V   Load Regulation IOUT(DC)=1 to 3 A -0.01 %/A IN OUT V V   Line Regulation 2.5 V ≤ VIN ≤ 5.5 V, IOUT(DC)=1.5 A 0.01 %/V VTRSP Transient Response ILOAD Step 0.01 A ⇔ 1.5 A, tr=tf=200 ns, VOUT=1.15625 V ±50 mV ILOAD Step 0 A ⇔ 500 mA, tr=tf=100 ns, VIN=3.8 V, VOUT=0.6 V ±16 Power Switch / Protection ILIMPK P-MOS Peak Current Limit 4.00 4.75 5.50 A TLIMIT Thermal Shutdown 150 °C THYST Thermal Shutdown Hysteresis 17 °C VSDWN Input OVP Shutdown Rising Threshold 6.15 V Falling Threshold 5.50 5.73 Frequency Control fSW Oscillator Frequency 2.05 2.40 2.75 MHz DAC Resolution 7 Bits Differential Nonlinearity(5) 0.5 LSB Soft-Start tSS Regulator Enable to Regulated VOUT RLOAD > 5 , VOUT=1.15625 V, From EN Rising Edge to 95% VOUT 150 µs 5. Monotonicity assured by design.

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 6 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r I2C Timing Specifications Guaranteed by design. Symbol Parameter Condition Min. Typ. Max. Unit fSCL SCL Clock Frequency Standard Mode 100 kHz Fast Mode 400 Fast Mode Plus 1000 High-Speed Mode, CB ≤100 pF 3400 High-Speed Mode, CB ≤ 400 pF 1700 tBUF Bus-Free Time between STOP and START Conditions Standard Mode 4.7 µs Fast Mode 1.3 Fast Mode Plus 0.5 tHD;STA START or REPEATED START Hold Time Standard Mode 4 µs Fast Mode 600 ns Fast Mode Plus 260 High-Speed Mode 160 tLOW SCL LOW Period Standard Mode 4.7 µs Fast Mode 1.3 Fast Mode Plus 0.5 High-Speed Mode, CB ≤ 100 pF 160 ns High-Speed Mode, CB ≤ 400 pF 320 tHIGH SCL HIGH Period Standard Mode 4 µs Fast Mode 600 ns Fast Mode Plus 260 High-Speed Mode, CB ≤ 100 pF 60 High-Speed Mode, CB ≤ 400 pF 120 tSU;STA REPEATED START Setup Time Standard Mode 4.7 µs Fast Mode 600 ns Fast Mode Plus 260 High-Speed Mode 160 tSU;DAT Data Setup Time Standard Mode 250 ns Fast Mode 100 Fast Mode Plus 50 High-Speed Mode 10 tHD;DAT Data Hold Time Standard Mode 0 3.45 µs Fast Mode 0 900 ns Fast Mode Plus 0 450 High-Speed Mode, CB ≤ 100 pF 0 70 High-Speed Mode, CB ≤ 400 pF 0 150 tRCL SCL Rise Time Standard Mode 20+0.1CB 1000 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB ≤ 100 pF 10 80 High-Speed Mode, CB ≤ 400 pF 20 160 Continued on the following page…

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© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 7 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r I2C Timing Specifications (Continued) Guaranteed by design. Symbol Parameter Condition Min. Typ. Max. Unit tFCL SCL Fall Time Standard Mode 20+0.1CB 300 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB ≤ 100 pF 10 40 High-Speed Mode, CB ≤ 400 pF 20 80 tRCL1 Rise Time of SCL After a REPEATED START Condition and After ACK Bit High-Speed Mode, CB ≤ 100 pF 10 80 ns High-Speed Mode, CB ≤ 400 pF 20 160 tRDA SDA Rise Time Standard Mode 20+0.1CB 1000 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB ≤ 100 pF 10 80 High-Speed Mode, CB ≤ 400 pF 20 160 tFDA SDA Fall Time Standard Mode 20+0.1CB 300 ns Fast Mode 20+0.1CB 300 Fast Mode Plus 20+0.1CB 120 High-Speed Mode, CB ≤ 100 pF 10 80 High-Speed Mode, CB ≤ 400 pF 20 160 tSU;STO Stop Condition Setup Time Standard Mode 4 µs Fast Mode 600 ns Fast Mode Plus 120 High-Speed Mode 160 CB Capacitive Load for SDA and SCL 400 pF

Page 10

© 2016 Semiconductor Components Industries, LLC www.fairchildsemi.com FAN53526 • Rev. 3.1 www.onsemi.com 8 F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r F A N 5 3 5 2 6 — 3 .0 A , 2 .4 M H z , D ig ita lly P ro g ra m m a b le T in y B u c k ® R e g u la to r Timing Diagrams Figure 4. I2C Interface Timing for Fast Plus, Fast, and Slow Modes Figure 5. I2C Interface Timing for High-Speed Mode START REPEATED START SCL SDA t F t HD;STA t LOW t R t HD;DAT t HIGH T SU;DAT t SU;STA t HD;STO t BUF START STOP t HD;STA REPEATED START SCLH SDAH t FDA t LOW t RCL1 t HD;DAT t HIGH t SU;STO REPEATED START t RDA t FCL t SU;DAT t RCL STOP = MCS Current Source Pull-up = R P Resistor Pull-up note A Note A: First rising edge of SCLH after Repeated Start and after each ACK bit. t HD;STA t SU;STA

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Jair*****atti

June 29, 2020

Well packed, good item, capacitors both within 2.5% tolerance!

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June 22, 2020

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June 15, 2020

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June 14, 2020

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June 13, 2020

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June 5, 2020

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June 5, 2020

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June 2, 2020

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June 2, 2020

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