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HIP2100EIBZT

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HIP2100EIBZT

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Part Number HIP2100EIBZT
Manufacturer Intersil
Description IC DRIVER HALF BRDG 100V 8EPSOIC
Datasheet HIP2100EIBZT Datasheet
Package 8-SOIC (0.154", 3.90mm Width) Exposed Pad
In Stock 1,577 piece(s)
Unit Price $ 1.7955 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jun 1 - Jun 6 (Choose Expedited Shipping)
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Part Number # HIP2100EIBZT (PMIC - Gate Drivers) is manufactured by Intersil and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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HIP2100EIBZT Specifications

ManufacturerIntersil
CategoryIntegrated Circuits (ICs) - PMIC - Gate Drivers
Datasheet HIP2100EIBZTDatasheet
Package8-SOIC (0.154", 3.90mm Width) Exposed Pad
Series-
Driven ConfigurationHalf-Bridge
Channel TypeIndependent
Number of Drivers2
Gate TypeN-Channel MOSFET
Voltage - Supply9 V ~ 14 V
Logic Voltage - VIL, VIH4V, 7V
Current - Peak Output (Source, Sink)2A, 2A
Input TypeNon-Inverting
High Side Voltage - Max (Bootstrap)114V
Rise / Fall Time (Typ)10ns, 10ns
Operating Temperature-55°C ~ 150°C (TJ)
Mounting TypeSurface Mount
Package / Case8-SOIC (0.154", 3.90mm Width) Exposed Pad
Supplier Device Package8-SOIC-EP

HIP2100EIBZT Datasheet

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FN4022 Rev 15.00 August 31, 2015 HIP2100 100V/2A Peak, Low Cost, High Frequency Half Bridge Driver DATASHEETThe HIP2100 is a high frequency, 100V Half Bridge N-Channel power MOSFET driver IC. The low-side and high-side gate drivers are independently controlled and matched to 8ns. This gives the user maximum flexibility in dead-time selection and driver protocol. Undervoltage protection on both the low-side and high-side supplies force the outputs low. An on-chip diode eliminates the discrete diode required with other driver ICs. A new level-shifter topology yields the low-power benefits of pulsed operation with the safety of DC operation. Unlike some competitors, the high-side output returns to its correct state after a momentary undervoltage of the high-side supply. Applications • Telecom Half Bridge Power Supplies • Avionics DC/DC Converters • Two-Switch Forward Converters • Active Clamp Forward Converters Features • Drives N-Channel MOSFET Half Bridge • SOIC, EPSOIC, QFN and DFN Package Options • SOIC, EPSOIC and DFN Packages Compliant with 100V Conductor Spacing Guidelines of IPC-2221 • Pb-Free Product Available (RoHS Compliant) • Bootstrap Supply Max Voltage to 114VDC • On-Chip 1 Bootstrap Diode • Fast Propagation Times for Multi-MHz Circuits • Drives 1000pF Load with Rise and Fall Times Typ. 10ns • CMOS Input Thresholds for Improved Noise Immunity • Independent Inputs for Non-Half Bridge Topologies • No Start-Up Problems • Outputs Unaffected by Supply Glitches, HS Ringing Below Ground, or HS Slewing at High dv/dt • Low Power Consumption • Wide Supply Range • Supply Undervoltage Protection • 3 Driver Output Resistance • QFN/DFN Package: - Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat No Leads - Package Outline - Near Chip Scale Package Footprint, which Improves PCB Efficiency and has a Thinner Profile - Ordering Information PART NUMBER (Note 1) PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. # HIP2100IB (No longer available, recommended replacements: HIP2100IBZ, HIP2100IBZT) 2100 IB -40 to +125 8 Ld SOIC M8.15 HIP2100IBZ (Note 2) 2100 IBZ -40 to +125 8 Ld SOIC (Pb-free) M8.15 HIP2100EIBZ (Note 2) 2100 EIBZ -40 to +125 8 Ld EPSOIC (Pb-free) M8.15C HIP2100IRZ (Note 2) HIP 2100IRZ -40 to +125 16 Ld 5x5 QFN (Pb-free) L16.5x5 HIP2100IR4Z (Note 2) (No longer available, recommended replacements: HIP2100IRZ, HIP2100IRZT) 21 00IR4Z -40 to +125 12 Ld 4x4 DFN (Pb-free) L12.4x4A NOTES: 1. Add “T” suffix for tape and reel. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.FN4022 Rev 15.00 Page 1 of 13 August 31, 2015

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HIP2100Application Block Diagram Pinouts HIP2100 (8 LD SOIC, EPSOIC) TOP VIEW NOTE: EPAD = Exposed PAD. HIP2100IR4 (12 LD DFN) TOP VIEW HIP2100 (16 LD QFN) TOP VIEW 5 6 8 7 4 3 2 1VDD HB HO HS LO LI HI VSS EPAD VDD NC NC HB HO LO VSS NC NC LI HS 2 3 4 1 5 11 10 9 12 8 6 7 HI EPAD NO L ONG ER A VAIL ABL E OR SUP POR TED ) 1 3 4 15 HB HO V D D L O 16 14 13 2 12 10 9 11 65 7 8 VSS LI H S H I N C N C NC NC NC NC N C N C EPAD SECONDARY CIRCUIT +100V C O N T R O L CONTROLLER PWM LI HI HO LO VDD HS HB +12V VSS HIP2100 REFERENCE AND ISOLATION DRIVE LO DRIVE HIFN4022 Rev 15.00 Page 2 of 13 August 31, 2015

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HIP2100Functional Block Diagram UNDER VOLTAGE VDD HI LI VSS DRIVER DRIVER HB HO HS LO LEVEL SHIFT UNDER VOLTAGE EPAD (EPSOIC, QFN and DFN PACKAGES ONLY) *EPAD = Exposed Pad. The EPAD is electrically isolated from all other pins. For best thermal performance connect the EPAD to the PCB power ground plane. SECONDARYHIP2100 ISOLATION PWM +48V +12V CIRCUIT FIGURE 1. TWO-SWITCH FORWARD CONVERTER SECONDARY CIRCUIT HIP2100 ISOLATION PWM +48V +12V FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE CLAMPFN4022 Rev 15.00 Page 3 of 13 August 31, 2015

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HIP2100Absolute Maximum Ratings Thermal Information Supply Voltage, VDD, VHB-VHS (Notes 3, 4) . . . . . . . . -0.3V to 18V LI and HI Voltages (Note 4) . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on LO (Note 4) . . . . . . . . . . . . . . . . . . . -0.3V to VDD +0.3V Voltage on HO (Note 4) . . . . . . . . . . . . . . . VHS -0.3V to VHB +0.3V Voltage on HS (Continuous) (Note 4) . . . . . . . . . . . . . . -1V to 110V Voltage on HB (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +118V Average Current in VDD to HB diode. . . . . . . . . . . . . . . . . . . 100mA ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (1kV) Maximum Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . .+9V to 14.0VDC Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V Voltage on HS. . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V Voltage on HB . . . VHS+8V to VHS+14.0V and VDD-1V to VDD+100V HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <50V/ns Thermal Resistance (Typical) JA (°C/W) JC (°C/W) SOIC (Note 5) . . . . . . . . . . . . . . . . . . . 95 50 EPSOIC (Note 6) . . . . . . . . . . . . . . . . . 40 3.0 QFN (Note 6) . . . . . . . . . . . . . . . . . . . . 37 6.5 DFN (Note 6) . . . . . . . . . . . . . . . . . . . . 40 3.0 Max Power Dissipation at +25°C in Free Air (SOIC, Note 5) . . . . 1.3W Max Power Dissipation at +25°C in Free Air (EPSOIC, Note 6) . . 3.1W Max Power Dissipation at +25°C in Free Air (QFN, Note 6) . . . . . 3.3W Storage Temperature Range . . . . . . . . . . . . . . . . . . -65°C to +150°C Junction Temperature Range. . . . . . . . . . . . . . . . . . -55°C to +150°C Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 3. The HIP2100 is capable of derated operation at supply voltages exceeding 14V. Figure 16 shows the high-side voltage derating curve for this mode of operation. 4. All voltages referenced to VSS unless otherwise specified. 5. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 6. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. JC, the “case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379. Electrical Specifications VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified. PARAMETERS SYMBOL TEST CONDITIONS TJ = +25°C TJ = -40°C TO +125°C UNITSMIN TYP MAX MIN (Note 7) MAX (Note 7) SUPPLY CURRENTS VDD Quiescent Current IDD LI = HI = 0V - 0.1 0.15 - 0.2 mA VDD Operating Current IDDO f = 500kHz - 1.5 2.5 - 3 mA Total HB Quiescent Current IHB LI = HI = 0V - 0.1 0.15 - 0.2 mA Total HB Operating Current IHBO f = 500kHz - 1.5 2.5 - 3 mA HB to VSS Current, Quiescent IHBS VHS = VHB = 114V - 0.05 1 - 10 µA HB to VSS Current, Operating IHBSO f = 500kHz - 0.7 - - - mA INPUT PINS Low Level Input Voltage Threshold VIL 4 5.4 - 3 - V High Level Input Voltage Threshold VIH - 5.8 7 - 8 V Input Voltage Hysteresis VIHYS - 0.4 - - - V Input Pulldown Resistance RI - 200 - 100 500 k UNDERVOLTAGE PROTECTION VDD Rising Threshold VDDR 7 7.3 7.8 6.5 8 V VDD Threshold Hysteresis VDDH - 0.5 - - - V HB Rising Threshold VHBR 6.5 6.9 7.5 6 8 V HB Threshold Hysteresis VHBH - 0.4 - - - VFN4022 Rev 15.00 Page 4 of 13 August 31, 2015

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HIP2100BOOT STRAP DIODE Low-Current Forward Voltage VDL IVDD-HB = 100µA - 0.45 0.55 - 0.7 V High-Current Forward Voltage VDH IVDD-HB = 100mA - 0.7 0.8 - 1 V Dynamic Resistance RD IVDD-HB = 100mA - 0.8 1 - 1.5  LO GATE DRIVER Low Level Output Voltage VOLL ILO = 100mA - 0.25 0.3 - 0.4 V High Level Output Voltage VOHL ILO = -100mA, VOHL = VDD-VLO - 0.25 0.3 - 0.4 V Peak Pullup Current IOHL VLO = 0V - 2 - - - A Peak Pulldown Current IOLL VLO = 12V - 2 - - - A HO GATE DRIVER Low Level Output Voltage VOLH IHO = 100mA - 0.25 0.3 - 0.4 V High Level Output Voltage VOHH IHO = -100mA, VOHH = VHB-VHO - 0.25 0.3 - 0.4 V Peak Pullup Current IOHH VHO = 0V - 2 - - - A Peak Pulldown Current IOLH VHO = 12V - 2 - - - A Electrical Specifications VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified. (Continued) PARAMETERS SYMBOL TEST CONDITIONS TJ = +25°C TJ = -40°C TO +125°C UNITSMIN TYP MAX MIN (Note 7) MAX (Note 7) Switching Specifications VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified. PARAMETERS SYMBOL TEST CONDITIONS TJ = +25°C TJ = -40°C TO +125°C UNITSMIN TYP MAX MIN (Note 7) MAX (Note 7) Lower Turn-Off Propagation Delay (LI Falling to LO Falling) tLPHL - 20 35 - 45 ns Upper Turn-Off Propagation Delay (HI Falling to HO Falling) tHPHL - 20 35 - 45 ns Lower Turn-On Propagation Delay (LI Rising to LO Rising) tLPLH - 20 35 - 45 ns Upper Turn-On Propagation Delay (HI Rising to HO Rising) tHPLH - 20 35 - 45 ns Delay Matching: Lower Turn-On and Upper Turn-Off tMON - 2 8 - 10 ns Delay Matching: Lower Turn-Off and Upper Turn-On tMOFF - 2 8 - 10 ns Either Output Rise/Fall Time tRC, tFC CL = 1000pF - 10 - - - ns Either Output Rise/Fall Time (3V to 9V) tR, tF CL = 0.1µF - 0.5 0.6 - 0.8 µs Either Output Rise Time Driving DMOS tRD CL = IRFR120 - 20 - - - ns Either Output Fall Time Driving DMOS tFD CL = IRFR120 - 10 - - - ns Minimum Input Pulse Width that Changes the Output tPW - - - - 50 ns Bootstrap Diode Turn-On or Turn-Off Time tBS - 10 - - - ns NOTE: 7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested.FN4022 Rev 15.00 Page 5 of 13 August 31, 2015

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HIP2100Timing Diagrams Pin Descriptions SYMBOL DESCRIPTION VDD Positive Supply to lower gate drivers. De-couple this pin to VSS. Bootstrap diode connected to HB. HB High-Side Bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip. HO High-Side Output. Connect to gate of High-Side power MOSFET. HS High-Side Source connection. Connect to source of High-Side power MOSFET. Connect negative side of bootstrap capacitor to this pin. HI High-Side input. LI Low-Side input. VSS Chip negative supply, generally will be ground. LO Low-Side Output. Connect to gate of Low-Side power MOSFET. EPAD Exposed Pad. Connect to ground or float. The EPAD is electrically isolated from all other pins. FIGURE 3. FIGURE 4. tHPLH, tLPLH tHPHL, tLPHL HI, LI HO, LO tMON tMOFF LI HI LO HO Typical Performance Curves FIGURE 5. OPERATING CURRENT vs FREQUENCY FIGURE 6. HB TO VSS OPERATING CURRENT vs FREQUENCY T = +125°C T = +25°C T = -40°C T = +150°C 10k 100k 1M 10 1 0.1 0.01 FREQUENCY (Hz) I D D O , I H B O ( m A ) T = -40°C T = +125°C T = +25°C T = +150°C 10 1 0.1 0.01 I H B S O ( m A ) 10k 100k 1M FREQUENCY (Hz)FN4022 Rev 15.00 Page 6 of 13 August 31, 2015

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HIP2100FIGURE 7. HIGH LEVEL OUTPUT VOLTAGE vs TEMPERATURE FIGURE 8. LOW LEVEL OUTPUT VOLTAGE vs TEMPERATURE FIGURE 9. UNDERVOLTAGE LOCKOUT THRESHOLD vs TEMPERATURE FIGURE 10. UNDERVOLTAGE LOCKOUT HYSTERESIS vs TEMPERATURE FIGURE 11. PROPAGATION DELAYS vs TEMPERATURE FIGURE 12. PEAK PULLUP CURRENT vs OUTPUT VOLTAGE Typical Performance Curves (Continued) TEMPERATURE (°C) V O H L , V O H H ( m V ) 500 400 300 200 100 -50 0 50 100 150 VHB = VDD = 9V VHB = VDD = 12V VHB = VDD = 14V TEMPERATURE (°C) V O L L , V O L H ( m V ) 500 400 300 200 100 -50 0 50 100 150 VHB = VDD = 9V VHB = VDD = 12V VHB = VDD = 14V TEMPERATURE (°C) -50 0 50 100 150 7.6 7.4 7.2 7.0 6.8 6.6 VDDR VHBR V H B R , V D D R ( V ) TEMPERATURE (°C) -50 0 50 100 150 0.54 0.50 0.46 0.42 0.38 0.30 VDDH VHBH V H B H , V D D H ( m V ) 0.34 tHPHL tHPLH tLPHL tLPLH TEMPERATURE (°C) -50 0 50 100 150 30 25 20 15 t L P L H , t L P H L , t H P L H , t H P H L ( n s ) 6 2.0 I H O , I L O ( A ) 12108420 2.5 1.5 1.0 0.5 0 VHO, VLO (V)FN4022 Rev 15.00 Page 7 of 13 August 31, 2015

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HIP2100FIGURE 13. PEAK PULLDOWN CURRENT vs OUTPUT VOLTAGE FIGURE 14. BOOTSTRAP DIODE I-V CHARACTERISTICS FIGURE 15. QUIESCENT CURRENT vs VOLTAGE FIGURE 16. VHS VOLTAGE vs VDD VOLTAGE Typical Performance Curves (Continued) 6 2.0 I L O , I H O ( A ) 12108420 2.5 1.5 1.0 0.5 0 VLO, VHO (V) 0.8 1.000 0.100 0.010 0.001 1·10-4 1·10-5 1·10-6 0.70.60.50.40.3 FORWARD VOLTAGE (V) F O R W A R D C U R R E N T ( A ) VDD, VHB (V) 0 5 10 15 60 50 40 0 I D D , I H B ( µ A ) 30 20 10 IDD vs VDD IHB vs VHB 120 100 80 60 40 20 0 14 15 1612 V H S T O V S S V O LT A G E ( V ) VDD TO VSS VOLTAGE (V)FN4022 Rev 15.00 Page 8 of 13 August 31, 2015

Page 10

HIP2100Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com For additional products, see www.intersil.com/en/products.html © Copyright Intersil Americas LLC 2004-2015. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at www.intersil.com. You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask. Reliability reports are also available from our website at www.intersil.com/support Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE August 31, 2015 FN4022.15 Updated Ordering Information Table on page 1. Added Revision History and About Intersil sections. Updated POD M8.15 from rev 1 to rev 4. Changes since rev 1: Updated to new format by removing table, moving dimensions onto drawing and adding land pattern Typical Recommended Land Pattern, changed the following: 2.41(0.095) to 2.20(0.087) 0.76 (0.030) to 0.60(0.023) 0.200 to 5.20(0.205) Changed Note 1 "1982" to "1994"FN4022 Rev 15.00 Page 9 of 13 August 31, 2015

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May 14, 2020

Very happy for the fast shipping and good price!

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May 11, 2020

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May 8, 2020

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May 6, 2020

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May 3, 2020

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April 29, 2020

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April 28, 2020

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April 25, 2020

Super easy to replace and labelled terminals made it a quick replacement.

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April 24, 2020

Various selection and thoughtful services! Prices are competitive as well. Thank you!

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April 22, 2020

The fastest shipping I've seen yet

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