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HIP6303CB-T

hot HIP6303CB-T

HIP6303CB-T

For Reference Only

Part Number HIP6303CB-T
Manufacturer Intersil
Description IC REG CTRLR BUCK 20SOIC
Datasheet HIP6303CB-T Datasheet
Package 20-SOIC (0.295", 7.50mm Width)
In Stock 11028 piece(s)
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HIP6303CB-T

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HIP6303CB-T Specifications

ManufacturerIntersil
CategoryIntegrated Circuits (ICs) - PMIC - Voltage Regulators - DC DC Switching Controllers
Datasheet HIP6303CB-T Datasheet
Package20-SOIC (0.295", 7.50mm Width)
Series-
Output TypePWM Signal
FunctionStep-Down
Output ConfigurationPositive
TopologyBuck
Number of Outputs4
Output Phases4
Voltage - Supply (Vcc/Vdd)4.75 V ~ 5.25 V
Frequency - Switching50kHz ~ 1.5MHz
Clock SyncNo
Control FeaturesEnable, Frequency Control, Power Good
Operating Temperature0°C ~ 70°C (TA)
Package / Case20-SOIC (0.295", 7.50mm Width)
Supplier Device Package20-SOIC

HIP6303CB-T Datasheet

Page 1

Page 2

FN4767 Rev.0.00 December 1999 HIP6303 Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller DATASHEETThe HIP6303 multi-phase PWM control IC together with its companion gate drivers, the HIP6601, HIP6602 or HIP6603 and Intersil MOSFETs provides a precision voltage regulation system for advanced microprocessors. Multiphase power conversion is a marked departure from earlier single channel converter configurations previously employed to satisfy the ever increasing current demands of modern microprocessors. Multi-phase converters, by distributing the power and load current results in smaller and lower cost transistors with fewer input and output capacitors. These reductions accrue from the higher effective conversion frequency with higher frequency ripple current due to the phase interleaving process of this topology. For example, a three channel converter operating at 350kHz will have a ripple frequency of 1.05MHz. Moreover, greater converter bandwidth of this design results in faster response to load transients. Outstanding features of this controller IC include programmable VID codes from the microprocessor that range from 1.30V to 2.05V with a system accuracy of 1%. Pull up currents on these VID pins eliminates the need for external pull up resistors. In addition “droop” compensation, used to reduce the overshoot or undershoot of the CORE voltage, is easily programmed with a single resistor. Another feature of this controller IC is the PGOOD monitor circuit which is held low until the CORE voltage increases, during its Soft-Start sequence, to within 10% of the programmed voltage. Over-voltage, 15% above programmed CORE voltage, results in the converter shutting down and turning the lower MOSFETs ON to clamp and protect the microprocessor. Under voltage is also detected and results in PGOOD low if the CORE voltage falls 10% below the programmed level. Over-current protection reduces the regulator current to less than 25% of the programmed trip value. These features provide monitoring and protection for the microprocessor and power system. Features • AMD Athlon Compatible • Multi-Phase Power Conversion • Precision Channel Current Sharing - Loss Less Current Sampling - Uses rDS(ON) • Precision CORE Voltage Regulation - 1% System Accuracy Over Temperature • Microprocessor Voltage Identification Input - 4-Bit VID Input - 1.30V to 2.05V in 50mV Steps - Programmable “Droop” Voltage • Fast Transient Recovery Time • Over Current Protection • Automatic Selection of 2, 3, or 4 Channel Operation • High Ripple Frequency, (Channel Frequency) Times Number of Channels . . . . . . . . . . . . . . . .100kHz to 6MHz Pinout HIP6303 (SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. (oC) PACKAGE PKG. NO. HIP6303CB 0 to 70 20 Ld SOIC M20.3 HIP6303CB-T 20 Ld SOIC Tape and Reel HIP6303EVAL1 Evaluation Platform 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1VID3 VID2 VID1 VID0 EN FS/DIS PWM2 PGOOD PWM3 ISEN4 ISEN1 VCC GND ISEN3 FB PWM4 VSEN COMP PWM1 ISEN2FN4767 Rev.0.00 Page 1 of 16 December 1999

Page 3

HIP6303Block Diagram      D/A CURRENT CORRECTION OV LATCH POWER-ON RESET (POR) SOFT- START AND FAULT LOGIC + - + - UV OVP + - E/A + - PWM PWM OC + - PWM1 PWM2 PWM3 PWM4 GND PGOOD VCC FB I_TRIP FS/EN S STATE I_TOT + - + - + - + - + + + + + - CHANNEL + - PWM + - PWM CLOCK AND NUMBER THREE VID0 VID1 VID2 VID3 EN COMP VSEN GENERATOR SAWTOOTH X1.15 X 0.9 ISEN1 ISEN2 ISEN3 ISEN4 CHANNEL DETECTORFN4767 Rev.0.00 Page 2 of 16 December 1999

Page 4

HIP6303Simplified Power System Diagram Functional Pin Description VID3 (Pin 1), VID2 (Pin 2), VID1 (Pin 3) and VID0 (Pin 4) Voltage Identification inputs from microprocessor. These pins respond to TTL and 3.3V logic signals. The HIP6303 decodes VID bits to establish the output voltage. See Table 1. EN (Pin 5) Enable pin normal operation is with input open or high. A low input disables the regulator and three states the PWM outputs. COMP (Pin 6) Output of the internal error amplifier. Connect this pin to the external feedback and compensation network. FB (Pin 7) Inverting input of the internal error amplifier. FS/DIS (Pin 8) Channel frequency, FSW, select and disable. A resistor from this pin to ground sets the switching frequency of the converter. Pulling this pin to ground disables the converter and three states the PWM outputs. See Figure 10. GND (Pin 9) Bias and reference ground. All signals are referenced to this pin. VSEN (Pin 10) Power good monitor input. Connect to the microprocessor- CORE voltage. PWM1 (Pin 15), PWM2 (Pin 14), PWM3 (Pin 11) and PWM4 (Pin 18) PWM outputs for each driven channel in use. Connect these pins to the PWM input of a HIP6601/2/3 driver. For systems which use 3 channels, connect PWM4 high. Two channel systems connect PWM3 and PWM4 high. ISEN1 (Pin 16), ISEN2 (Pin 13), ISEN3 (Pin 12) and ISEN4 (Pin 17) Current sense inputs from the individual converter channel’s phase nodes. Unused sense lines MUST be left open. PGOOD (Pin 19) Power good. This pin provides a logic-high signal when the microprocessor-CORE voltage (VSEN pin) is within specified limits and Soft-Start has timed out. VCC (Pin 20) Bias supply. Connect this pin to a 5V supply. SYNCHRONOUS HIP6303 MICROPROCESSOR VSEN VID RECTIFIED BUCK CHANNEL SYNCHRONOUS RECTIFIED BUCK CHANNEL SYNCHRONOUS RECTIFIED BUCK CHANNEL SYNCHRONOUS RECTIFIED BUCK CHANNEL PWM 1 PWM 2 PWM 3 PWM 4 11 12 13 14 15 16 17 18 20 19 10 9 8 7 6 5 4 3 2 1VID3 VID2 VID1 VID0 EN FS/DIS PWM2 PGOOD PWM3 ISEN4 ISEN1 VCC GND ISEN3 FB PWM4 VSEN COMP PWM1 ISEN2FN4767 Rev.0.00 Page 3 of 16 December 1999

Page 5

HIP6303Typical Application - AMD Athlon2 Channel Converter Using HIP6601 Gate Drivers MAIN CONTROL HIP6303 VID3 VID0 PGOOD FB +5V COMP PWM3 PWM2 PWM1 ISEN3 ISEN2 ISEN1 VSEN DRIVER HIP6601 PWM VCC BOOT UGATE PHASE LGATE VIN = +5V PVCC PWM VCC BOOT UGATE PHASE LGATE VIN = +5V DRIVER HIP6601 PVCC FS/DIS PWM4 ISEN4 NC GND GND GND VCC +VCORE NC +12V +12V VID2 EN VID1FN4767 Rev.0.00 Page 4 of 16 December 1999

Page 6

HIP6303Typical Application - 4 Channel Converter Using HIP6602 Gate Drivers VID3 VID2 VID1 VID0 FB +5V COMP PWM1 PWM2 ISEN2 PWM3 PWM4 ISEN4 VSEN FS/DIS ISEN1 ISEN3 GND EN VIN +12VBOOT2 UGATE2 PHASE2 LGATE2 BOOT1 UGATE1 PHASE1 LGATE1 PWM1 PVCC +5V VCC VIN = +12V+12V DUAL DRIVER HIP6602 VIN +12VBOOT4 UGATE4 PHASE4 LGATE4 BOOT3 UGATE3 PHASE3 LGATE3 PWM3 PVCC +5V VCC VIN+12V+12V DUAL DRIVER HIP6602 PGOOD GND GND VCC +VCORE L01 L02 L03 L04 PWM2 PWM4 MAIN CONTROL HIP6303FN4767 Rev.0.00 Page 5 of 16 December 1999

Page 7

HIP6303Absolute Maximum Ratings Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+7V Input, Output, or I/O Voltage . . . . . . . . . . GND -0.3V to VCC + 0.3V ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class TBD Recommended Operating Conditions Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V 5% Ambient Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC Thermal Information Thermal Resistance (Typical, Note 1) JA ( oC/W) SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (SOIC - Lead Tips Only) CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications Operating Conditions: VCC = 5V, TA = 0oC to 70oC, Unless Otherwise Specified PARAMETER TEST CONDITIONS MIN TYP MAX UNITS INPUT SUPPLY POWER Input Supply Current RT = 100k, Active and Disabled Maximum Limit - 10 15 mA POR (Power-On Reset) Threshold VCC Rising 4.25 4.38 4.5 V VCC Falling 3.75 3.88 4.00 V REFERENCE AND DAC System Accuracy Percent system deviation from programmed VID Codes -1 - 1 % DAC (VID0 - VID3) Input Low Voltage DAC Programming Input Low Threshold Voltage - - 0.8 V DAC (VID0 - VID3) Input High Voltage DAC Programming Input High Threshold Voltage 2.0 - - V VID Pull-Up VIDx = 0V or VIDx = 3V 10 20 30 A CHANNEL GENERATOR Frequency, FSW RT = 100k, 1% 245 275 305 kHz Adjustment Range See Figure 10 0.05 - 1.5 MHz Disable Voltage Maximum voltage at FS/DIS to disable controller. IFS/DIS = 1mA. - - 1.0 V ERROR AMPLIFIER DC Gain RL = 10K to ground - 72 - dB Gain-Bandwidth Product CL = 100pF, RL = 10K to ground - 18 - MHz Slew Rate CL = 100pF, Load = 400A - 5.3 - V/s Maximum Output Voltage RL = 10K to ground, Load = 400A 3.6 4.1 - V Minimum Output Voltage RL = 10K to ground, Load = -400A - 0.16 0.5 V ISEN Full Scale Input Current - 50 - A Over-Current Trip Level - 82.5 - A POWER GOOD MONITOR Under-Voltage Threshold VSEN Rising - 0.92 - VDAC Under-Voltage Threshold VSEN Falling - 0.90 - VDAC PGOOD Low Output Voltage IPGOOD = 4mA - 0.18 0.4 V PROTECTION Over-Voltage Threshold VSEN Rising 1.12 1.15 1.2 VDAC Percent Over-Voltage Hysteresis VSEN Falling after Over-Voltage - 2 - %FN4767 Rev.0.00 Page 6 of 16 December 1999

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HIP6303Operation Figure 1 shows a simplified diagram of the voltage regulation and current control loops. Both voltage and current feedback are used to precisely regulate voltage and tightly control output currents, IL1 and IL2, of the two power channels. The voltage loop comprises the Error Amplifier, Comparators, gate drivers and output MOSFETS. The Error Amplifier is essentially connected as a voltage follower that has as an input, the Programmable Reference DAC and an output that is the CORE voltage. Voltage Loop Feedback from the CORE voltage is applied via resistor RIN to the inverting input of the Error Amplifier. This signal can drive the Error Amplifier output either high or low, depending upon the CORE voltage. Low CORE voltage makes the amplifier output move towards a higher output voltage level. Amplifier output voltage is applied to the positive inputs of the Comparators via the Correction summing networks. Out-of- phase sawtooth signals are applied to the two Comparators inverting inputs. Increasing Error Amplifier voltage results in increased Comparator output duty cycle. This increased duty cycle signal is passed through the PWM CIRCUIT with no phase reversal and on to the HIP6601, again with no phase reversal for gate drive to the upper MOSFETs, Q1 and Q3. Increased duty cycle or ON time for the MOSFET transistors results in increased output voltage to compensate for the low output voltage sensed. Current Loop The current control loop works in a similar fashion to the voltage control loop, but with current control information applied individually to each channel’s Comparator. The information used for this control is the voltage that is developed across rDS(ON) of each lower MOSFET, Q2 and Q4, when they are conducting. A single resistor converts and scales the voltage across the MOSFETs to a current that is applied to the Current Sensing circuit within the HIP6303. Output from these sensing circuits is applied to the current averaging circuit. Each PWM channel receives the difference current signal from the summing circuit that compares the average sensed current to the individual channel current. When a power channel’s current is greater than the average current, the signal applied via the CURRENT SENSING COMPARATOR PWM CIRCUIT + RISEN1 + CORRECTION ERROR AMPLIFIER FB REFERENCE ISEN1 RIN VCORE Q3 Q4 L02 PHASE PWM1 IL2 DAC HIP6303 COUT RLOAD VIN HIP6601 - Q1 Q2 L01 PHASE IL1 VIN HIP6601 CURRENT SENSING COMPARATOR PWM CIRCUITCORRECTION PWM2 - I AVERAGE + + + - PROGRAMMABLE RISEN2ISEN2 - - - - + + CURRENT AVERAGING FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE HIP6303 VOLTAGE AND CURRENT CONTROL LOOPS FOR A TWO POWER CHANNEL REGULATOR     FN4767 Rev.0.00 Page 7 of 16 December 1999

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HIP6303summing Correction circuit to the Comparator, reduces the output pulse width of the Comparator to compensate for the detected “above average” current in that channel. Droop Compensation In addition to control of each power channel’s output current, the average channel current is also used to provide CORE voltage “droop” compensation. Average full channel current is defined as 50A. By selecting an input resistor, RIN, the amount of voltage droop required at full load current can be programmed. The average current driven into the FB pin results in a voltage increase across resistor RIN that is in the direction to make the Error Amplifier “see” a higher voltage at the inverting input, resulting in the Error Amplifier adjusting the output voltage lower. The voltage developed across RIN is equal to the “droop” voltage. See the “Current Sensing and Balancing” section for more details. Applications and Converter Start-Up Each PWM power channel’s current is regulated. This enables the PWM channels to accurately share the load current for enhanced reliability. The HIP6601, HIP6602 or HIP6603 MOSFET driver interfaces with the HIP6303. For more information, see the HIP6601, HIP6602 or HIP6603 data sheets. The HIP6303 is capable of controlling up to 4 PWM power channels. Connecting unused PWM outputs to VCC automatically sets the number of channels. The phase relationship between the channels is 360o/number of active PWM channels. For example, for three channel operation, the PWM outputs are separated by 120o. Figure 2 shows the PWM output signals for a four channel system. Power supply ripple frequency is determined by the channel frequency, FSW, multiplied by the number of active channels. For example, if the channel frequency is set to 250kHz and there are three channels, the ripple frequency is 750kHz. The IC monitors and precisely regulates the CORE voltage of a microprocessor. After initial start-up, the controller also provides protection for the load and the power supply. The following section discusses these features. Initialization The HIP6303 usually operates from an ATX power supply. Many functions are initiated by the rising supply voltage to the VCC pin of the HIP6303. Oscillator, Sawtooth Generator, Soft- Start and other functions are initialized during this interval. These circuits are controlled by POR, Power-On Reset. During this interval, the PWM outputs are driven to a three state condition that makes these outputs essentially open. This state results in no gate drive to the output MOSFETS. Once the VCC voltage reaches 4.375V (+125mV), a voltage level to insure proper internal function, the PWM outputs are enabled and the Soft-Start sequence is initiated. If for any reason, the VCC voltage drops below 3.875V (+125mV). The POR circuit shuts the converter down and again three states the PWM outputs. Soft-Start After the POR function is completed with VCC reaching 4.375V, the Soft-Start sequence is initiated. Soft-Start, by its slow rise in CORE voltage from zero, avoids an over-current condition by slowly charging the discharged output capacitors. This voltage rise is initiated by an internal DAC that slowly raises the reference voltage to the error amplifier input. The voltage rise is controlled by the oscillator frequency and the DAC within the HIP6303. Therefore, the output voltage is effectively regulated as it rises to the final programmed CORE voltage value. For the first 32 PWM switching cycles, the DAC output remains inhibited and the PWM outputs remain three stated. From the 33rd cycle and for another, approximately 150 cycles the PWM output remains low, clamping the lower output MOSFETs to ground, see Figure 3. The time variability is due to the Error Amplifier, Sawtooth Generator and Comparators moving into their active regions. After this short interval, the PWM outputs are enabled and increment the PWM pulse width from zero duty cycle to operational pulse width, thus allowing the output voltage to slowly reach the CORE voltage. The CORE voltage will reach its programmed value before the 2048 cycles, but the PGOOD output will not be initiated until the 2048th PWM switching cycle. The Soft-Start time or delay time, DT = 2048/FSW. For an oscillator frequency, FSW, of 200kHz, the first 32 cycles or 160s, the PWM outputs are held in a three state level as explained above. After this period and a short interval PWM 1 PWM 2 PWM 3 PWM 4 FIGURE 2. FOUR PHASE PWM OUTPUT AT 500kHzFN4767 Rev.0.00 Page 8 of 16 December 1999

Page 10

HIP6303described above, the PWM outputs are initiated and the voltage rises in 10.08ms, for a total delay time DT of 10.24ms. Figure 3 shows the start-up sequence as initiated by a fast rising 5V supply, VCC, applied to the HIP6303. Note the short rise to the three state level in PWM 1 output during first 32 PWM cycles. Figure 4 shows the waveforms when the regulator is operating at 200kHz. Note that the Soft-Start duration is a function of the Channel Frequency as explained previously. Also note the pulses on the COMP terminal. These pulses are the current correction signal feeding into the comparator input (see the Block Diagram on page 2). Figure 5 shows the regulator operating from an ATX supply. In this figure, note the slight rise in PGOOD as the 5V supply rises.The PGOOD output stage is made up of NMOS and PMOS transistors. On the rising VCC, the PMOS device becomes active slightly before the NMOS transistor pulls “down”, generating the slight rise in the PGOOD voltage. . Note that Figure 5 shows the 12V gate driver voltage available before the 5V supply to the HIP6303 has reached its threshold level. If conditions were reversed and the 5V supply was to rise first, the start-up sequence would be different. In this case the HIP6303 will sense an over-current condition due to charging the output capacitors. The supply will then restart and go through the normal Soft-Start cycle. Fault Protection The HIP6303 protects the microprocessor and the entire power system from damaging stress levels. Within the HIP6303 both Over-Voltage and Over-Current circuits are incorporated to protect the load and regulator. Over-Voltage The VSEN pin is connected to the microprocessor CORE voltage. A CORE over-voltage condition is detected when the VSEN pin goes more than 15% above the programmed VID level. The over-voltage condition is latched, disabling normal PWM operation, and causing PGOOD to go low. The latch can only be reset by lowering and returning VCC high to initiate a POR and Soft-Start sequence. During a latched over-voltage, the PWM outputs will be driven either low or three state, depending upon the VSEN input. PWM outputs are driven low when the VSEN pin detects that the CORE voltage is 15% above the programmed VID level. This condition drives the PWM outputs low, resulting in the lower or synchronous rectifier MOSFETS to conduct and shunt the CORE voltage to ground to protect the load. PWM 1 PGOOD VCORE 5V OUTPUT VCC VIN = 12V DELAY TIME FIGURE 3. START-UP OF 4 PHASE SYSTEM OPERATING AT 500kHz PGOOD VCORE 5V V COMP VCC VIN = 12V DELAY TIME FIGURE 4. START-UP OF 4 PHASE SYSTEM OPERATING AT 200kHz 12V ATX SUPPLY PGOOD 5 V ATX VCORE SUPPLY ATX SUPPLY ACTIVATED BY ATX “PS-ON PIN” VIN = 5V, CORE LOAD CURRENT = 31A FIGURE 5. SUPPLY POWERED BY ATX SUPPLY FREQUENCY 200kHZFN4767 Rev.0.00 Page 9 of 16 December 1999

HIP6303CB-T Reviews

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Stel*****arding

January 1, 2020

The helper is super handy, especially if you work with medium size PCB boards as it allows to hold the board steady in every position. It feels pretty sturdy and of good quality.

Zur*****atson

December 16, 2019

On time and as described, fast delivery. Would definitely buy again. Thx.

Mabe*****faro

December 9, 2019

This was a useful assortment of product that filled in a parts gap that I had on my electronic workbench. Thank you.

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December 5, 2019

Every time I order, I get it correctly filled and faster than most of website. For a friendly use operate system, you guys are the best!

Sulli*****atthai

October 25, 2019

Excellent ! HIP6303CB-T item arrived very quickly and was packaged well, no issues.

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October 21, 2019

Your prices are low and your website is customer-use friendly.

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October 2, 2019

Very Quick,no problems - Thank you.

Zacha*****Mathai

September 21, 2019

All OK, fast delivery, good quality. Product works as it should, Nice Seller.

Bro*****Reese

September 18, 2019

They work great and I hope to find more used for the extra ones.

Karee*****nders

August 30, 2019

Resonators were genuine Murata components and arrived in 3 days from Hongkong

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