The Universal Asynchronous Receiver-Transmitter (UART) module is a computer hardware that is used for serial transmission of data between a computer and its peripherals or over a network. This UART module is generally fabricated in the form of an IC which is used for serial communication over the serial port of the device concerned. The UART wife module, however, only produces a logic-level signal while the task of transmitting the signal between the devices in the form of current levels, voltage levels (as in the case of wired transmission), or radio waves (as in case of WiFi) is performed by some external interfacing device or drivers.
Data representation used by UART
The representation of a character in the form of a series of bits has a certain predefined pattern which is consistent with both the transmitter and the receiver UART modules. The format of data and transmission speeds, however, can be configured.
In idle condition i.e. when no data is being transmitted, the signal logic is“High”. The first bit for any character is essentially“low” and is known as the starting bit. It indicates the receiver that a new character is being transmitted. The next 5-9 bits (depends on the defined format) are the data bits and represent the character that is actually to be transmitted. Then, there may be a parity bit which helps detect any error in the transmission. In the end, there is an end bit which has the logic“1” and indicated that the transmission for the current character is completed.
Transmission and reception of the signal
The transmitting, as well as the receiving systems, have shift registers where the data bits are temporarily stored before transmission or after the reception. These also aid the conversion of the data bits from series to parallel, and vice-versa.
When the transmitting UART detects a new character in the associated register, it generates the parity bit (if needed) and then sends the start bit, the data bits, the parity bit(s), and finally, the stop bit.
The receiving UART module keeps checking for the start bit with every clock pulse. As soon as the start pulse is detected, it starts receiving the data bits and parity bits. Then, it waits for the stop bit. If the stop bit is not detected within one character’s time, then it considers it to be a false signal and discards it. The same happens when the parity bit doesn’t match. When a genuine signal is received, it is stored in the register and a signal is sent to the processor to receive it.
