First implemented in a plastic package RT FPGA JEDEC qualification | Heisener Electronics
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First implemented in a plastic package RT FPGA JEDEC qualification

Technology Cover
Post Date: 2022-02-21, Microchip Technology

    Developers of small satellite constellations and other systems used in new space missions must achieve high reliability and radiation protection while meeting stringent cost and scheduling requirements. Microchip technology has provided them with a faster, more economical production path with the first RT out of the low-cost FPGA JeDEC-Qualified plastic package and the proven reliability of RTG4 FPGA technology and decades of aerospace heritage, so they do not need to be screened by a full QML program.

    Ken O 'Neill, associate director of Aerospace and Aerospace marketing for Microchip's FPGA business unit  said:"This is an important milestone for system designers who need a large number of space-class components at low unit cost and reduced lead times," "These RTG4 FPgas have high standards for reliability and radiation protection, while reducing costs using plastic packaging and sub-QML screening."

    The plastic-packaged RTG4 Sub-QML FPGA is also available as a small number of prototypes, enabling designers to evaluate products and prototype systems prior to a large number of flight models. The COMPANY's RTG4 Sub-QML FPGA has passed JEDEC standards and is packaged in 1657 BGA flip chip plastic with a ball pitch of 1 mm. It is compatible with the company's QML Class V qualified ceramic package RTG4 FPGA interface, allowing developers to simply migrate designs between new Spaces and more rigorous Level 1 tasks.

    Other plastic packaging products the company offers for aerospace systems include its LX7720 position sensing and motor controller, LX7730 telemetry controller, and highly reliable plastic versions of its microcontrollers, microprocessors, Ethernet physical controllers, ADC, Flash and EEPROM memory.

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