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AD8275ARMZ

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AD8275ARMZ

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Part Number AD8275ARMZ
Manufacturer Analog Devices Inc.
Description IC OPAMP DIFF 15MHZ RRO 8MSOP
Datasheet AD8275ARMZ Datasheet
Package 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
In Stock 4,820 piece(s)
Unit Price $ 4.4300 *
Lead Time Can Ship Immediately
Estimated Delivery Time Jun 3 - Jun 8 (Choose Expedited Shipping)
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Part Number # AD8275ARMZ (Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps) is manufactured by Analog Devices Inc. and distributed by Heisener. Being one of the leading electronics distributors, we carry many kinds of electronic components from some of the world’s top class manufacturers. Their quality is guaranteed by its stringent quality control to meet all required standards.

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AD8275ARMZ Specifications

ManufacturerAnalog Devices Inc.
CategoryIntegrated Circuits (ICs) - Linear - Amplifiers - Instrumentation, OP Amps, Buffer Amps
Datasheet AD8275ARMZDatasheet
Package8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Series-
Amplifier TypeDifferential
Number of Circuits1
Output TypeRail-to-Rail
Slew Rate25 V/µs
Gain Bandwidth Product-
-3db Bandwidth15MHz
Current - Input Bias-
Voltage - Input Offset300µV
Current - Supply1.9mA
Current - Output / Channel30mA
Voltage - Supply, Single/Dual (±)3.3 V ~ 15 V
Operating Temperature-40°C ~ 85°C
Mounting TypeSurface Mount
Package / Case8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Supplier Device Package8-MSOP

AD8275ARMZ Datasheet

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G = 0.2, Level Translation, 16-Bit ADC Driver Data Sheet AD8275 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2008–2018 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES Translates ±10 V to +4 V Drives 16-bit SAR ADCs Small MSOP package Input overvoltage: +40 V to −35 V (VS = 5 V) Fast settling time: 450 ns to 0.001% Rail-to-rail output Wide supply operation: +3.3 V to +15 V High CMRR: 80 dB Low gain drift: 1 ppm/°C Low offset drift: 2.5 μV/°C APPLICATIONS Level translator ADC driver Instrumentation amplifier building block Automated test equipment PIN CONFIGURATION 0 75 46 -0 01 REF1 1 –IN 2 +IN 3 –VS 4 REF28 +VS7 OUT6 SENSE5 AD8275 TOP VIEW (Not to Scale) Figure 1. TYPICAL APPLICATION 07 5 46 -0 0 2 VREF 4.096V AD8275 7 4 5 6 8 2 50kΩ 0.1µF 50kΩ 20kΩ 20kΩ 33Ω 10kΩ 3 +IN –IN VIN REF2 REF1 –VS +VS +5V OUT SENSE 0.1µF 2.7nF 10µF 1 AD7685 VDD GNDREF IN+ IN– +10V –10V +4.048V +0.048V +2.048V Figure 2. Translating ±10 V to 4.096 V ADC Full Scale GENERAL DESCRIPTION The AD8275 is a G = 0.2 difference amplifier that can be used to translate ±10 V signals to a +4 V level. It solves the problem typically encountered in industrial and instrumentation applic- ations where ±10 V signals must be interfaced to a single-supply 4 V or 5 V ADC. The AD8275 interfaces the two signal levels, simplifying design. The AD8275 has fast settling time of 450 ns and low distortion, making it suitable for driving medium speed successive approx- imation (SAR) ADCs. Its wide input voltage range and rail-to- rail outputs make it an easy to use building block. Single-supply operation reduces the power consumption of the amplifier and helps to protect the ADC from overdrive conditions. Internal, matched, precision laser-trimmed resistors ensure low gain error, low gain drift of 1 ppm/°C (maximum), and high common-mode rejection of 80 dB. Low offset and low offset drift, combined with its fast settling time, make the AD8275 suitable for a variety of data acquisition applications where accurate and quick capture is required. The AD8275 can be used as an analog front end, or it can follow buffers to level translate high voltages to a voltage range accepted by the ADC. In addition, the AD8275 can be configured for differential outputs if used with a differential ADC. The AD8275 is available in a space-saving, 8-lead MSOP and is specified for performance over the −40°C to +85°C temperature range. Table 1. Difference Amplifiers by Category Low Distortion High Voltage Single-Supply Current Sense AD8270 AD628 AD8202 AD8273 AD629 AD8203 AD8274 AD8205 AD8275 AD8206 AMP03 AD8216

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AD8275 Data Sheet Rev. B | Page 2 of 16 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Pin Configuration ............................................................................. 1 Typical Application ........................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Absolute Maximum Ratings ............................................................ 4 Maximum Power Dissipation ..................................................... 4 ESD Caution .................................................................................. 4 Pin Configuration and Function Descriptions ............................. 5 Typical Performance Characteristics ............................................. 6 Theory of Operation ...................................................................... 11 Basic Connection ........................................................................ 11 Power Supplies ............................................................................ 12 Reference ..................................................................................... 12 Common-Mode Input Voltage Range ..................................... 12 Input Protection ......................................................................... 12 Configurations ............................................................................ 13 Applications Information .............................................................. 14 Driving a Single-Ended ADC ................................................... 14 Differential Outputs ................................................................... 14 Increasing Input Impedance ..................................................... 15 AC Coupling ............................................................................... 15 Using the AD8275 as a Level Translator in a Data Acquisition System .......................................................................................... 15 Outline Dimensions ....................................................................... 16 Ordering Guide .......................................................................... 16 REVISION HISTORY 11/2018—Rev. A to Rev. B Change to Table 7 ........................................................................... 13 8/2010—Rev. 0 to Rev. A Changes to Figure 40 ...................................................................... 14 10/2008—Revision 0: Initial Version

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Data Sheet AD8275 Rev. B | Page 3 of 16 SPECIFICATIONS VS = 5 V, G = 0.2, REF1 connected to GND and REF2 connected to 5 V, RL = 2 kΩ connected to VS/2, TA = 25°C, unless otherwise noted. Specifications referred to output unless otherwise noted. Table 2. A Grade B Grade Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Small Signal Bandwidth −3 dB 10 15 10 15 MHz Slew Rate 4 V step 20 25 20 25 V/µs Settling Time to 0.01% 4 V step on output, CL = 100 pF 350 350 450 ns Settling Time to 0.001% 4 V step on output, CL = 100 pF 450 450 550 ns Overload Recovery Time 50% overdrive 300 300 ns NOISE/DISTORTION1 THD + N f = 1 kHz, VOUT = 4 V p-p, 22 kHz band pass filter 106 106 dB Voltage Noise f = 0.1 Hz to 10 Hz, referred to output 1 4 1 4 µV p-p Spectral Noise Density f = 1 kHz, referred to output 40 40 nV/√Hz GAIN VREF2 = 4.096 V, REF1 and RL connected to GND, (VIN+) − (VIN−) = −10 V to +10 V 0.2 0.2 V/V Gain Error 0.024 0.024 % Gain Drift −40°C to +85°C 1 3 0.3 1 ppm/°C Gain Nonlinearity VOUT = 4 V p-p, RL = 600 Ω, 2 kΩ, 10 kΩ 2.5 2.5 3 ppm OFFSET AND CMRR Offset2 Referred to output, VS = ±2.5 V, reference and input pins grounded 300 700 150 500 µV vs. Temperature −40°C to +85°C 2.5 2.5 7 µV/°C vs. Power Supply VS = 3.3 V to 5 V 90 100 dB Reference Divider Accuracy 0.024 0.024 % Common-Mode Rejection Ratio3 VCM = ±10 V, referred to output 80 96 86 dB INPUT CHARACTERISTICS Input Voltage Range4 −12.3 +12 −12.3 +12 V Impedance5 Differential VCM = VS/2 108||2 108||2 kΩ||pF Common Mode 27.5||2 27.5||2 kΩ||pF OUTPUT CHARACTERISTICS Output Swing VREF2 = 4.096 V, REF1 and RL connected to GND, RL = 2 kΩ −VS + 0.048 +VS − 0.1 −VS + 0.048 +VS − 0.1 V Capacitive Load6 100 100 pF Short-Circuit Current Limit 30 30 mA POWER SUPPLY Specified Voltage Range 5 5 V Operating Voltage Range 3.3 15 3.3 15 V Supply Current IO = 0 mA, VS = ±2.5 V, reference and input pins grounded 1.9 2.3 1.9 2.3 mA Over Temperature IO = 0 mA, VS = ±2.5 V, reference and input pins grounded, −40°C to +85°C 2.1 2.7 2.1 2.7 mA TEMPERATURE RANGE Specified Performance −40 +85 −40 +85 °C 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset current errors. 3 See Figure 7 for CMRR vs. temperature. 4 The input voltage range is a function of the voltage supplies, reference voltage, and ESD diodes. When operating on other supply voltages, see the Absolute Maximum Ratings section, Figure 11, and Table 5 for more information. 5 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. 6 See Figure 25 to Figure 28 in the Typical Performance Characteristics section for more information.

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AD8275 Data Sheet Rev. B | Page 4 of 16 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Supply Voltage 18 V Output Short-Circuit Current See derating curve (Figure 3) Voltage at +IN, −IN Pins −VS + 40 V, +VS − 40 V Voltage at REFx, +VS, − VS, SENSE, and OUT Pins −VS − 0.5 V, +VS + 0.5 V Current into REFx, +IN, −IN, SENSE, and OUT Pins 3 mA Storage Temperature Range −65°C to +130°C Specified Temperature Range −40°C to +85°C Thermal Resistance (θJA) 135°C/W Package Glass Transition Temperature (TG) 140°C ESD Human Body Model 2 kV Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8275 package is limited by the associated rise in junction temperature (TJ) on the die. The plastic encapsulating the die locally reaches the junction temperature. At approximately 140°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8275. Exceeding a junction temperature of 140°C for an extended period can result in changes in silicon devices, potentially causing failure. The still air thermal properties of the package and PCB (θJA), the ambient temperature (TA), and the total power dissipated in the package (PD) determine the junction temperature of the die. The junction temperature is calculated as follows: TJ = TA + (PD × θJA) The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent power is the voltage between the supply pins (VS) times the quiescent current (IS). Assuming the load (RL) is referenced to midsupply, the total drive power is VS/2 × IOUT, some of which is dissipated in the package and some of which is dissipated in the load (VOUT × IOUT). The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power) ( ) L OUT L OUTS SSD R V R VV IVP 2 – 2        ×+×= In single-supply operation with RL referenced to –VS, the worst case is VOUT = VS/2. Airflow increases heat dissipation, effectively reducing θJA. In addition, more metal directly in contact with the package leads from metal traces, through holes, ground, and power planes reduces θJA. Figure 3 shows the maximum safe power dissipation in the package vs. the ambient temperature on a 4-layer JEDEC standard board. 0 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 –40 0–20 20 40 60 80 100 120 07 54 6- 00 3M AX IM UM P O W ER D IS SI PA TI O N (W ) AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION

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Data Sheet AD8275 Rev. B | Page 5 of 16 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 07 54 6- 00 1 REF1 1 –IN 2 +IN 3 –VS 4 REF28 +VS7 OUT6 SENSE5 AD8275 TOP VIEW (Not to Scale) Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 REF1 Reference Pin. Sets the output voltage level (see the Reference section). 2 −IN Negative Input Pin. 3 +IN Positive Input Pin. 4 −VS Negative Supply Pin. 5 SENSE Sense Output Pin. Tie this pin to the OUT pin. 6 OUT Output Pin (Force Output). 7 +VS Positive Supply Pin. 8 REF2 Reference Pin. Sets the output voltage level (see the Reference section).

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AD8275 Data Sheet Rev. B | Page 6 of 16 TYPICAL PERFORMANCE CHARACTERISTICS VS = 5 V, G = 0.2, REF1 connected to GND and REF2 connected to 5 V, RL = 2 kΩ connected to VS/2, TA = 25°C, unless otherwise noted. 07 54 6- 00 4 OFFSET VOLTAGE (µV) HI TS 0 2 4 6 10 8 12 14 –600 –400 –200 0 200 400 600 Figure 5. Typical Distribution of System Offset Voltage, Referred to Output 07 54 6- 00 5 CMRR (µV/V) HI TS 0 10 20 30 40 50 60 70 –60 –40 –20 0 20 40 60 Figure 6. Typical Distribution of CMRR, Referred to Output 07 54 6- 00 6 TEMPERATURE (°C) CM RR (µ V/ V) 60 40 20 0 –20 –40 –60 –40 –20 0 20 40 60 80 100 120 Figure 7. CMRR vs. Temperature, Normalized at 25°C 07 54 6- 00 7 TEMPERATURE (°C) O FF SE T VO LT AG E (µ V) –40 –20 0 20 40 60 80 100 120 –300 –250 –200 –150 –100 –50 50 0 100 150 200 250 300 NORMALIZED AT 25°C, REPRESENTATIVE SAMPLES Figure 8. Offset Voltage vs. Temperature, Normalized at 25°C, Referred to Output 07 54 6- 00 8 TEMPERATURE (°C) G AI N ER RO R (µ V/ V) –45 –30 –15 0 15 30 45 60 75 90 105 120 50 40 30 20 10 0 –10 –20 –30 –40 –50 GAIN ERROR NORMALIZED AT 25°C Figure 9. Gain Error vs. Temperature, Normalized at 25°C 07 54 6- 00 9 TEMPERATURE (°C) –50 –25 5 4 3 2 1 0 Q UI ES CE NT C UR RE NT (m A) 25 50 75 3.3V 100 125 5V Figure 10. Quiescent Current vs. Temperature

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Data Sheet AD8275 Rev. B | Page 7 of 16 07 54 6- 01 0 OUTPUT VOLTAGE (V) IN PU T CO M M O N- M O DE V O LT AG E (V ) –0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 35 30 25 20 15 10 5 0 –5 –10 –15 –20 –25 Figure 11. Input Common-Mode Voltage vs. Output Voltage, No Load 0 –5 –10 –15 –20 –25 –30 –35 –40 G AI N (d B) 1k100 10k 100k 1M 100M10M 07 54 6- 01 1 FREQUENCY (Hz) Figure 12. Gain vs. Frequency 07 54 6- 01 2 40 50 60 80 70 90 100 100 1k 10k 100k 10M1M FREQUENCY (Hz) CO M M O N- M O DE R EJ EC TI O N (d B) Figure 13. Common-Mode Rejection vs. Frequency, Referred to Input 07 54 6- 01 3 FREQUENCY (Hz) PO W ER S UP PL Y RE JE CT IO N (d B) –20 0 20 40 60 80 100 120 100 1M100k10k1k Figure 14. Power Supply Rejection vs. Frequency, Referred to Output 07 54 6- 01 4 6 5 4 3 2 1 0 M AX IM UM O UT PU T VO LT AG E (V p -p ) 1k100 10k 100k 1M 10M FREQUENCY (Hz) Figure 15. Maximum Output Voltage vs. Frequency 07 54 6- 01 5 20 15 10 5 –5 –15 0 –10 –20 0 1 2 3 4 G AI N NO NL IN EA RI TY (p pm ) OUTPUT VOLTAGE (V) Figure 16. Gain Nonlinearity, RL = 600 Ω, 2 kΩ, 10 kΩ

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AD8275 Data Sheet Rev. B | Page 8 of 16 07 54 6- 01 6 60 50 40 30 20 10 0 –10 –20 –30 –40 –50 –60 –70 –25–50 0 25 50 75 100 125 CU RR EN T (m A) TEMPERATURE (°C) 5V SINK 3.3V SINK 5V SOURCE 3.3V SOURCE Figure 17. Short-Circuit Current vs. Temperature, VS = 3.3 V, 5 V 07 54 6- 01 7 +VS +VS – 0.2 +VS – 0.4 +VS – 0.6 +VS – 0.8 +VS – 1.0 –VS + 1.0 –VS + 0.8 –VS + 0.6 –VS + 0.4 –VS + 0.2 –VS O UT PU T VO LT AG E SW IN G (V ) (R EF ER RE D TO S UP PL Y RA IL S) 1k 10k100 100k RLOAD (Ω) –40°C –40°C +125°C +25°C +85°C +125°C +25°C +85°C Figure 18. Output Voltage Swing vs. RLOAD, VS = 5 V +VS +VS – 0.4 +VS – 0.8 +VS – 1.2 +VS – 1.6 +VS – 2.0 –VS + 2.0 –VS + 1.6 –VS + 1.2 –VS + 0.8 –VS + 0.4 –VS O UT PU T VO LT AG E SW IN G (V ) (R EF ER RE D TO S UP PL Y RA IL S) 2 4 6 8 10 12 140 OUTPUT CURRENT (mA) –40°C +125°C +25°C +125°C 07 54 6- 01 8 +85°C+25°C +85°C –40°C Figure 19. Output Voltage Swing vs. Output Current, VS = 3.3 V +VS +VS – 0.4 +VS – 0.8 +VS – 1.2 +VS – 1.6 +VS – 2.0 –VS + 2.0 –VS + 1.6 –VS + 1.2 –VS + 0.8 –VS + 0.4 –VS O UT PU T VO LT AG E SW IN G (V ) (R EF ER RE D TO S UP PL Y RA IL S) 2 4 6 8 10 12 140 OUTPUT CURRENT (mA) –40°C 07 54 6- 11 9 –40°C +125°C+85°C+25°C +125°C +85°C +25°C Figure 20. Output Voltage Swing vs. Output Current, VS = 5 V 07 54 6- 01 9 FREQUENCY (Hz) VO LT AG E NO IS E DE NS IT Y (n V/ √H z) 10 100 1k 1 10 100 1k 10k 100k Figure 21. Voltage Noise Density vs. Frequency, Referred to Output 07 54 6- 02 0 TIME (1s/DIV) VO LT AG E NO IS E (1 µV /D IV ) Figure 22. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output

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Data Sheet AD8275 Rev. B | Page 9 of 16 07 54 6- 02 1 40 35 30 25 20 15 10 5 0 –40 –20 0 20 40 60 80 100 120 SL EW R AT E (V /µ s) TEMPERATURE (°C) +SR –SR Figure 23. Slew Rate vs. Temperature 07 54 6- 02 2 1µs/DIV 20 m V/ DI V CLOAD = 47pF 600Ω 2kΩ 10kΩ NO LOAD Figure 24. Small Signal Step Response for Various Resistive Loads (Step Responses Staggered for Clarity) 07 54 6- 02 3 1µs/DIV 20 m V/ DI V NO RESISTIVE LOAD 20pF 47pF NO CAP 100pF Figure 25. Small Signal Pulse Response for Various Capacitive Loads (Step Responses Staggered for Clarity) 07 54 6- 02 4 0 10 20 30 40 50 60 0 20 40 60 80 100 120 140 160 CAPACITANCE (pF) O VE RS HO O T (% ) 3.3V 5V Figure 26. Small Signal Overshoot vs. Capacitive Load, No Resistive Load 07 54 6- 02 5 0 10 20 30 40 50 60 0 20 40 60 80 100 120 140 160 CAPACITANCE (pF) O VE RS HO O T (% ) 3.3V 5V Figure 27. Small Signal Overshoot vs. Capacitive Load, 600 Ω in Parallel with Capacitive Load 07 54 6- 02 6 0 10 20 30 40 50 60 0 20 40 60 80 100 120 140 160 CAPACITANCE (pF) O VE RS HO O T (% ) 3.3V 5V Figure 28. Small Signal Overshoot vs. Capacitive Load, 2 kΩ in Parallel with Capacitive Load

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Konno*****chant

May 26, 2020

I wish I had come across Heisener first, no one could help me for 2 days. You are now saved into the TOP of my favorites web list. Thank you very much.

Alys*****eard

May 24, 2020

good item, quick delivery, prefer to recommended.

Dyl*****Goyal

May 17, 2020

Item came in time and looks as described.

Step*****Vega

May 16, 2020

EVERY OK ...GOOD ITEM AND SUPERFAST SHIPPING

Layl*****argas

May 16, 2020

This was a useful assortment of product that filled in a parts gap that I had on my electronic workbench. Thank you.

Marg***** Hogan

May 12, 2020

Work great, great price, I use a lot of them for battery chargers, not the first time ordered.

Shel*****tout

April 30, 2020

Good and works well. What else is there to say about it.

Kimo*****orman

April 20, 2020

Fantastic transaction, very fast delivery. Highly recommended. Thank you.

Land*****hawla

April 16, 2020

No complaints. Works perfectly every single one of them! great quality! No bent pins either!

Tyle*****entes

April 13, 2020

I took the chance and used it and I worked fine for me.

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